TWI726648B - Pixel array substrate and method of fabricating the same - Google Patents
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Abstract
Description
本發明是有關於一種顯示技術,且特別是有關於一種具有發光元件的畫素陣列基板及其製造方法。The present invention relates to a display technology, and particularly relates to a pixel array substrate with light-emitting elements and a manufacturing method thereof.
近年來,在有機發光二極體(Organic light-emitting diode,OLED)顯示面板的製造成本偏高及其使用壽命無法與現行的主流顯示器相抗衡的情況下,微型發光二極體顯示器(Micro LED Display)逐漸吸引各科技大廠的投資目光。微型發光二極體顯示器具有與有機發光二極體顯示技術相當的光學表現,例如高色彩飽和度、應答速度快及高對比,且具有低耗能及材料使用壽命長的優勢。然而,以目前的技術而言,微型發光二極體顯示器製造成本仍高於有機發光二極體顯示器。主因在於微型發光二極體顯示器的製造技術係採用晶粒轉置的方式將製作好的微型發光二極體晶粒直接轉移到驅動電路背板上,雖然這樣的巨量轉移(Mass transfer)技術在大尺寸的產品製造上有其發展優勢,但目前相關製程技術與設備都有瓶頸待突破。In recent years, when the manufacturing cost of organic light-emitting diode (OLED) display panels is too high and their service life cannot compete with the current mainstream displays, micro LED displays (Micro LED Display) has gradually attracted the investment attention of major technology companies. Miniature light-emitting diode displays have optical performance equivalent to organic light-emitting diode display technology, such as high color saturation, fast response speed and high contrast, and have the advantages of low energy consumption and long material life. However, as far as current technology is concerned, the manufacturing cost of miniature light-emitting diode displays is still higher than that of organic light-emitting diode displays. The main reason is that the manufacturing technology of the micro-light-emitting diode display adopts the method of die transposition to directly transfer the produced micro-light-emitting diode crystal grains to the backplane of the driving circuit, although such a mass transfer technology It has its development advantages in the manufacture of large-size products, but the current related process technology and equipment have bottlenecks to be broken.
舉例來說,一種採用硬質靜電吸頭進行晶粒轉置的技術,其對於目標基板(例如電路背板)的接合面平整度有較高的要求(例如平整度小於1微米)。因此,較難滿足大面積轉移的需求。另一種採用軟質圖案化印章進行晶粒轉置的技術,對於目標基板的平整度要求雖不高(例如小於5微米),但承受高溫高壓的製程能力卻較差。因此,不適用於覆晶型(flip-chip type)發光二極體晶片的轉移接合製程。換句話說,要滿足大面積轉移的需求與高溫高壓製程的適用性已成為相關廠商在開發晶粒轉移技術時的重要課題之一。For example, a technology that uses a hard electrostatic tip for die transposition has high requirements for the flatness of the bonding surface of the target substrate (such as a circuit backplane) (such as a flatness less than 1 micron). Therefore, it is more difficult to meet the demand for large-area transfer. Another technology that uses soft patterned stamps for die transposition has low requirements for the flatness of the target substrate (for example, less than 5 microns), but its ability to withstand high temperatures and pressures is poor. Therefore, it is not suitable for the transfer bonding process of flip-chip type light emitting diode chips. In other words, to meet the needs of large-area transfer and the applicability of the high temperature and high pressure process has become one of the important issues for related manufacturers when developing grain transfer technology.
本發明提供一種畫素陣列基板,其生產良率與出光效率較佳。The present invention provides a pixel array substrate with better production yield and light extraction efficiency.
本發明提供一種畫素陣列基板的製造方法,其具有較佳的轉移製程彈性。The present invention provides a method for manufacturing a pixel array substrate, which has better flexibility in the transfer process.
本發明的畫素陣列基板,包括電路基板、多個轉置單元以及多個黏著圖案。這些轉置單元設置於電路基板上,且電性連接電路基板。這些轉置單元各自包括支撐結構、第一光學圖案、第二光學圖案、第一發光元件以及第二發光元件。支撐結構具有表面、自表面凹陷的第一凹槽與第二凹槽以及分別定義第一凹槽與第二凹槽的第一底面與第二底面。第一底面與電路基板之間具有第一距離。第二底面與電路基板之間具有第二距離,且第一距離大於第二距離。第一光學圖案與第二光學圖案分別設置於第一凹槽與第二凹槽內。第一發光元件與第二發光元件分別重疊設置於第一光學圖案與第二光學圖案。這些黏著圖案重疊設置於這些轉置單元的多個支撐結構的多個第一凹槽,且位於這些支撐結構與電路基板之間。The pixel array substrate of the present invention includes a circuit substrate, a plurality of transposition units, and a plurality of adhesive patterns. These transposing units are arranged on the circuit substrate and are electrically connected to the circuit substrate. Each of these transposing units includes a supporting structure, a first optical pattern, a second optical pattern, a first light-emitting element, and a second light-emitting element. The supporting structure has a surface, a first groove and a second groove recessed from the surface, and a first bottom surface and a second bottom surface respectively defining the first groove and the second groove. There is a first distance between the first bottom surface and the circuit substrate. There is a second distance between the second bottom surface and the circuit substrate, and the first distance is greater than the second distance. The first optical pattern and the second optical pattern are respectively disposed in the first groove and the second groove. The first light-emitting element and the second light-emitting element are overlapped and arranged on the first optical pattern and the second optical pattern, respectively. The adhesive patterns are overlapped and arranged in the first grooves of the supporting structures of the transposing units, and are located between the supporting structures and the circuit substrate.
本發明的畫素陣列基板的製造方法,包括於暫時基板上形成圖案定義層、於圖案定義層上形成支撐結構、於支撐結構上形成第一光學圖案與第二光學圖案、將第一發光元件與第二發光元件轉移至暫時基板上,以形成包括支撐結構、第一光學圖案、第二光學圖案、第一發光元件以及第二發光元件的轉置單元、於電路基板上形成黏著圖案以及將轉置單元轉移至電路基板上,使黏著圖案夾設於支撐結構的第一凹槽與電路基板之間。圖案定義層具有第一凹陷與第二凹陷,且第一凹陷的深度小於第二凹陷的深度。支撐結構覆蓋圖案定義層的第一凹陷與第二凹陷的部分定義出支撐結構的第一凹槽與第二凹槽。第一光學圖案與第二光學圖案設置於支撐結構的第一凹槽與第二凹槽內。第一發光元件與第二發光元件分別重疊於第一光學圖案與第二光學圖案。支撐結構具有分別定義第一凹槽與第二凹槽的第一底面與第二底面。第一底面與電路基板之間具有第一距離。第二底面與電路基板之間具有第二距離,且第一距離大於第二距離。The manufacturing method of the pixel array substrate of the present invention includes forming a pattern definition layer on a temporary substrate, forming a support structure on the pattern definition layer, forming a first optical pattern and a second optical pattern on the support structure, and combining the first light-emitting element And the second light-emitting element are transferred to a temporary substrate to form a transposition unit including a supporting structure, a first optical pattern, a second optical pattern, a first light-emitting element and a second light-emitting element, an adhesive pattern is formed on the circuit substrate, and the The transposing unit is transferred to the circuit substrate, so that the adhesive pattern is sandwiched between the first groove of the supporting structure and the circuit substrate. The pattern definition layer has a first recess and a second recess, and the depth of the first recess is smaller than the depth of the second recess. The first recess and the second recess of the support structure covering the pattern definition layer define the first recess and the second recess of the support structure. The first optical pattern and the second optical pattern are disposed in the first groove and the second groove of the supporting structure. The first light-emitting element and the second light-emitting element overlap the first optical pattern and the second optical pattern, respectively. The supporting structure has a first bottom surface and a second bottom surface respectively defining a first groove and a second groove. There is a first distance between the first bottom surface and the circuit substrate. There is a second distance between the second bottom surface and the circuit substrate, and the first distance is greater than the second distance.
基於上述,在本發明的一實施例的畫素陣列基板及其製造方法中,轉置單元的支撐結構具有兩凹槽。透過這兩凹槽與電路基板之間的距離互不相同,可避免夾設於支撐結構與電路基板之間的黏著圖案在轉置單元接合至電路基板的過程中發生溢流,並增加轉置單元與電路基板的黏著穩定性,有助於提升轉置單元的轉移良率。另一方面,為了提升發光元件的出光效率,這兩凹槽內還設有重疊於兩發光元件的兩光學圖案。此外,透過光學圖案的設置,還可有效提升發光元件的轉移良率與製程彈性。Based on the above, in the pixel array substrate and the manufacturing method thereof according to an embodiment of the present invention, the support structure of the transposing unit has two grooves. The distances between the two grooves and the circuit substrate are different from each other, so that the adhesive pattern sandwiched between the support structure and the circuit substrate can be prevented from overflowing during the process of the transposition unit being joined to the circuit substrate, and the transposition is increased. The adhesion stability between the unit and the circuit substrate helps to improve the transfer yield of the transposed unit. On the other hand, in order to improve the light-emitting efficiency of the light-emitting element, two optical patterns overlapping the two light-emitting elements are also provided in the two grooves. In addition, through the arrangement of the optical pattern, the transfer yield of the light-emitting device and the flexibility of the manufacturing process can be effectively improved.
本文使用的「約」、「近似」、「本質上」、或「實質上」包括所述值和在本領域普通技術人員確定的特定值的可接受的偏差範圍內的平均值,考慮到所討論的測量和與測量相關的誤差的特定數量(即,測量系統的限制)。例如,「約」可以表示在所述值的一個或多個標準偏差內,或例如±30%、±20%、±15%、±10%、±5%內。再者,本文使用的「約」、「近似」、「本質上」、或「實質上」可依量測性質、切割性質或其它性質,來選擇較可接受的偏差範圍或標準偏差,而可不用一個標準偏差適用全部性質。As used herein, "approximately", "approximately", "essentially", or "substantially" includes the stated value and the average value within the acceptable deviation range of the specific value determined by a person of ordinary skill in the art, taking into account all The measurement in question and the specific number of errors associated with the measurement (ie, the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or, for example, within ±30%, ±20%, ±15%, ±10%, ±5%. Furthermore, "about", "approximately", "essentially", or "substantially" used in this article can be based on measurement properties, cutting properties, or other properties to select a more acceptable deviation range or standard deviation. Not one standard deviation applies to all properties.
在附圖中,為了清楚起見,放大了層、膜、面板、區域等的厚度。應當理解,當諸如層、膜、區域或基板的元件被稱為在另一元件「上」或「連接到」另一元件時,其可以直接在另一元件上或與另一元件連接,或者中間元件可以也存在。相反,當元件被稱為「直接在另一元件上」或「直接連接到」另一元件時,不存在中間元件。如本文所使用的,「連接」可以指物理及/或電性連接。再者,「電性連接」可為二元件間存在其它元件。In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements can also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connection" can refer to physical and/or electrical connection. Furthermore, "electrical connection" can mean that there are other components between the two components.
此外,諸如「下」或「底部」和「上」或「頂部」的相對術語可在本文中用於描述一個元件與另一元件的關係,如圖所示。應當理解,相對術語旨在包括除了圖中所示的方位之外的裝置的不同方位。例如,如果一個附圖中的裝置翻轉,則被描述為在其它元件的「下」側的元件將被定向在其它元件的「上」側。因此,示例性術語「下」可以包括「下」和「上」的取向,取決於附圖的特定取向。類似地,如果一個附圖中的裝置翻轉,則被描述為在其它元件「下方」或「下方」的元件將被定向為在其它元件「上方」。因此,示例性術語「上面」或「下面」可以包括上方和下方的取向。In addition, relative terms such as "lower" or "bottom" and "upper" or "top" can be used herein to describe the relationship between one element and another element, as shown in the figure. It should be understood that relative terms are intended to include different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one figure is turned over, elements described as being on the "lower" side of other elements will be oriented on the "upper" side of the other elements. Therefore, the exemplary term "lower" may include an orientation of "lower" and "upper," depending on the specific orientation of the drawing. Similarly, if the device in one figure is turned over, elements described as "below" or "below" other elements will be oriented "above" the other elements. Thus, the exemplary terms "above" or "below" can include an orientation of above and below.
現將詳細地參考本發明的示範性實施方式,示範性實施方式的實例說明於所附圖式中。只要有可能,相同元件符號在圖式和描述中用來表示相同或相似部分。Reference will now be made in detail to the exemplary embodiments of the present invention, and examples of the exemplary embodiments are illustrated in the accompanying drawings. Whenever possible, the same component symbols are used in the drawings and descriptions to indicate the same or similar parts.
圖1是本發明的一實施例的畫素陣列基板的俯視示意圖。圖2是圖1的畫素陣列基板的轉置單元的放大示意圖。圖3是圖1的畫素陣列基板的剖視示意圖。圖4A至圖4J是圖3的畫素陣列基板的製造流程的剖視示意圖。圖5是本發明的另一實施例的轉置單元的轉移步驟的剖視示意圖。特別說明的是,為清楚呈現起見,圖1僅繪示出圖3的電路基板100、支撐結構110、發光元件LED與接合電極BE,圖2省略了圖3的導光結構層120的繪示。FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the invention. FIG. 2 is an enlarged schematic diagram of a transposition unit of the pixel array substrate of FIG. 1. FIG. 3 is a schematic cross-sectional view of the pixel array substrate of FIG. 1. 4A to 4J are schematic cross-sectional views of the manufacturing process of the pixel array substrate of FIG. 3. Fig. 5 is a schematic cross-sectional view of a transfer step of a transposition unit according to another embodiment of the present invention. In particular, for the sake of clarity, FIG. 1 only shows the
請參照圖1、圖2及圖3,畫素陣列基板10包括電路基板100、多個轉置單元TU以及多個黏著圖案150。這些轉置單元TU設置於電路基板100上,並且與電路基板100電性連接。這些黏著圖案150設置於多個轉置單元TU與電路基板100之間,且分別重疊於這些轉置單元TU。更具體地說,這些黏著圖案150可確保這些轉置單元TU與電路基板100的連接關係。在本實施例中,這些轉置單元TU可陣列排列於電路基板100上,例如:這些轉置單元TU可分別在方向X與方向Y上排成多列或多行,但本發明不以此為限。舉例而言,電路基板100可包括基板、主動元件層與多條訊號走線,但不以此為限。舉例而言,轉置單元TU於電路基板100上的垂直投影面積與電路基板100的表面積的百分比例可介於1%至90%之間。Please refer to FIGS. 1, 2 and 3, the
轉置單元TU包括支撐結構110、多個發光元件LED以及多個接合電極BE。這些發光元件LED設置於支撐結構110上,且電性連接這些接合電極BE。舉例來說,在本實施例中,多個接合電極BE分別鄰設於支撐結構110彼此相對的側邊110e1與側邊110e2,且位於這些發光元件LED的相對兩側,但本發明不以此為限。在本實施例中,畫素陣列基板10更包括多個連接墊BP。這些連接墊BP設置於電路基板100的表面100s上,且電性連接電路基板100。值得一提的是,每一轉置單元TU的發光元件LED是透過接合電極BE與連接墊BP的接合關係而電性連接電路基板100。也就是說,電路基板100所傳遞的驅動訊號可經由連接墊BP與接合電極BE傳遞至發光元件LED,並驅使發光元件LED發出光線以達到顯示的效果。以下將針對圖3所示的畫素陣列基板10的製造流程進行示範性地說明。The transposition unit TU includes a supporting
請參照圖4A,首先,於暫時基板80上形成圖案定義層PDL。圖案定義層PDL具有多個凹陷,分別為第一凹陷PDLr1、第二凹陷PDLr2以及第三凹陷PDLr3。第一凹陷PDLr1位於第二凹陷PDLr2與第三凹陷PDLr3之間。值得注意的是,圖案定義層PDL的第一凹陷PDLr1、第二凹陷PDLr2與第三凹陷PDLr3在垂直於暫時基板80的方向(例如方向Z)上分別具有第一深度dt1、第二深度dt2與第三深度dt3,且第一凹陷PDLr1的第一深度dt1小於第二凹陷PDLr2的第二深度dt2與第三凹陷PDLr3的第三深度dt3。在本實施例中,第二凹陷PDLr2的第二深度dt2實質上等於第三凹陷PDLr3的第三深度dt3,但本發明不以此為限。在其他實施例中,第三凹陷PDLr3的第三深度dt3也可介於第二凹陷PDLr2的第二深度dt2與第一凹陷PDLr1的第一深度dt1之間。Referring to FIG. 4A, first, a pattern definition layer PDL is formed on the
在形成圖案定義層PDL後,還可形成覆蓋圖案定義層PDL的犧牲層SL。在本實施例中,圖案定義層PDL還可具有第四凹陷PDLr4,且犧牲層SL具有位於此第四凹陷PDLr4內的開口SLa。在本實施例中,犧牲層SL的材質可包括氧化矽、氮化矽、熱固化型樹酯或光固化型樹酯。接著,如圖4B所示,於犧牲層SL上形成支撐結構110。值得注意的是,支撐結構110覆蓋圖案定義層PDL的第一凹陷PDLr1、第二凹陷PDLr2與第三凹陷PDLr3的部分可定義出支撐結構110的第一凹槽110r1、第二凹槽110r2與第三凹槽110r3。也因此,支撐結構110的這些凹槽的深度大小關係可對應於圖案定義層PDL的這些凹陷的深度大小關係。After the pattern definition layer PDL is formed, a sacrificial layer SL covering the pattern definition layer PDL may also be formed. In this embodiment, the pattern definition layer PDL may further have a fourth recess PDLr4, and the sacrificial layer SL has an opening SLa located in the fourth recess PDLr4. In this embodiment, the material of the sacrificial layer SL may include silicon oxide, silicon nitride, thermosetting resin or light curing resin. Next, as shown in FIG. 4B, a
在本實施例中,支撐結構110的這些凹槽在結構上彼此分離。也就是說,支撐結構110的這些凹槽並沒有相互連通。然而,本發明不限於此,根據其他實施例,支撐結構的第二凹槽110r2與第三凹槽110r3可相互連通,且與第一凹槽110r1在結構上彼此分離。另一方面,支撐結構110覆蓋圖案定義層PDL的第四凹陷PDLr4的部分可經由犧牲層SL的開口SLa與暫時基板80直接連接。在本實施例中,支撐結構110還具有重疊於圖案定義層PDL的多個接觸窗110a。在本實施例中,支撐結構110的材質可包括氧化矽、氮化矽、熱固化型樹酯或光固化型樹酯。In this embodiment, the grooves of the supporting
請參照圖4C,在支撐結構110形成後,於支撐結構110的第一凹槽110r1、第二凹槽110r2與第三凹槽110r3內分別形成第一光學圖案OP1、第二光學圖案OP2與第三光學圖案OP3。值得注意的是,由於支撐結構110的第一凹槽110r1的深度小於第二凹槽110r2與第三凹槽110r3的深度,第一光學圖案OP1的厚度t1可小於第二光學圖案OP2的厚度t2與第三光學圖案OP3的厚度t3。舉例來說,在本實施例中,光學圖案可自支撐結構110的表面110s凸出,但不以此為限。在其他實施例中,光學圖案也可選擇性地切齊支撐結構110的表面110s。光學圖案的材質可包括熱固化型樹酯、光固化型樹酯、或者是楊氏模量(Young’s modulus)較發光元件小的透光材料。4C, after the
如圖2及圖4D所示,在形成光學圖案後,於支撐結構110上形成多個接合電極BE與多個連接電極(例如第一連接電極CE1、第二連接電極CE2以及第三連接電極CE3)。這些連接電極分別覆蓋這些光學圖案以及支撐結構110的部分表面110s。舉例而言,這些接合電極BE的一部分設置在支撐結構110的側邊110e1與第二光學圖案OP2(或第二凹槽110r2)之間,這些接合電極BE的另一部分設置在支撐結構110的側邊110e2與第三光學圖案OP3(或第三凹槽110r3)之間。值得注意的是,這些接合電極BE在支撐結構110的表面110s的法線方向上重疊於支撐結構110的多個接觸窗110a,且透過這些接觸窗110a與犧牲層SL直接接觸。As shown in FIGS. 2 and 4D, after forming the optical pattern, a plurality of bonding electrodes BE and a plurality of connecting electrodes (such as the first connecting electrode CE1, the second connecting electrode CE2, and the third connecting electrode CE3 are formed on the support structure 110). ). The connecting electrodes cover the optical patterns and part of the
第一連接電極CE1覆蓋部分的第一光學圖案OP1並朝向支撐結構110的側邊110e1延伸以電性連接對應的接合電極BE。第二連接電極CE2覆蓋部分的第二光學圖案OP2並朝向支撐結構110的側邊110e1延伸以電性連接對應的接合電極BE。第三連接電極CE3覆蓋部分的第三光學圖案OP3並朝向支撐結構110的側邊110e2延伸以電性連接對應的接合電極BE。在本實施例中,形成多個連接電極的步驟更包括形成第四連接電極CE4。第四連接電極CE4覆蓋部分的第一光學圖案OP1、部分的第二光學圖案OP2以及部分的第三光學圖案OP3並朝向支撐結構110的側邊110e2延伸以電性連接對應的接合電極BE。The first connection electrode CE1 covers part of the first optical pattern OP1 and extends toward the side 110e1 of the
在形成接合電極BE與連接電極後,如圖4E及圖4F所示,將發光元件LED轉移至暫時基板80上。舉例而言,在發光元件LED的轉移步驟中,可利用載板結構CS1吸附存放在來源基板上的多個發光元件LED,並將這些發光元件LED移動至暫時基板80的上方,使其對位於支撐結構110上的多個光學圖案。接著,令載板結構CS1朝向暫時基板80移動,使發光元件LED的兩電極(如圖2所示的電極E2與電極E1)電性接合於連接電極重疊於光學圖案的部分。然而,本發明不限於此,在其他未繪示的實施例中,載板結構也可以是發光元件LED的原生基板,且發光元件LED可利用雷射或機械力等方式轉移至暫時基板80。After forming the bonding electrode BE and the connecting electrode, as shown in FIGS. 4E and 4F, the light-emitting element LED is transferred to the
特別一提的是,此處的光學圖案的材質可選自質地較軟的材料。亦即,光學圖案可具有緩衝的特性。據此,在發光元件LED接合至暫時基板80的過程中,可避免發光元件LED因載板結構CS1的過度擠壓而毀損,有助於提升發光元件LED的轉移良率。從另一觀點來說,可降低轉移製程對於暫時基板80或載板結構CS1的表面平整度的規格要求,有助於實現大面積的晶粒轉移。換句話說,可增加晶粒(例如發光元件LED)轉移的製程彈性。In particular, the material of the optical pattern here can be selected from softer materials. That is, the optical pattern may have buffering characteristics. Accordingly, during the process of bonding the light-emitting element LED to the
再者,由於光學圖案具有緩衝的特性,載板結構CS1的材質可選用質地較硬的材料來製作,有助於提升載板結構CS1對於高溫高壓的耐受性。另一方面,由於光學圖案可自支撐結構110的表面110s凸出,當發光元件LED接觸到與其重疊的光學圖案時,未重疊於光學圖案的發光元件LED與暫時基板80仍維持結構上分離的狀態。也就是說,透過上述光學圖案的配置方式,可實現多個晶粒的局部轉移。Furthermore, since the optical pattern has a buffering characteristic, the material of the carrier structure CS1 can be made of a harder material, which helps to improve the resistance of the carrier structure CS1 to high temperature and high pressure. On the other hand, since the optical pattern can protrude from the
請參照圖4G,在本實施例中,畫素陣列基板10的製造方法還可選擇性地包括:在發光元件LED的轉移步驟後,於支撐結構110上形成導光結構層120。應注意的是,導光結構層120具有重疊於第一光學圖案OP1、第二光學圖案OP2以及第三光學圖案OP3的多個開口120n,且第一發光元件LED1、第二發光元件LED2以及第三發光元件LED3分別設置於導光結構層120的這些開口120n內。於此便完成了本實施例的轉置單元TU的製作。Referring to FIG. 4G, in this embodiment, the manufacturing method of the
在完成轉置單元TU的製作後,如圖4H及圖4I所示,將轉置單元TU轉移至電路基板100上。舉例而言,在轉置單元TU的轉移步驟中,可利用載板結構CS2吸附存放在暫時基板80上的多個轉置單元TU(如圖4H所示)。在本實施例中,轉置單元TU的轉移步驟可選擇性地包括移除犧牲層SL,使轉置單元TU的支撐結構110與圖案定義層PDL分離開來。此時,轉置單元TU僅透過支撐結構110位於圖案定義層PDL的第四凹陷PDLr4內的部分與暫時基板80連接。特別一提的是,在載板結構CS2接觸到導光結構層120並完成轉置單元TU的吸附後,令載板結構CS2朝遠離暫時基板80的方向移動,使支撐結構110位於圖案定義層PDL的第四凹陷PDLr4內的部分斷開,並帶動轉置單元TU離開暫時基板80以完成轉置單元TU的提取。然而,本發明不限於此,根據其他實施例,轉置單元也可不具有導光結構層120。如圖5所示,在轉置單元的轉移步驟中,載板結構CS2也可直接連接發光元件的頂面以進行轉置單元的轉移與接合。After the production of the transposition unit TU is completed, as shown in FIG. 4H and FIG. 4I, the transposition unit TU is transferred to the
請參照圖4I,接著,將轉置單元TU移動至電路基板100的上方,使轉置單元TU的多個接合電極BE對位於電路基板100上的多個連接墊BP。為了穩固轉置單元TU與電路基板100的連接關係,在轉置單元TU轉移至電路基板100前,電路基板100上還可形成黏著圖案150,且這些連接墊BP分別位於黏著圖案150的相對兩側。進一步而言,當轉置單元TU在載板結構CS2的帶動下完成其接合電極BE與連接墊BP的對位後,黏著圖案150在電路基板100的表面100s的法線方向上重疊於第一光學圖案OP1,且不重疊於第二光學圖案OP2與第三光學圖案OP3,但不以此為限。在其他實施例中,根據不同的產品設計或製程條件,黏著圖案150在電路基板100的表面100s的法線方向上還可部分重疊於第二光學圖案OP2與第三光學圖案OP3。Please refer to FIG. 4I, then, move the transposing unit TU to the upper side of the
請參照圖4I及圖4J,接著,令載板結構CS2朝向電路基板100移動,使轉置單元TU的這些接合電極BE電性接合於電路基板100上的這些連接墊BP。值得注意的是,支撐結構110定義第一光學圖案OP1、第二光學圖案OP2以及第三光學圖案OP3的部分還可定義出第四凹槽110r4,且第四凹槽110r4與前述凹槽(例如第一凹槽110r1、第二凹槽110r2或第三凹槽110r3)分別位於支撐結構110的相對兩側。Please refer to FIG. 4I and FIG. 4J. Next, the carrier structure CS2 is moved toward the
在轉置單元TU與電路基板100的接合過程中,黏著圖案150在支撐結構110定義第一凹槽110r1的部分的擠壓下,可在第四凹槽110r4內朝向支撐結構110定義第二凹槽110r2與第三凹槽110r3的部分流動。據此,可增加轉置單元TU與電路基板100的黏著穩定性,有助於提升轉置單元TU的轉移良率。從另一觀點來說,由於轉置單元TU的第二光學圖案OP2的厚度t2與第三光學圖案OP3的厚度t3大於第一光學圖案OP1的厚度t1、第二光學圖案OP2位於一部分的接合電極BE與黏著圖案150之間以及第三光學圖案OP3位於另一部分的接合電極BE與黏著圖案150之間,在轉置單元TU與電路基板100的接合過程中,可避免黏著圖案150因支撐結構110的擠壓而溢流至連接墊BP並沾附於接合電極BE與連接墊BP之間。換句話說,透過上述光學圖案的配置關係,可有效提升轉置單元TU與電路基板100的接合良率。During the joining process of the transposing unit TU and the
舉例而言,在本實施例中,轉置單元TU與電路基板100的接合過程可以加熱壓合的方式進行,但不以此為限。更具體地說,當轉置單元TU的接合電極BE接觸電路基板100上的連接墊BP時,載板結構CS2可透過導光結構層120施壓於接合電極BE與連接墊BP的連接面,以確保其電性接合的效果。另一方面,由於此處的導光結構層120的材質可選自質地較軟的材料,例如:熱固化型樹酯或光固化型樹酯。亦即,導光結構層120可具有緩衝的特性。據此,可降低轉移製程對於電路基板100或載板結構CS2的表面平整度的規格要求,有助於實現轉置單元TU的大面積轉移。再者,由於導光結構層120具有緩衝的特性,載板結構CS2的材質可選用質地較硬的材料來製作,有助於提升載板結構CS2對於高溫高壓的耐受性。For example, in this embodiment, the joining process of the transposing unit TU and the
特別一提的是,在本實施例中,連接墊BP的厚度實質上可等於第二凹槽110r2或第三凹槽110r3的深度,且連接墊BP的材質可選自金屬材料,但本發明不以此為限。在其他實施例中,連接墊的材質也可以是絕緣材料與金屬材料的組合,例如以絕緣材料作為主體,再於主體上覆蓋金屬材料以形成連接墊,如此可增加連接墊的製程彈性並降低其製作成本。在另一些實施例中,連接墊的厚度也可略大於第二凹槽110r2或第三凹槽110r3的深度。In particular, in this embodiment, the thickness of the connection pad BP can be substantially equal to the depth of the second groove 110r2 or the third groove 110r3, and the material of the connection pad BP can be selected from metal materials, but the present invention Not limited to this. In other embodiments, the material of the connection pad can also be a combination of insulating material and metal material. For example, an insulating material is used as the main body, and then the main body is covered with a metal material to form the connection pad. This can increase the process flexibility of the connection pad and reduce Its production cost. In other embodiments, the thickness of the connection pad may also be slightly larger than the depth of the second groove 110r2 or the third groove 110r3.
於此,便完成本實施例的畫素陣列基板10。由圖1、圖2及圖3可知,畫素陣列基板10包括電路基板100、多個轉置單元TU以及多個黏著圖案150。轉置單元TU包括支撐結構110、第一光學圖案OP1、第二光學圖案OP2、第一發光元件LED1以及第二發光元件LED2。支撐結構110具有表面110s以及自表面110s凹陷的第一凹槽110r1與第二凹槽110r2。第一光學圖案OP1與第二光學圖案OP2分別設置於第一凹槽110r1與第二凹槽110r2內。第一發光元件LED1與第二發光元件LED2分別設置於第一光學圖案OP1與第二光學圖案OP2上。At this point, the
在本實施例中,第一發光元件LED1的發光效率可高於第二發光元件LED2的發光效率。舉例而言,第一發光元件LED1可以是藍光發光二極體,而第二發光元件LED2可以是紅光發光二極體或綠光發光二極體,但不以此為限。透過第二光學圖案OP2在垂直於支撐結構110的表面110s的方向(例如方向Z)上的厚度t2大於第一光學圖案OP1在方向Z上的厚度t1(如圖4C所示),可使第二發光元件LED2所發出的光線在出光方向(例如方向Z)上出射的比例高於第一發光元件LED1所發出的光線在出光方向(例如方向Z)上出射的比例。換句話說,透過具有不同厚度的兩光學圖案的配置,可彌補兩發光元件因發光效率的不同所產生的出光效率的差異。In this embodiment, the luminous efficiency of the first light-emitting element LED1 may be higher than the luminous efficiency of the second light-emitting element LED2. For example, the first light-emitting element LED1 may be a blue light-emitting diode, and the second light-emitting element LED2 may be a red light-emitting diode or a green light-emitting diode, but it is not limited to this. The thickness t2 of the second optical pattern OP2 in the direction perpendicular to the
在本實施例中,轉置單元TU還可選擇性地包括第三光學圖案OP3與第三發光元件LED3,且支撐結構110還具有自表面110s凹陷的第三凹槽110r3。第三光學圖案OP3設置於第三凹槽110r3內,且第三發光元件LED3設置於第三光學圖案OP3上。第三光學圖案OP3在垂直於支撐結構110的表面110s的方向(例如方向Z)上的厚度t3大於第一光學圖案OP1在方向Z上的厚度t1(如圖4C所示)。也就是說,在上述光學圖案的厚度關係配置下,本實施例的第三發光元件LED3的發光效率可低於第一發光元件LED1的發光效率。In this embodiment, the transposition unit TU can also optionally include a third optical pattern OP3 and a third light emitting element LED3, and the
值得注意的是,支撐結構110還具有分別定義第一凹槽110r1與第二凹槽110r2的第一底面110b1與第二底面110b2。支撐結構110的第一底面110b1與電路基板100的表面100s之間具有第一距離d1,支撐結構110的第二底面110b2與電路基板100的表面100s之間具有第二距離d2,且第一距離d1大於第二距離d2。在本實施例中,支撐結構110還可具有定義第三凹槽110r3的第三底面110b3,支撐結構110的第三底面110b3與電路基板100的表面100s之間具有第三距離d3,且第一距離d1大於第三距離d3。也就是說,支撐結構110重疊於黏著圖案150的部分的橫截面(例如XZ平面)輪廓呈階梯狀。據此,可提升黏著圖案150在流動時的可控性,有助於增加轉置單元TU與電路基板100的黏著穩定性。另一方面,透過設置在一部分的接合電極BE與黏著圖案150之間的第二凹槽110r2(或第二光學圖案OP2)以及設置在另一部分的接合電極BE與黏著圖案150之間的第三凹槽110r3(或第三光學圖案OP3),可避免黏著圖案150因支撐結構110的擠壓而溢流至連接墊BP並沾附於接合電極BE與連接墊BP之間。換句話說,可有效提升轉置單元TU與電路基板100的接合良率。It is worth noting that the supporting
需說明的是,在本實施例中,轉置單元TU的凹槽、光學圖案以及發光元件LED的數量都是以三個為例進行示範性地說明。也就是說,本實施例的轉置單元TU可構成畫素陣列基板10的一個顯示畫素,但本發明不以此為限。在其他實施例中,轉置單元的凹槽、光學圖案以及發光元件LED的數量也可根據實際的設計需求或製程考量而調整為兩個(例如轉置單元僅具有第一凹槽110r1、第二凹槽110r2、第一光學圖案OP1、第二光學圖案OP2、第一發光元件LED1以及第二發光元件LED2)或四個以上。It should be noted that, in this embodiment, the number of grooves, optical patterns, and light-emitting element LEDs of the transposing unit TU are exemplarily described by taking three as an example. In other words, the transposition unit TU of this embodiment can constitute one display pixel of the
以下將列舉另一些實施例以詳細說明本揭露,其中相同的構件將標示相同的符號,並且省略相同技術內容的說明,省略部分請參考前述實施例,以下不再贅述。Other embodiments will be listed below to describe the disclosure in detail, wherein the same components will be marked with the same symbols, and the description of the same technical content will be omitted. For the omitted parts, please refer to the foregoing embodiments, and will not be repeated hereafter.
圖6是本發明的另一實施例的畫素陣列基板的剖視示意圖。請參照圖6,本實施例的畫素陣列基板11與圖3的畫素陣列基板10的差異在於:畫素陣列基板的組成不同。具體而言,畫素陣列基板11更包括多個光學圖案OP’,且這些光學圖案OP’設置於導光結構層120的多個開口120n內,並覆蓋多個發光元件。在本實施例中,光學圖案OP’可以是彩色濾光圖案(例如是紅色濾光圖案、綠色濾光圖案或藍色濾光圖案),且這些發光元件LED的發光顏色都相同(例如是白色)。然而,本發明不限於此,根據其他實施例,這些發光元件LED的發光顏色為藍色,且光學圖案OP’也可以是波長轉換圖案,用以將發光元件LED發出的藍光轉換為紅光、綠光或黃光。波長轉換圖案的材質可包括螢光材料或量子點材料。在另一未繪示的實施例中,這些光學圖案OP’的材質也可以是具有高折射率的透明樹酯,且這些發光元件LED分別為紅光發光二極體、綠光發光二極體與藍光發光二極體。6 is a schematic cross-sectional view of a pixel array substrate according to another embodiment of the invention. Please refer to FIG. 6, the difference between the
圖7是本發明的又一實施例的畫素陣列基板的俯視示意圖。圖8是圖7的畫素陣列基板的轉置單元的放大示意圖。特別說明的是,為了清楚呈現起見,圖7的轉置單元TU’僅繪示出圖8的支撐結構110A、發光元件LED以及接合電極BE。請參照圖7及圖8,本實施例的畫素陣列基板12與圖1及圖2的畫素陣列基板10的主要差異在於:接合電極的配置方式、轉置單元的排列方式以及光學圖案的配置方式不同。在本實施例中,轉置單元TU’的第一發光元件LED1、第二發光元件LED2與第三發光元件LED3可分別用以顯示紅色、綠色與藍色。也就是說,轉置單元TU’可構成畫素陣列基板12的一個顯示畫素,但本發明不以此為限。FIG. 7 is a schematic top view of a pixel array substrate according to another embodiment of the present invention. FIG. 8 is an enlarged schematic diagram of the transposition unit of the pixel array substrate of FIG. 7. In particular, for the sake of clarity, the transposition unit TU' of FIG. 7 only depicts the
請參照圖7,本實施例的多個轉置單元TU’可沿著方向X排成多個畫素串(或畫素列),例如第一畫素串PR1、第二畫素串PR2、第三畫素串PR3與第四畫素串PR4,且彼此相鄰的兩畫素串的多個轉置單元TU’在方向Y上都相互錯位。舉例來說,排成第一畫素串PR1的多個轉置單元TU’的任一者在垂直於方向X(即方向Y)上錯位於排成第二畫素串PR2的多個轉置單元TU’的任一者,排成第二畫素串PR2的多個轉置單元TU’的任一者在方向Y上錯位於排成第三畫素串PR3的多個轉置單元TU’的任一者,依此類推。Referring to FIG. 7, the multiple transposition units TU' of this embodiment can be arranged in multiple pixel strings (or pixel rows) along the direction X, such as a first pixel string PR1, a second pixel string PR2, and a second pixel string PR2. The third pixel string PR3 and the fourth pixel string PR4, and the multiple transposition units TU' of the two adjacent pixel strings are all misaligned in the direction Y. For example, any one of the plurality of transposition units TU' arranged in the first pixel string PR1 is staggered in the plurality of transpositions arranged in the second pixel string PR2 perpendicular to the direction X (that is, the direction Y) Any one of the units TU', any one of the plurality of transposed units TU' arranged in the second pixel string PR2 is staggered in the direction Y, and the plurality of transposed units TU' arranged in the third pixel string PR3 Any one of, and so on.
更具體地說,沿著方向Y排列且相鄰的兩個轉置單元TU’的多個發光元件LED在方向Y上彼此錯開。據此,可增加顯示畫素的混光效果。然而,本發明不限於此,根據其他實施例,沿著方向X排列且相鄰的兩個轉置單元TU’在方向X上也可彼此錯位。請參照圖8,在本實施例中,轉置單元TU’的多個接合電極BE是鄰設於支撐結構110A的相鄰兩側邊,例如:側邊110e2與側邊110e3,且第一連接電極CE1A、第二連接電極CE2A與第三連接電極CE3A各自朝向支撐結構110A的側邊110e3延伸以電性連接對應的接合電極BE。More specifically, the light emitting element LEDs of the two adjacent transposition units TU' arranged along the direction Y are staggered from each other in the direction Y. Accordingly, the light mixing effect of display pixels can be increased. However, the present invention is not limited to this. According to other embodiments, two adjacent transposing units TU' arranged along the direction X may also be misaligned in the direction X. Referring to FIG. 8, in this embodiment, the multiple bonding electrodes BE of the transposing unit TU' are adjacent to the adjacent two sides of the
值得注意的是,本實施例的轉置單元TU’更包括第四光學圖案OP4,且第四光學圖案OP4是設置在黏著圖案150A與鄰設於支撐結構110A的側邊110e3的接合電極BE之間。在本實施例中,第四光學圖案OP4的配置方式(例如厚度)相似於第三光學圖案OP3或第二光學圖案OP2。因此,詳細的說明請參見前述實施例的相關段落,於此便不再重述。舉例來說,本實施例的第四光學圖案OP4在方向Z上的厚度可等於第三光學圖案OP3在方向Z上的厚度。因此,在轉置單元TU’與電路基板100的接合過程中,可避免黏著圖案150A因支撐結構110A的擠壓而溢流至位於支撐結構110A的側邊110e3與第四光學圖案OP4之間的接合電極BE與連接墊(未繪示)並沾附於接合電極BE與連接墊之間。換句話說,可有效提升轉置單元TU’與電路基板100的接合良率。It is worth noting that the transposition unit TU' of this embodiment further includes a fourth optical pattern OP4, and the fourth optical pattern OP4 is set between the
綜上所述,在本發明的一實施例的畫素陣列基板及其製造方法中,轉置單元的支撐結構具有兩凹槽。透過這兩凹槽與電路基板之間的距離互不相同,可避免夾設於支撐結構與電路基板之間的黏著圖案在轉置單元接合至電路基板的過程中發生溢流,並增加轉置單元與電路基板的黏著穩定性,有助於提升轉置單元的轉移良率。另一方面,為了提升發光元件的出光效率,這兩凹槽內還設有重疊於兩發光元件的兩光學圖案。此外,透過光學圖案的設置,還可有效提升發光元件的轉移良率與製程彈性。In summary, in the pixel array substrate and the manufacturing method thereof according to an embodiment of the present invention, the support structure of the transposing unit has two grooves. The distances between the two grooves and the circuit substrate are different from each other, so that the adhesive pattern sandwiched between the support structure and the circuit substrate can be prevented from overflowing during the process of the transposition unit being joined to the circuit substrate, and the transposition is increased. The adhesion stability between the unit and the circuit substrate helps to improve the transfer yield of the transposed unit. On the other hand, in order to improve the light extraction efficiency of the light emitting element, two optical patterns overlapping the two light emitting elements are also provided in the two grooves. In addition, through the arrangement of the optical pattern, the transfer yield of the light-emitting device and the flexibility of the manufacturing process can be effectively improved.
10、11、12:畫素陣列基板
80:暫時基板
100:電路基板
100s、110s:表面
110、110A:支撐結構
110a:接觸窗
110b1、110b2、110b3:底面
110e1、110e2、110e3:側邊
110r1、110r2、110r3、110r4:凹槽
120:導光結構層
120n:開口
150、150A:黏著圖案
BE:接合電極
BP:連接墊
CE1、CE1A、CE2、CE2A、CE3、CE3A、CE4:連接電極
CS1、CS2:載板結構
d1、d2、d3:距離
dt1、dt2、dt3:深度
E1、E2:電極
LED、LED1、LED2、LED3:發光元件
OP1、OP2、OP3、OP4、OP’:光學圖案
PDL:圖案定義層
PDLr1、PDLr2、PDLr3、PDLr4:凹陷
PR1、PR2、PR3、PR4:畫素串
SL:犧牲層
SLa:開口
t1、t2、t3:厚度
TU、TU’:轉置單元
X、Y、Z:方向
10, 11, 12: pixel array substrate
80: Temporary substrate
100:
圖1是本發明的一實施例的畫素陣列基板的俯視示意圖。 圖2是圖1的畫素陣列基板的轉置單元的放大示意圖。 圖3是圖1的畫素陣列基板的剖視示意圖。 圖4A至圖4J是圖3的畫素陣列基板的製造流程的剖視示意圖。 圖5是本發明的另一實施例的轉置單元的轉移步驟的剖視示意圖。 圖6是本發明的另一實施例的畫素陣列基板的剖視示意圖。 圖7是本發明的又一實施例的畫素陣列基板的俯視示意圖。 圖8是圖7的畫素陣列基板的轉置單元的放大示意圖。 FIG. 1 is a schematic top view of a pixel array substrate according to an embodiment of the invention. FIG. 2 is an enlarged schematic diagram of a transposition unit of the pixel array substrate of FIG. 1. FIG. 3 is a schematic cross-sectional view of the pixel array substrate of FIG. 1. 4A to 4J are schematic cross-sectional views of the manufacturing process of the pixel array substrate of FIG. 3. Fig. 5 is a schematic cross-sectional view of a transfer step of a transposition unit according to another embodiment of the present invention. 6 is a schematic cross-sectional view of a pixel array substrate according to another embodiment of the invention. FIG. 7 is a schematic top view of a pixel array substrate according to another embodiment of the present invention. FIG. 8 is an enlarged schematic diagram of the transposition unit of the pixel array substrate of FIG. 7.
10:畫素陣列基板 10: Pixel array substrate
100:電路基板 100: Circuit board
100s、110s:表面 100s, 110s: surface
110:支撐結構 110: Supporting structure
110b1、110b2、110b3:底面 110b1, 110b2, 110b3: bottom surface
110r1、110r2、110r3、110r4:凹槽 110r1, 110r2, 110r3, 110r4: groove
120:導光結構層 120: Light guide structure layer
120n:開口 120n: opening
150:黏著圖案 150: Adhesive pattern
BE:接合電極 BE: Bonding electrode
BP:連接墊 BP: connection pad
CE1、CE2、CE3:連接電極 CE1, CE2, CE3: Connect the electrodes
d1、d2、d3:距離 d1, d2, d3: distance
E2:電極 E2: Electrode
LED1、LED2、LED3:發光元件 LED1, LED2, LED3: light-emitting elements
OP1、OP2、OP3:光學圖案 OP1, OP2, OP3: Optical pattern
X、Z:方向 X, Z: direction
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TW201929212A (en) * | 2017-12-13 | 2019-07-16 | 友達光電股份有限公司 | Pixel array substrate and manufacturing method thereof |
TW201929191A (en) * | 2017-12-19 | 2019-07-16 | 錼創顯示科技股份有限公司 | Carrier structure and micro device structure |
TWI677975B (en) * | 2018-12-05 | 2019-11-21 | 錼創顯示科技股份有限公司 | Carrier structure and micro device structure |
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