TWI501561B - Digital-to-analog converting device and method thereof - Google Patents

Description

Digital analog conversion device and method

The present invention relates to an apparatus and method, and more particularly to a digital analog conversion apparatus and method.

With the booming of the digital era and the rise of electronic products, digital analog conversion devices are particularly important, and their function is to convert a plurality of received digital signals into an analog signal.

However, the conventional digital analog conversion device cannot overcome the mismatch problem between the component groups in the digital analog conversion device, resulting in a large nonlinear error of the analog signal compared to the ideal analog signal.

Accordingly, a first object of the present invention is to provide a digital analog conversion device that can reduce nonlinear errors.

Thus, the digital analog conversion device of the present invention comprises a correction circuit, a recorder, a transcoding module, and a conversion circuit.

The correction circuit receives a plurality of error signals, and converts the error signals into a plurality of adjustment signals having a digit value, each digit value corresponding to one of the equal error signals, and the magnitude of each error signal It is proportional to the difference between the size of the corresponding analog output and the size of a reference signal.

The recorder is electrically connected to the correction circuit, records each adjustment signal, and outputs each adjustment signal.

The transcoding module receives a digit signal having N bits and re-encodes the digit signal to generate a high-order and low-order output signal having K bits, wherein the high-order and low-order output signals are respectively output. The signal is related to the thermometer code, and N and K are positive integers, N≧2, K≧1.

The conversion circuit is electrically coupled to the correction circuit, receives the high bit, low bit output signal, and the adjustment signals, and performs digital to analog conversion to generate a total analog output.

A second object of the present invention is to provide a digital analog conversion method that reduces nonlinear errors.

The digital analog conversion method is performed by a digital analog conversion device, and the digital analog conversion method includes the following steps: (A) using the digital analog conversion device to convert a plurality of error signals into a plurality of adjustment signals having a digital value, respectively. Each digit value corresponds to one of the equal error signals, the magnitude of each error signal being proportional to the difference between the size of the corresponding analog output and the size of a reference signal; (B) recording by the digital analog conversion device Each adjusting signal and outputting each adjustment signal; (C) receiving, by the digital analog conversion device, a digital signal having N bits and re-encoding the digital signal to generate a K-bit, respectively High bit and low bit output signals, wherein the high bit The meta and low bit output signals are related to the thermometer code, and N and K are positive integers, N≧2, K≧1; and (D) the digital analog conversion device is used to output signals according to the high bit and low bit and the adjustment The signal is digital to analog converted to produce a total analog output.

10‧‧‧ Transcoding module

1‧‧‧Segment coding circuit

11‧‧‧Signal splitter

12‧‧‧Thermal encoder

2‧‧‧ Random value generator

3‧‧‧ Random rotator

4‧‧‧Transition module

41‧‧‧correction circuit

411‧‧‧ comparator

412‧‧‧ counter

42‧‧‧Transition circuit

421‧‧‧current source

422‧‧‧ switch

43‧‧‧Error signal generator

431‧‧‧Switch

432‧‧‧current source

44‧‧‧ Recorder

S1, S2‧‧‧ switch

45‧‧‧resistance

46‧‧‧Control circuit

47‧‧‧High-order current generator

471~473‧‧‧High-order current source

474~476‧‧‧High bit switch

48‧‧‧Low-order current generator

481~483‧‧‧Low-order current source

484~486‧‧‧low level switch

49‧‧‧Correction current generator

491~494‧‧‧correct current source

495~498‧‧‧correction switch

51~55‧‧‧Digital analog conversion steps

DS‧‧‧ digital signal

MS‧‧‧ high bit signal

LS‧‧‧low bit signal

MT‧‧‧High-level thermometer code

LT‧‧‧ low-level thermometer code

MO‧‧‧ high-order output signal

LO‧‧‧ low-order output signal

D1~D4‧‧‧ bits

T1~T6‧‧‧ bits

D1~d6‧‧‧ bits

In, Ip‧‧‧ error signal

Io‧‧‧ analog output

I1~I7‧‧‧ Current

I _M ‧‧‧High bit current

I _L ‧‧‧Low total current

Vout‧‧‧ analog output voltage

Ic‧‧‧Correct total current

Id‧‧‧ bias current

Other features and advantages of the present invention will be apparent from the embodiments of the present invention. FIG. 1 is a circuit diagram illustrating a preferred embodiment of the digital analog conversion device of the present invention; FIG. 2 is a schematic view. The digital signal of the preferred embodiment is divided and encoded into a high bit and low bit output signal; FIG. 3 is a flow chart illustrating the digital analog conversion device of the preferred embodiment performing a digital analog conversion method; 4 is a circuit diagram illustrating the plurality of switching variations of the preferred embodiment.

Referring to FIG. 1 and FIG. 2, a preferred embodiment of the digital analog conversion device of the present invention comprises a transcoding module 10 and a conversion module 4.

The transcoding module 10 includes a division encoding circuit 1, a random value generator 2, and a random rotator 3.

The division encoding circuit 1 receives a digital signal DS having N bits, and divides and encodes the digital signal DS to generate a The K-bit high-order and low-bit thermometer codes MT, LT, and the division encoding circuit 1 includes a signal divider 11 and a thermometer encoder 12.

The signal divider 11 receives the digital signal DS having N bits, and divides the digital signal DS into a high bit signal MS having M bits, and a low bit signal LS having L bits, wherein L, M, and N are positive integers, and N ≧ 2, M, N ≧ 1. In this embodiment, for convenience of explanation, N=4, M=L=2 is taken as an example, but is not limited thereto, and the four bits of the digital signal DS are respectively bits D1~D4, and the high bit signal MS The two bits are respectively bits D3 and D4, and the two bits of the low bit signal LS are bits D1 and D2, respectively. In other embodiments, M=L may be replaced by M≠L (not shown).

The thermometer encoder 12 is electrically connected to the signal divider 11 to receive the high and low bit signals MS, LS, and converts the high and low bit signals MS, LS into a high bit with K bits and Low-order thermometer code MT, LT, where K is a positive integer and K≧1. In this embodiment, K=2 ^M -1=3, and the three bits of the high-order and low-order thermometer codes MT and LT are the bits T4 to T6 and the bits T1 to T3, respectively.

It should be noted that, in this embodiment, since the number of bits in the high-order and low-order signals MS and LS is the same (ie, M=L), the high-order and low-bit thermometer codes MT and LT have K bits, but not limited to this. In other embodiments, the high bit thermometer code has 2 ^M -1 bits when M ≠ L, and the low bit thermometer code has 2 ^L -1 bits.

The random value generator 2 is used to generate a random value.

The random rotator 3 is electrically connected to the random value generator 2 and the Dividing the thermometer encoder 12 of the encoding circuit 1 to receive the random value and the high-order and low-bit thermometer codes MT, LT, and according to the random value, the bits in the high-order and low-order thermometer codes MT, LT The elements are continuously rotated and moved to implement a dynamic matching technique to respectively generate a high bit and low bit output signals MO, LO having K bits, the high bit and low bit output signals MO, LO being related to the thermometer code. In this embodiment, the three bits of the high-order and low-order output signals MO, LO are bits d4 to d6 and bits d1 to d3, respectively.

The conversion module 4 receives the high-order and low-order output signals MO, LO and the adjustment signals, and converts them into an analog output voltage Vout related to the digital signal DS, and the conversion module 4 includes a correction circuit 41. A conversion circuit 42, an error signal generator 43, a recorder 44, two switches S1, S2, a resistor 45, and a control circuit 46.

The correction circuit 41 receives a plurality of error signals In and Ip which are respectively one of a positive value and a negative value current, and converts the error signals In and Ip into a plurality of adjustment signals having a digital value, respectively. Each digit value corresponds to one of the equal error signals, and the correction circuit 41 includes a comparator 411 and a counter 412.

The comparator 411 receives each error signal In, Ip, and compares the magnitude of each error signal In, Ip with a corresponding preset value to determine whether to adjust the logic of a comparison signal generated corresponding thereto. Bits, and each preset value is associated with a corresponding one of the high bit currents.

The counter 412 is electrically connected to the comparator 411 to receive the comparison signals, and according to each of the comparison signals having a high logic level A comparison signal produces the corresponding adjustment signal having the digit value, the digit value being associated with the comparison signal having the high logic level.

The conversion circuit 42 is electrically connected to the correction circuit 41, receives the high bit, low bit output signals MO, LO and the adjustment signals, and performs digital to analog conversion to generate a total analog output or a plurality of analog outputs Io. The total analog output is associated with each analog output Io, the total analog output and each analog output Io is a current output, and the conversion circuit 42 includes a high bit current generator 47, a low bit current generator 48, and a A current generator 49, a current source 421, and a switch 422 are provided.

The high bit current generator 47 receives the high bit output signal MO and generates a high bit total current I _M , and includes a plurality of high bit current sources 471 473 473 and a plurality of high bit switches 474 476 476. The number of high bit current sources and switches 471-476 is proportional to the number of bits in the high bit thermometer code MT. The high-order current sources 471-473 are connected in series with the corresponding high-order bit switches 474-476, and generate corresponding high-order currents I1~I3, and each high-order current I1~I3 The size is smaller than the ideal high-order current, and the high-order switches 471-476 are controlled by the respective corresponding bits in the high-order output signal MO to switch between conduction and non-conduction.

The low bit current generator 48 is connected in parallel to the high bit current generator 48, and receives the low bit output signal LO, and accordingly generates a low bit total current I _L and includes a plurality of low bit current sources 481~483 and A plurality of low bit switches 484~486, the number of the low bit current sources and switches 481~486 being proportional to the number of bits in the low bit thermometer code LT. The low-order current sources 481~483 are connected in series with the corresponding low-order switches 484~486, and respectively generate corresponding low-order currents I4~I6, and each low-order current I4~I6 The size is smaller than the ideal low-order current, and the low-order switches 484-486 are controlled by the corresponding bits in the low-order output signal LO to switch between conduction and non-conduction.

The correction current generator 49 is connected in parallel to the low-order current generator 48, and receives the adjustment signals, and accordingly generates a corrected total current Ic, and includes a plurality of correction current sources 491-494 and a plurality of correction switches 495~ 498. The calibration current sources 491-494 are connected in series with the respective correction switches 495-498 corresponding thereto, and generate respective correction currents I7, and each calibration switch 495~498 is controlled to be turned on and off. Switch between conduction. In this embodiment, the correction current generator 49 includes four correction current sources and correction switches 491 to 498 as an example, but is not limited thereto. Further, the sum of the corrected, high-order and low-order total currents Ic, I _M , and I _L is output as the total analog.

It should be noted that in other embodiments, the current sources 471~473, 481~483, and 491~494 may be replaced by resistors or capacitors.

The current source 421 connected in series is connected in parallel with the switch 422 to the low bit current generator 48. The current source 421 is used to generate a bias current Id, and the switch 422 is controlled to switch between conduction and non-conduction.

The error signal generator 43 is electrically connected to the correction circuit 41 and the conversion circuit 42 to receive the analog output Io, and generates respective error signals In according to the analog output Io and a reference signal Ir. Ip, and the error signal generator 43 includes a switch 431 and a current source 432.

The switch 431 and the current source 432 connected in series are electrically connected between the conversion circuit 42 and the ground, receive the analog output Io, and a common contact thereof is electrically connected to the correction circuit 41 and outputs the error signals In, Ip. The magnitude of each of the error signals In, Ip is proportional to the difference between the magnitude of the corresponding analog output Io and the magnitude of the reference signal Ir. The switch 431 is controlled to switch between conduction and non-conduction, and the current source 432 is configured to generate the reference signal Ir. In this embodiment, the reference signal Ir is a current signal, and the size of the reference signal Ir is equal to twice the magnitude of the ideal high bit current (ie, if the high bit current I1~I3 is an ideal high bit current, then Ir = 2 × I1 = 2 × I2 = 2 × I3), but is not limited thereto.

The switch S1 connected in series and the recorder 44 are electrically connected between the counter 412 of the correction circuit 41 and the correction current generator 49. The switch S1 is controlled to switch between conduction and non-conduction, and the recorder 44 is When the switch S1 is not turned on, each adjustment signal is recorded, and when the switch S2 is turned on, each adjustment signal is output to the correction current generator 49.

The switch S2 connected in series and the resistor 45 are electrically connected between the conversion circuit 42 and the ground to receive the total analog output, and the voltage across the resistor 45 is used as the analog output voltage Vout.

The control circuit 46 is configured to generate a plurality of control signals to control switching of the high-order switches 474-476 and the low-order switches 484-486 of the switches S1, S2, 422, and 431.

The digital analog conversion device performs a digital analog conversion The method, as shown in Figure 3, includes the following steps:

Step 51: The error signals In and Ip are respectively converted into the adjustment signals having the digital values by the correction circuit 41.

Step 52: Each of the adjustment signals is recorded by the recorder 44, and each adjustment signal is output.

Step 53: The digital signal DS is received by the division encoding circuit 1, and the digital signal DS is divided and encoded to generate the high-order and low-order thermometer codes MT, LT.

Step 54: receiving, by the random rotator 3, the high-order and low-order thermometer codes MT, LT, and the random value, and respectively, according to the random value, the bits in the high-order and low-level thermometer codes MT and LT are consecutive The rotation is moved to generate the high-order and low-order output signals MO, LO having K bits, respectively.

Step 55: The high-order, low-bit output signals MO, LO and the adjustment signals are received by the conversion circuit 42 and digital-to-analog conversion is performed to generate the total analog output.

It should be noted that steps 51, 53, and 55 respectively have a plurality of sub-steps (not shown) associated with the comparator 411, the counter 412, the signal divider 11, and the thermometer encoder. 12. The operation of the high bit current generator 47, the low bit current generator 48, and the correction current generator 49 is not repeated.

The following example illustrates how the digital analog conversion device performs the digital analog conversion method.

Referring to Figures 3 and 4, the digital analog conversion device first performs the steps 51, 52 (i.e., a current correction method) to overcome the mismatch between the component groups in the conversion circuit 42 of the digital analog conversion device. . In the current calibration method, the switches S1 and S2 are controlled to be non-conducting by the control circuit 46, and the switches 422 and 431 and the low-order switches 484 to 486 are controlled to be constantly turned on by the control circuit 46. The meta-switches 474-476 are controlled by the control circuit 46 and the correction switches 495-498 are controlled by the counter 412 to switch between conduction and non-conduction. The high-order switch and the correction switches 474-476, 495-498 are initially The status is not conductive. The correction current generator 49 in the conversion circuit 42 performs the current correction method for each of the high bit current sources 471 to 473 in the high bit current generator 47. In this embodiment, for convenience of explanation, the correction current generator 49 performs the current correction method on the high-order current source 471 as an example, and the ideal high-order current has a magnitude of 4 mA, and the size of the reference signal Ir is equal to two. The magnitude of the ideal high bit current (i.e., Ir = 2 x 4 = 8 mA), the sum of the low bit total current I _L and the magnitude of the bias current Id is equal to 4 mA (i.e., I4 + I5 + I6 + Id = 4) The magnitude of each correction current I7 is 0.1 mA, and the high-order current I1 = 3.7 mA, but is not limited thereto.

At this time, the control circuit 46 turns on the high bit switch 474, the analog output Io=I1+I _L +Id=7.7mA, the error signal In=Io-Ir=7.7-8=-0.3, the error signal In The size of the comparison signal is smaller than the corresponding preset value (eg, -0.1), so the comparator adjusts the logic level of the comparison signal generated by the comparator to a high logic level to adjust the digital value of the adjustment signal. The calibration switch 495 is turned on, and the total current Ic=I7=0.1, the analog output Io=I1+I _L +Id+Ic=7.8mA, and the updated error signal In=Io-Ir=7.8- 8=-0.2, since the updated error signal In is still less than the preset value, the above operation is repeated, so that the correction switches 495, 496 are all turned on, so that the updated error signal In is equal to the preset value. The calibrator 44 is used to record the adjustment signal. Briefly, due to the initial error signal In=-0.3, in order to make the updated error signal In=-0.1, the comparator 411 adjusts the logic level of the comparison signal to the high logic level by 2 times. The counter 412 is caused to increase the digital value of the adjustment signal by two according to the comparison signal, so that the correction switches 495, 496 in the correction current generator 49 are turned on, and the adjustment signal is recorded in the recorder 44. in.

It should be noted that, in this embodiment, the preset value is preset to be -0.1, but is not limited thereto, and the preset value is related to each corresponding high-order current I1~I3, and adjacent two The preset value corresponding to each of the high bit currents is one big and one small.

Referring to FIGS. 1 to 3, the digital analog conversion device performs the steps 53-55 of the digital analog conversion method, and the switches 422 and 431 are controlled by the control circuit 46 to be non-conductive. The switches S1 and S2 are subjected to The control circuit 46 controls the constant conduction. The high-order switch 474-476 and the low-order switches 484-486 are respectively controlled by the corresponding bits of the high-order and low-order output signals MO and LO. Switching between conduction and non-conduction, the correction switches 495-498 are controlled by the recorder 44 to switch between conduction and non-conduction.

At this time, the signal divider 11 divides the digital signal DS having four (N=4) bits into the high bit signal MS having two (M=2) bits, and the pair has two (L= 2) low bit signal LS of one bit, the thermometer encoder 12 then converts the high bit and low bit signals MS, LS into high bits having three (K=2 ^M -1=3) bits, respectively. And the low-order thermometer code MT, LT, and then the random rotator 3 continuously rotates the bits in the high-order and low-level thermometer codes MT and LT according to the random value received by the random rotator 3 to respectively generate the High and low bit output signals MO, LO. For example, in this embodiment, the random rotator 3 continuously rotates the bits in the high-order and low-order thermometer codes MT, LT to the right by 2 steps (see FIG. 2, and the parameter R2 indicates rightward). Rotating movement 2nd order), but not limited thereto, causing the bits d4, d5, d6 in the high-order output signal MO to correspond to the bits T6, T4, T5 of the high-order thermometer code MT, respectively, the low position The bits d1, d2, d3 in the meta-output signal LO correspond to the bits T3, T1, T2 in the low-order thermometer code LT, respectively.

Finally, the high-order, low-order and correction current generators 47, 48, 49 receive the high-order, low-bit output signals MO, LO and the adjustment signals, respectively, and the high-order switches 474-476 and the low-order bits The meta-switches 484-486 are controlled to be turned on or off by the corresponding ones of the high-order and low-order output signals MO, LO, and the correction current generator 49 determines the conduction according to the adjustment signals. These correction switches 495~498 are used to generate the total analog output.

For example, each of the high-order switches 474-476 is turned on or off according to the corresponding bit elements d4~d6 in the corresponding high-order output signal MO, and each of the low-order switches 484-486 is corresponding to each The bits d1~d3 in the low bit output signal LO are turned on or off, if the bits d4~d6 in the high bit output signal MO are 1, 0, 0 respectively, and the low bit output signal When the bits d1 to d3 in the LO are 1, 1, and 0, respectively, the high-order switches 475 and 476 are not turned on, the high-order switch 474 is turned on, and the low-order switches 484 and 485 are turned on, and the low bits are turned on. The switch 495 is not turned on, and the correction switches 495-498 turn on the two correction switches 495, 496 according to one of the adjustment signals when the high-order switch 474 is turned on. At this time, I _M =I1, I _L = I4 + I5, Ic = 2 × (I7), the total analog output = I _M + I _L + Ic = I1 + I4 + I5 + 2 × (I7).

It should be noted that in other embodiments, a plurality of correction current generators 49 may be substituted for the recorders 44, and when the corresponding high-order bit switches 474-476 are turned on, respectively, corresponding to the corresponding ones. Correct the total current Ic.

In summary, the above embodiment has the following advantages:

1. Smaller nonlinearity errors. When the high-order switch 474-476 is turned on, the digital analog conversion device generates the corresponding corrected total current Ic by the correction current generator 49 to overcome the difference between the component groups in the conventional digital analog conversion device. The mismatch problem causes the analog output voltage Vout to have a smaller nonlinear error than the ideal analog output voltage.

2. The cost is lower. When the high-order analog switch 474-476 is turned on, the digital analog converter generates the corresponding corrected total current Ic by the correction current generator 49, and the high-order and low-order thermometer codes MT and LT are used. The bits are continuously rotated and moved to implement a dynamic matching technique, resulting in a smaller area required to implement the digital analog conversion device. The cost of the digital analog conversion device is low.

The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, that is, the simple equivalent changes and modifications made by the patent application scope and patent specification content of the present invention, All remain within the scope of the invention patent.

10‧‧‧ Transcoding module

474~476‧‧‧High bit switch

1‧‧‧Segment coding circuit

48‧‧‧Low-order current generator

11‧‧‧Signal splitter

481~483‧‧‧Low-order current source

12‧‧‧Thermal encoder

484~486‧‧‧low level switch

2‧‧‧ Random value generator

49‧‧‧Correction current generator

3‧‧‧ Random rotator

491~494‧‧‧correct current source

4‧‧‧Transition module

495~498‧‧‧correction switch

41‧‧‧correction circuit

DS‧‧‧ digital signal

411‧‧‧ comparator

MS‧‧‧ high bit signal

412‧‧‧ counter

LS‧‧‧low bit signal

42‧‧‧Transition circuit

MT‧‧‧High-level thermometer code

421‧‧‧current source

LT‧‧‧ low-level thermometer code

422‧‧‧ switch

MO‧‧‧ high-order output signal

43‧‧‧Error signal generator

LO‧‧‧ low-order output signal

431‧‧‧Switch

432‧‧‧current source

In, Ip‧‧‧ error signal

44‧‧‧ Recorder

Io‧‧‧ analog output

S1, S2‧‧‧ switch

I1~I7‧‧‧ Current

45‧‧‧resistance

I _M ‧‧‧High bit current

46‧‧‧Control circuit

I _L ‧‧‧Low total current

47‧‧‧High-order current generator

Id‧‧‧ bias current

471~473‧‧‧High-order current source

Ic‧‧‧Correct total current

Vout‧‧‧ analog output voltage

Claims (10)

A digital analog conversion device includes: a correction circuit that receives a plurality of error signals and converts the error signals into a plurality of adjustment signals having a digit value, each digit value corresponding to one of the equal error signals The magnitude of each error signal is proportional to the difference between the size of the corresponding analog output and the size of a reference signal; a recorder electrically connecting the correction circuit, recording each adjustment signal, and outputting each adjustment signal; a transcoding module receives a digit signal having N bits and re-encodes the digit signal to generate a high bit and a low bit output signal having K bits, wherein the high bit and the low bit The output signal is related to the thermometer code, and N and K are positive integers, N≧2, K≧1; and a conversion circuit electrically connected to the correction circuit, receiving the high bit, low bit output signal and the adjustment signals, and A digital to analog conversion is performed to produce a total analog output. The digital analog conversion device of claim 1, wherein the correction circuit comprises: a comparator that receives each error signal and compares the magnitude of each error signal with a corresponding preset value to determine Whether to adjust the logic level of a comparison signal generated corresponding thereto, and each preset value is related to a corresponding one of the high bit currents; and a counter electrically connected to the comparator to receive the comparison signals, And generating, according to each of the comparison signals having a high logic level, the adjustment signal having the digit value, the digit value being related to the comparison signals having the high logic level. The digital analog conversion device of claim 2, wherein the conversion circuit comprises: a high bit current generator, receiving the high bit output signal, and generating a high bit total current; a low bit current generator, Connecting the high bit current generator in parallel, and receiving the low bit output signal, and generating a low bit total current; and a correction current generator, connecting the low bit current generator in parallel, and receiving the adjustment signal, And generating a corrected total current; wherein the sum of the high bit, the low bit, and the corrected total current is output as the total analog. The digital analog conversion device of claim 3, wherein the high bit current generator comprises a plurality of high bit current sources, each analog output being positively correlated with a current level of the corresponding high bit current source. The digital analog conversion device of claim 1, wherein the transcoding module comprises: a division coding circuit, receiving the digital signal having N bits, and dividing and encoding the digital signal to generate a a high bit and low bit thermometer code of K bits; and a random rotator electrically connected to the split coding circuit, receiving the high bit and low bit thermometer code, and a random value, and according to the random value The bits in the high-order and low-level thermometer codes are continuously rotated and moved to generate the high-order and low-order output signals having K bits, respectively. The digital analog conversion device of claim 5, wherein the split coding circuit comprises: a signal splitter, receiving the digital signal, and dividing the digital signal into a high bit and a low bit signal having a plurality of bits; And a thermometer type encoder electrically connected to the signal splitter to receive the high bit and low bit signals, and convert the high bit and low bit signals into the high bit and low bit thermometer codes respectively. A digital analog conversion method is performed by a digital analog conversion device, and the digital analog conversion method comprises the following steps: (A) converting the plurality of error signals into a plurality of adjustments having a digital value by using the digital analog conversion device. a signal, each digit value corresponding to one of the equal error signals, the magnitude of each error signal being proportional to the difference between the size of the corresponding analog output and the size of a reference signal; (B) using the digital analog conversion device Recording each adjustment signal and outputting each adjustment signal; (C) receiving a digital signal having N bits by using the digital analog conversion device, and re-encoding the digital signal to generate one K-bit, respectively High bit and low bit output signals, wherein the high bit and low bit output signals are related to the thermometer code, and N and K are positive integers, N ≧ 2, K ≧ 1; (D) using the digital analog conversion device to perform digital to analog conversion based on the high bit, low bit output signal, and the adjustment signals to produce a total analog output. The digital analog conversion method according to claim 7, wherein the step (A) comprises the following substeps: (A1) comparing the size of each error signal with a corresponding preset value by using the digital analog conversion device Determining whether to adjust the logic level of a comparison signal generated corresponding thereto, and each preset value is related to a corresponding one of the high bit currents; and (A2) using the digital analog conversion device according to the comparison signals Each comparison signal having a high logic level produces a corresponding adjustment signal having the digital value associated with the comparison signal having the high logic level. The digital analog conversion method according to claim 8, wherein the step (C) comprises the following substeps: (C1) dividing and encoding the digital signal by using the digital analog conversion device to generate a K bit. a high-order and low-order thermometer code; and (C2) using the digital analog conversion device to continuously rotate the bits in the high-order and low-level thermometer codes according to a random value to respectively generate the K-bits High bit and low bit output signals. The digital analog conversion method of claim 9, wherein the sub-step (C1) comprises the following sub-steps: (C11) using the digital analog conversion device to divide the digital signal into a high bit and a low bit signal having a plurality of bits; and (C12) converting the high bit and the low bit signal into the same by using the digital analog conversion device High bit and low bit thermometer code.