TWI426381B - Apparatus and method for testing an embedded system - Google Patents

Description

Embedded system test device and method

The present invention relates to a technique for testing an embedded system, and more particularly to a test apparatus and method for an embedded system.

Today's companies guarantee that product quality is an important part of corporate activities. In order to improve and ensure the quality of products, companies must conduct tests on products to obtain quality information about the products and their manufacturing processes. Based on this information, control the manufacturing process of the products, such as correction and compensation activities, to minimize waste and repair rates. To the extent that the stability of the product quality formation process and the consistency of the products produced are ultimately guaranteed.

It is well known that when testing in an embedded system, the test results are obtained and displayed. Usually, a personal computer is connected to the embedded system to communicate between the personal computer and the embedded system, and the result of the test is tested. Displayed on a personal computer, that is, a personal computer acts as a human-machine interface. However, since the personal computer not only takes too long to detect (it takes a certain time to start the personal computer only), and the cost for purchasing the personal computer is relatively high, the space requirement for the erection machine is also large, which is time consuming and costly. Test costs increase.

In view of the above, it is necessary to provide a test device and method for an embedded system, and the user can perform the test of the embedded system without using a personal computer as a human-machine interface. The structure is simple, the space is small, the test method is simple and convenient, and the test cost is low.

A test device for an embedded system that is coupled to an embedded system for testing the functionality of the embedded system. The test device includes a read/write unit, a serial bus interface, a general-purpose input/output chip, a programmable chip, a storage unit, a segment display, and an LED display. The read/write unit is coupled to a general purpose input and output chip for writing test parameters into a general purpose input and output chip. The serial bus interface is connected to the embedded system for transmitting the test signal and the test result code between the test device and the embedded system. The universal input and output chip is configured to save the test parameter and the test result code. The programmable chip is connected to the general-purpose input and output chip, and is configured to read the corresponding test analysis information in the storage unit according to the test result code. The segment display is coupled to a general purpose input and output chip for displaying test parameters and test result codes in real time. The LED display is coupled to the programmable chip for displaying test analysis information that the programmable wafer reads from the storage unit according to the test result code.

A test method for an embedded system, using the test device to test the function of the embedded system. The test device includes a serial bus interface, a general purpose input and output chip, a programmable chip, a storage unit, a segment display, and an LED display. The method comprises the steps of: storing pre-defined test analysis information in a storage unit; receiving test parameters of a test embedded system set by a user, and writing the test parameters into a general-purpose input and output chip; the embedded system generates the read Test signal of the test parameters in the general-purpose input and output chip; determine whether it is necessary to convert the test signal sent by the embedded system into a read signal compatible with the universal input/output chip according to the interface type of the serial bus interface; if the test signal does not need to be signaled Conversion, according to the test signal The embedded system is tested by reading the test parameters from the general-purpose input and output chip, and the generated test result code is written into the general-purpose input/output chip; if the test signal needs to be converted, the test signal is converted into a general-purpose input/output wafer phase. Read the signal, read the test parameters from the general-purpose input and output chip according to the read signal, test the embedded system, convert the generated test result code into a common input and output chip compatible data format, and write it The general input/output chip drives the display of the test result code; the programmable chip reads the corresponding test analysis information from the storage unit according to the test result code, and drives the LED display to display the test analysis information.

Compared with the prior art, the embedded system test method uses the embedded test device to obtain the test result code of the embedded system to be tested, and displays the test result code and the corresponding test analysis information, and the user can display The test results that come out are the test results of the embedded system. The embedded test device has the advantages of simple and convenient structure, small occupied space, and greatly reduced test cost.

1‧‧‧Testing device

10‧‧‧Reading unit

11‧‧‧Sorted bus interface

12‧‧‧GPIO Chip

13‧‧‧Signal Converter

14‧‧‧Programmable IC

15‧‧‧ storage unit

16‧‧‧section display

17‧‧‧LED display

2‧‧‧ embedded system

1 is a hardware architecture diagram of a preferred embodiment of a test apparatus for an embedded system of the present invention.

2 is a flow chart of a preferred embodiment of the method for testing an embedded system using the test apparatus of FIG.

As shown in FIG. 1, it is a hardware architecture diagram of a preferred embodiment of the test apparatus 1 of the embedded system of the present invention. The test device 1 includes a read/write unit 10, a serial bus interface 11 , a general purpose input output (GPIO) chip 12 , a signal converter 13 , a programmable IC 14 , and a storage unit 15 . Two segment displays 16 and an LED display 17. In this embodiment, the The test device 1 is connected to the embedded system 2 by a serial bus interface 11, which may be an embedded computer system or other embedded electronic device. In the test device 1, the serial bus interface 11 is connected to a signal converter 13, and the read/write unit 10, the signal converter 13, the programmable chip 14 and the segment display 16 are respectively connected to the GPIO chip 12. The storage unit 15 and the LED display 17 are respectively connected to the programmable chip 14.

The read/write unit 10 is used to write test parameters into the GPIO wafer 12. The test parameters include testing a specific test project of the embedded system and initial state of the test. The read/write unit 10 can be a single chip microcomputer, and can be any other suitable data processing device. In the preferred embodiment, the read/write unit 10 is a single chip microcomputer.

The serial bus interface 11 is used for transmitting test signals and test result codes between the test device 1 and the embedded system 2. The serial bus interface 11 generally has the following types of interfaces: Universal Serial Bus (USB), Inter-Integrated Circuit (I ² C), and system management bus interface ( System Management Bus (SMBus) and Universal Asynchronous Receiver/Transmitter (UART). Since each of the serial bus interfaces 11 has a certain range of application, the serial bus interface 11 of one or more of the above various types of interfaces can be installed in the testing device 1 to meet various testing needs.

The GPIO chip 12 is used to store the test parameters written by the read/write unit 10 and the test result code returned by the embedded system 2, and drive the two segment displays 16 to display the test result code returned by the embedded system 2. The test parameters and test result codes are stored in one of the GPIO wafers 12 electrically erasable programmable read-only memory (Electrically In Erasable Programmable Read Only Memory (EEPROM), the test parameters and test result codes are usually specific identifiers. Specifically, for example, the identifier "1" indicates that the hard disk of the embedded system 2 is tested, "01" indicates that the test is started, and the embedded system 2 reads the above test parameters to enter the hard disk test state. After the embedded system 2 completes the test, the test result code is written to the GPIO wafer 12 by the serial bus interface 11 and the signal converter 13. In this embodiment, the test result code "FF" is defined as the embedded system 2 test succeeds, and the test result code "FE" is defined as the embedded system 2 test failure. For example, if the embedded system 2 is successfully tested, the test result code is "FF" written to the GPIO chip 12 to indicate that the embedded system 2 is successfully tested; if the embedded system 2 is not successfully tested, the test result code is "FE" "Write to GPIO chip 12 to indicate that embedded system 2 failed.

The signal converter 13 is configured to determine whether the test signal sent by the embedded system 2 needs to be converted into a GPIO chip 12 compatible read signal to read the GPIO chip 12 according to different interface types of the serial bus interface 11 The test parameters, and when the embedded system 2 test is completed, the test result code is converted into a GPIO chip 12 compatible data format. Specifically, if the test device 1 and the embedded system 2 are connected by a USB interface or a UART interface, signal conversion by the signal converter 13 is required, if the test device 1 and the embedded system 2 are by I ² C The interface or SMBUS interface connection eliminates the need for signal conversion by the signal converter 13.

The programmable chip 14 is configured to read corresponding test analysis information from the storage unit 15 according to the test result code, and drive the LED display 17 to display the read test analysis information. The storage unit 15 is configured to store test analysis information predefined by the user, and the test analysis information is in one-to-one correspondence with the test result code. For example, if the test result code is "FF", the test analysis information displayed by the LED display 17 is The hard disk test of the embedded system 2 is successful; if the test result code is "FE", the test analysis information displayed by the LED display 17 is a hard disk test failure of the embedded system 2.

The segment display 16 is coupled to the GPIO die 12 for instant display of test parameters on the GPIO die 12 and test result codes returned by the embedded system 2. For example, when the user selects to test the hard disk of the embedded system 2, the test parameter of the segment display 16 starts to be displayed as "01". When the test ends, the segment display 16 displays the test result code as "FE" or "FF".

The LED display 17 is used to display the test analysis information read by the programmable chip 14 from the storage unit 15 according to the test result code. For example, when the segment display 16 displays the test result code as "FF", the test analysis information displayed by the LED display 17 is successful for the hard disk test of the embedded system 2.

The embedded system 2 is configured to generate a test signal for reading test parameters in the GPIO chip 12, read test parameters on the GPIO chip 12 according to the test signal, and start the BOOT program to perform a POST test according to the test parameters. After the embedded system 2 completes the test, the generated test result code is transmitted to the test device 1 through the serial bus interface 11 .

As shown in FIG. 2, a flow chart of a preferred embodiment of the method for testing the embedded system 2 using the test apparatus 1 of FIG.

In step S20, the user stores the pre-defined test analysis information in the storage unit 15 by the reading and writing unit 10. The test analysis information is in one-to-one correspondence with the test result code. For example, the test result code corresponding to the test result code "FF" is the hard disk test of the embedded system 2, and the test result code is "FE" corresponding to the analysis information for the embedded system 2 hard disk test failure.

In step S21, the reading and writing unit 10 receives the test parameters of the test embedded system 2 set by the user, and writes the test parameters into the GPIO wafer 12. The test parameters include the specific project of the test, the initial state of the test, and the test parameters are usually some specific identifiers. For example, the identifier "1" indicates a test hard disk, and "01" indicates that the test is started. When the embedded system 2 reads the above test parameters from the GPIO wafer 12, the embedded system 2 starts testing the hard disk.

In step S22, the embedded system 2 generates a test signal for reading the test parameters in the GPIO chip 12, and transmits the test signal to the test device 1 through the serial bus interface 11 .

In step S23, the signal converter 14 determines whether it is necessary to convert the test signal sent by the embedded system 2 into a read signal compatible with the GPIO chip 12 according to the interface type of the serial bus interface 11 . Specifically, if the test apparatus 1 and the system 2 by an embedded system with USB interface or UART interface connector, is required by the signal converter 13 for converting the signal, if the test apparatus 1 and the system 2 embedded system by I ² C The interface or SMBUS interface connection eliminates the need for signal conversion by the signal converter 13.

In step S24, if the test signal does not need to be converted, the read/write unit 10 reads the test parameters from the GPIO chip 12 according to the test signal, starts the BOOT program to perform a POST test according to the test parameter, and generates a corresponding test result code. In step S25, the embedded system 2 writes the test result code to the GPIO wafer 12 of the test device 1 through the serial bus interface 11 .

In step S26, if the test signal needs to be converted, the signal converter 14 converts the test signal into a read signal compatible with the GPIO chip 12 to read the test parameters on the GPIO wafer 12. Step S27, the reading and writing unit 10 reads the test parameters from the GPIO chip 12 according to the converted read signal, starts the BOOT program to perform the POST test according to the test parameter, and transmits the generated test result code by the serial bus interface 11 To test device 1. In step S28, the signal converter 14 converts the test result code into a data format compatible with the GPIO chip 12 and writes it to the GPIO wafer 12.

In step S29, the GPIO chip 12 drives the segment display 16 to instantly display the test result code returned by the embedded system 2. Specifically, the information displayed by the display device 2 is symbol information corresponding to the test result code, for example, the drive segment display 16 displays the symbol "FF" or "FE" and the like.

In step S30, the programmable chip 14 is configured to read the corresponding test analysis information from the storage unit 15 according to the test result code, and drive the LED display 17 to display the test analysis information. For example, if the test result code is "FF", the LED display 17 indicates that the hard disk test of the embedded system 2 is successful; if the test result code is "FE", the LED display 17 displays that the hard disk test of the embedded system 2 has failed.

The above is only the preferred embodiment of the present invention, and has been used in a wide range of applications. Any other equivalent changes or modifications which are not departing from the spirit of the present invention should be included in the following claims. Inside.

1‧‧‧Testing device

10‧‧‧Reading unit

11‧‧‧Sorted bus interface

12‧‧‧GPIO Chip

13‧‧‧Signal Converter

14‧‧‧Programmable IC

15‧‧‧ storage unit

16‧‧‧section display

17‧‧‧LED display

2‧‧‧ embedded system

Claims (9)

A test device for an embedded system, the test device being connected to an embedded system for testing functions of an embedded system, the test device comprising a read/write unit, a serial bus interface, a general-purpose input/output chip, a programmable chip, a storage unit, a segment display, and an LED display, wherein: the read/write unit is connected to a general-purpose input/output chip for writing test parameters into a general-purpose input/output chip; the serial bus interface and the embedded system a connection for transmitting a test signal and a test result code between the test device and the embedded system; the universal input and output chip for storing the test parameter and the test result code; the programmable chip and the universal An input-output wafer connection for reading corresponding test analysis information from the storage unit according to the test result code; the segment display is connected to the general-purpose input/output chip for displaying the test parameter and the test result code in real time; The LED display is connected to the programmable chip for displaying the programmable chip according to the test result code The storage unit reads the test information parsed. The test device of the embedded system according to claim 1, wherein the test device further comprises a signal converter, wherein the signal converter is connected to the universal input/output chip, and is configured to determine whether the interface type of the serial bus interface is based on The test signal from the embedded system needs to be converted into a read signal compatible with the general input and output chip. The test device of the embedded system of claim 2, wherein the signal converter is further configured to: when the test signal sent by the embedded system needs to be converted, according to the interface of the serial bus interface Type converts the test signal into a universal I/O chip compatible The read signal and the test result code are converted into a data format compatible with the general input and output chip. The test device of the embedded system of claim 1, wherein the storage unit is configured to store user-defined test analysis information, and the test analysis information and the test result code are in one-to-one correspondence. The testing device of the embedded system according to claim 1, wherein the serial bus interface is a universal serial bus interface, an internal integrated circuit bus, a system management bus interface or a general non- Synchronous receive/send serial interface. The test device of the embedded system according to claim 1, wherein the test parameters include a test project for testing the embedded system and an initial state. A test method for an embedded system, which uses a test device to test the functions of an embedded system, the test device comprising a read/write unit, a serial bus interface, a general-purpose input/output chip, a signal converter, a programmable chip, a storage unit, The segment display and the LED display comprise the following steps: the read/write unit stores the predefined test analysis information in the storage unit; the read/write unit receives the test parameter of the test embedded system set by the user, and writes the test parameter. Into the general-purpose input and output chip; the embedded system generates a test signal for reading the test parameters in the general-purpose input and output chip; the signal converter determines whether it is necessary to convert the test signal sent by the embedded system into a general-purpose according to the interface type of the serial bus interface The input/output chip is compatible with the read signal; if the signal converter determines that the test signal does not need to be converted, the read/write unit tests the embedded system according to the test signal from the general input/output chip, and the embedded system is embedded. The test result code generated by the system is written to the general input. A wafer; signal converter determines if the test signal needs to signal conversion, the signal converter converts the test signal input into a common output signal compatible with the wafer read, write signal according to the reading unit The embedded system is tested by reading the test parameters from the general-purpose input and output chip, converting the test result code generated by the embedded system into a data format compatible with the general input and output chip, and writing it to the general-purpose input and output chip; Outputting a test result code displayed on the chip drive section display; and the programmable chip reads the corresponding test analysis information from the storage unit according to the test result code, and drives the LED display to display the test analysis information. The method for testing an embedded system according to claim 7, wherein the serial bus interface is a universal serial bus interface, an internal integrated circuit bus, a system management bus interface, or a general non- Synchronous receive/send serial interface. The test method of the embedded system according to claim 7, wherein the test parameters include a test project for testing the embedded system and an initial state.