TWI354433B - Switching regulators and slope compensation method - Google Patents

Description

1354433 - IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to DC voltage conversion, and more particularly to a switching voltage regulator having oblique _ rate compensation and a slope compensation method thereof. [Prior Art] 'Battery life is a very important consideration in portable electronic systems, especially for consumer electronics such as mobile phones, digital cameras, portable computers and other handheld devices. It is an indisputable fact. Designers of these products must face the ever-increasing demand for product size (and battery size) while increasing battery life to match or exceed competitors' products. In order to make battery life longer, it must optimize the performance of many different electronic components. The most important of these electronic components is the voltage regulator. In portable electronic systems, voltage regulators are used to perform some power processing tasks such as boost, buck, and transformer. ® Figure 1 is a voltage-controlled switching voltage regulator that converts a high DC voltage into a DC low voltage. The advantage of the voltage-controlled type is that it is easy to analyze and has a large triangular wave that provides good noise immunity. However, for transient response, any changes in the line or load must be detected by the feedback resistor divider before it is modulated by the error amplifier and pulse width (PWM). The generator reacts, so the reaction speed will be slower. Furthermore, since the output LC network will have a complex O758-A32295TWF; MTKI-06-182; dennis 5 complex-pole pair and the loop gain will vary with the input voltage, the loop compensation design is Very complicated. SUMMARY OF THE INVENTION The present invention provides a switching voltage regulator comprising an inductor coupled to a load; a pulse width modulation (PWM) unit, including: a stepped pulse width modulation unit - pulse width modulation drive signal 'to control the output, the stage, so that the inductor is transmitted - the inductor current is assigned to the load; and - the slope compensation unit is used to determine the slope of one of the compensation slopes according to the inductor current ^ The compensation signal is applied to the pulse width modulation single 7G, wherein the compensation slope is proportional to the falling slope of one of the inductor current signals. The invention also provides a slope compensation method for a switching voltage regulator, comprising: detecting a rising slope of an inductor current 彳 § of a pulse width modulation unit flowing to a load; detecting a pulse width modulation unit Generating a pulse width modulation driving signal for a duty cycle; adjusting a duty cycle of the driving signal and a rising slope of the inductor current signal according to the pulse width to generate a slope compensation signal having a compensation slope, wherein the compensation slope is The slope is proportional to a falling slope of the current and current signals; and the pulse width modulation unit is controlled according to the slope compensation signal. The present invention also provides a switching voltage regulator comprising an inductor coupled to a load; a slope compensation unit coupled to the inductor for modulating a duty cycle of the drive signal and flowing through the inductor according to a pulse width One rising slope of the inductor current signal, obtaining the inductor current signal 0758-A32295TWF; MTKI-06-182; dennis 6 1354433

a falling slope and generating a slope compensation signal having a compensation slope, wherein the compensation slope is proportional to the falling slope of the inductor current signal. A current detecting unit for detecting the inductor current signal, generating a sense of The current signal is proportional to the current detection signal to the slope compensation early; a pulse width modulation unit includes a comparator coupled to the current detection ^, the slope compensation signal and the feedback signal, and at least one round The output voltage is used to output a pulse width modulation drive signal to the inductor; and a feedback 単it '(4) is between the comparator and the inductor for generating back according to the output voltage of the switching voltage regulator Grant a signal. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following description of the preferred embodiments of the 】 — The figure shows one of the current controlled switching voltage regulators. Such as:: shows 'In addition to the feedback voltage, the continuous inductor power two: is given to the control loop, and the inductor current signal IL is wrong two-two-angle signal. When comparing the inductor current signal 1L with the error, in order to control a _ drive signal will be produced by the humming sound, and the fine ^ output will be turned on and off. In addition, in order to increase the "cry = compensation signal will be combined with the inductor current signal in the river, or by the error amplification of the output signal. Tian, because of =: output data related to the inductor current signal will be returned ° The speed of a should be 758-Α32295ΤΨΡ than the transient change of the input voltage; ΜΤΚΙ.〇6-182;de] 7 1354433 *fast. Moreover, the signal of the error amplifier is the indicator of the inductor current signal. Therefore, in the current-controlled voltage regulator, the current shunt can be regarded as a voltage-controlled current source, so the inductor pole will be eliminated. Therefore, the compensation of the loop is easier than that of the voltage-controlled switching voltage regulator. In addition, since the comparator-level turn-in signal is a current signal, the current-controlled switching type dust regulator will implicitly contain a pulse followed by a pulse current limit. Figure 3 is a current control type. The switching voltage regulator controls the control loop wave at one of the steady state > as shown in the figure, the level Ve on the line is the input of the error amplifier (EA). The outgoing signal 'and the solid-line triangular wave is the feedback inductor current signal IL. When the PWM output stage is turned on (on), the voltage across the inductor l〇 is positive' and the current-current signal IL increases. When the inductor current signal IL When equal to the output signal of the error amplifier (EA), the comparator will change the polarity at its output, so that the PWM wheel is turned off, and the voltage across the inductor > L0 will become negative, so the inductor current signal il will decrease. Until the next turn-on signal of the PWM output stage occurs again. If there is a small perturbation on the inductor current signal IL (for example, the current variable 10 shown in Figure 3), the dotted triangle wave will become the inductor. The path of the current signal IL (proceeding waveform). As shown in Figure 3, the PWM duty cycle (D) will be less than 0.5, so the disturbance will gradually disappear and return to steady state again. However, if steady state The duty cycle (D) is greater than 〇.5 (as shown in Figure 4) 0758-A32295TWF; MTKI-06-182; dennis 8 1354433 Just the disturbance generated in the first cycle will be cycled Cycle (by-cyde) is amplified, so the loop (1, will = (emerge). In order to overcome this point, the inductor current signal can be added to the compensation rate wave. ', oblique 5 The waveform of the compensation signal sc is taken as the rate of the output signal in the error amplifier. As shown, ml and (10) are the rising slope and falling slope of the inductor current signal IL. Obviously, the period (:) is greater than 〇.5. In steady state, the disturbance will still be lost after a few weeks. So what is currently done is to measure the degree of slope compensation to be added. First, according to the error Α | § output and the inductor current signal iavgi~iav (7) shown in Figure 6 = = = the output of the erroneous amplifier can only define the peak value of the inductor current L 而非 instead of the average value. When the error amplifier is used, the average value of the inductor current signal can also be defined by the duty cycle (the relationship between the output voltage and the input voltage). Therefore, a ^^^fr^S0lnetransie^ will generate a response to reach another new steady state. Fig. 7 shows a slope with a compensating waveform of the negative mussel slanting m, where m is the decreasing slope (10) of the inductor current signal. Then in the I cycle (〇~D, the disturbance will be eliminated, and the error is period: off "V" will indicate the average value of the inductor current signal and the operation = off. Since the output signal of the error amplifier does not need to be changed, Work, the loop will show the desired linear transient response (1) ... face price response. Figure 8 shows a slope with compensation slope function 0758-A32295TWF; MTKI-〇6-I82; dennis 1354433 4 Bayer waveform' where m is equal to the falling slope m2 of the inductor current signal. For example, if the disturbance occurs at the rising edge of the inductor current signal, it will be eliminated within one working cycle and at the same time have the ability to report noise. machine

“,,: However, the slope compensation technique described above uses the information of the falling slope m2 of the inductor current ^IL. However, it is difficult to detect by the physical two-way, especially in highly integrated The switching voltage is adjusted. However, there is a relative relationship between the rising slope ml of the inductor current signal IL and the falling slope m2. Therefore, the rising slope of some measured inductor current signals indirectly derives its = rate. And to generate a slope compensation signal. Suppose the buck regulator (10) converter shown in Figure 1 or Figure 2 will have a steady-state pwM duty cycle (d), so the input voltage Vm and the output voltage v〇 The relationship between ut can be expressed as the sender's assumption that the rising slope and the falling slope of the inductor current signal are respectively ml and m2 ', then the ratio relationship can be expressed as taste = & if the inductor current signal IL is obtained The second rate m of the duty cycle DI can be separated from the slope compensation technique (4) the falling slope) m2. The table in Fig. 9 shows a series of values of 0 under different duty cycle D values. 10 is the current System type switching voltage regulator embodiment. 1〇〇 switching voltage regulator system #

^ . 1 T straw is obtained by the rising slope of the inductor current signal IL and the duty cycle D, and the falling slope m2 is obtained, and 0758-A32295TWF; MTKI-〇6-182; dennis 1354433 • is used for slope compensation. As shown, the switching voltage regulator 100 includes a pulse width modulation (PWM) unit 10, a current detecting unit, a slope compensation unit 30, a feedback unit 40, an inductor L0, and a capacitor. C0. The PWM unit 10 is coupled between the inductor L0 and the feedback unit 40, and includes a PWM comparator 12, an SR latch 14, a PWM 'driver 16 and an output stage (including a PMOS transistor P0 and an NMOS). Crystal NO). The PWM unit 10 is used to generate a PWM drive • signal SPWMD to control its output stage such that the inductor L0 transmits an inductive current signal IL to the capacitor C0 and the load RD. The PWM comparator 12 is configured to generate a control signal CS according to a current detection signal ID, a slope compensation signal SSC, and a feedback signal Ve" from the feedback unit 40. The SR latch 14 includes a set terminal (S) For coupling a clock signal, a reset terminal (R) for receiving the control signal CS from the PWM comparator 12, and an output terminal (0) for outputting a PWM driving signal SPWMD to the PWM driver 16. The SR pin The lock 14 is based on the control signal CS and the pulse signal, and generates a PWM drive signal SPWMD to the PWM drive &quoter 16 to turn the output stage (P0 and N0) on or off. For example, the feedback signal Ve" It can be a voltage signal, and the current detection signal ID and the slope compensation signal SSC are current signals. Furthermore, the current detection signal ID and the slope compensation signal SSC can be combined (added) by a resistor (not shown) and converted into a voltage signal for comparison with the feedback signal Ve". The error amplifier 41 and the phase compensation unit 42 are coupled to a voltage-current converter for converting the output signal Ve into a current of 0758-A32295TWF; MTKI-06-182; dennis 11 1354433 • signal for summing the current detection signal ID Compare with the combined value of the slope compensation signal SSC. • In some embodiments, the duty cycle of the PWM drive signal SPWMD is determined by the control signal CS. For example, when the SR pin 14 is set (R) When the received clock signal becomes high, the PWM drive signal SPWMD of the SR latch 14 will also become high, 'so that the PMOS transistor P0 and the NMOS transistor NO are turned on and off, respectively, and the inductor The current signal IL is thus increased. If the voltage signal generated by the combination of the current signal measurement signal ID and the slope compensation signal SSC is higher than the feedback signal Ve", the comparator 12 generates a low logic output. SR latch 14 to reset. Therefore, the PWM drive signal SPWMD of the SR latch 14 also becomes low, so that the inductor current signal IL is decreased until the PWM drive signal SPWMD of the SR latch 14 becomes high again. The current detecting unit 20 is configured to detect the inductor current signal IL and output a current detecting current proportional to the inductor current signal IL (in proportion) to the PWM unit 10 and the slope compensating unit 30. For example, the electrical stream detection unit 20 can be a current replica circuit. The slope compensation unit 30 is configured to output a slope compensation signal SSC having a compensation slope to the PWM unit 10 according to the inductor current signal IL, wherein the compensation slope is proportional to the falling slope of the current sense signal IL (proportional). For example, the slope compensation unit 30 can generate a slope compensation signal SSC whose compensation slope is one-half of the falling slope of the inductor current signal IL or equal to the falling slope of the inductor current signal IL, but does not limit 0758-A32295TWF; MTK1 -06-182;dennis 12 1354433 • Here. The feedback unit 40 is configured to generate a feedback signal Ve′ according to one of the switching voltage regulators 100, so that the PWM unit 10, according to the slope compensation signal SSC, the current detection signal ID and the feedback signal Ve ", generate PWM drive signal SPWMD. The feedback unit 40 includes resistors R1 R R2, an error amplifier 41, and an optional phase compensation unit 42. The resistors R1 to R2 are used to generate a divided voltage V12 according to the output voltage Vout of the switching regulator 100, which is output to the error amplifier 41. The error amplifier 41 generates an output signal Ve based on the voltage difference between the divided voltage V12 and a reference voltage Vref. The selectively set phase compensation unit 42 is coupled between the error amplifier 41 and the PWM comparator 12 for phase compensation of the output signal Ve and generates a feedback signal Ve" to the PWM comparator 12. The compensation unit 30 can generate a slope compensation signal SSC according to the rising slope of the duty cycle D of the PWM driving signal SPWMD and the inductor current signal IL. The compensation slope is proportional to the falling slope of the inductor current signal IL (proportional), so the disturbance is disturbed. It will be eliminated in a few cycles, and the anti-noise capability shown in Figures 7 and 8 can be obtained. Figure 11 shows an embodiment of the current detecting unit and the slope compensation unit. As shown, the current sensing unit 20 measures the inductor current signal IL and outputs a current sense signal ID that is proportional to the inductor current signal IL. The current detecting unit 20 includes the PMOS transistors P1 to P4 and The operational amplifiers OP1 and OP2, wherein the MOS transistors P0 to P4 are 0758-A32295TWF; MTKI-06-182; dennis 13 1354433 * the gates are commonly coupled to the PWM driver 16. For example, the PMOS transistor P1 to P2 and the operational amplifier OP1 can form a current replica circuit, and the PMOS transistors P3 to P4 and the operational amplifier OP2 form another current replica circuit. Since the size of the PMOS transistors P1 to P4 is the PMOS transistor P0 Since it is doubled, the copied current is twice as large as the inductor current signal 'IL' and used as the current detection signal ID. In this embodiment, Μ<<:1. Furthermore, because the current detection signal ID It is multiplexed by the inductor current signal IL, so the current sense signal ID will have a rising slope proportional to the rising slope of the inductor current signal IL. In this embodiment, the current is detected by the PMOS transistor P3. The measured signal ID is output to the slope compensation unit 30, and the current detection signal ID through the PMOS transistor P1 is output to the PWM comparator 12. Fig. 12 shows an embodiment of the slope compensation unit. The slope compensation unit 30A includes a slope extraction unit 31A for taking out the rising slope of the inductance® current signal IL according to the current detection signal ID from the current detecting unit 20, and a synthesizing unit 32A for detecting Measured • The duty cycle D of the PWM drive signal SPWMD, and according to the rising slope of the inductor current-signal IL and the duty cycle D of the PWM drive signal SPWMD, the falling slope of the inductor current signal IL is obtained, and the slope compensation signal SSC is generated. The slope extraction unit 31A includes a resistor R3 for converting the current detection signal ID into a corresponding voltage VD, and a differential circuit for differentiating the corresponding voltage VD. The current detection from the current detecting unit 20 is 0758-A32295TWF; MTKI- 06-182;dennis 14 1354433 * The signal ID has the same rising slope as the inductor current signal IL, so the corresponding voltage VD generated according to the current detection signal ID also has the same rising slope. Therefore, the corresponding voltage VD can be expressed as ίΌ = /Ρχ/?3 = ΜχΛχΛ3, where μ is the size ratio of the transistors P0 to P1. The differential circuit 301 includes an operational amplifier Ρ3, an NMOS transistor 电容1, a capacitor C1, and a reset switching element SR1 for differentiating the corresponding voltage VD for generating a corresponding current signal II. Corresponding current signal

Il = C^^ = ClMxR3xdlD=CUMxR3xml ^ The II system can be expressed as dt dt , where ml

The I system represents the rising slope of the inductor current signal IL. In other words, the corresponding current signal 11 will have a rising slope of the inductor current signal IL. The synthesizing unit 32A includes a duty cycle detecting unit 302, current mirrors 303 and 304, an integrating unit 305, and a voltage-current converter 306. The duty cycle detecting unit 302 is configured to detect the duty cycle (D) of the PWM driving signal SPWMD according to the relationship between the input voltage Vin of the switching voltage regulator 100 and the output voltage Vout, and thereby output a f group corresponding control Signals S1 to SN. In other words, the control signals S1 SN from the duty cycle detecting unit 302 contain information on the duty cycle of the PWM drive signal SPWMD. The current mirror 303 is for amplifying the current signal II having the rising slope of the inductive current signal IL according to the control signals S1 to SN, and generating a current signal 12 of K times the current signal 11. The integrating unit 305 includes a capacitor C2 and a reset switching element SR2 for integrating the current signal 12 to generate a corresponding voltage V2. In other words, the voltage V2 can be expressed as 0758-A32295TWF; MTKI-06-182; dennis 15 1354433 K 乂石乂MXR3 oil t. The voltage-to-current converter 306 includes an operational amplifier OP4, an NMOS transistor N2, and a resistor R4 for converting the voltage V2 into a current signal 13. Current signal 13

/3 = - can be expressed as . In this embodiment, capacitor C1 will be equal to capacitor C2, and resistor R2 will be equal to resistor R3, so K can be expressed as 2 1-n. Therefore, the current signal 13 can be rewritten into

. In certain embodiments, K can also be 1-. In other words, K is a function of the duty cycle (D) of the PWM drive signal SPWMD. Current mirror 304 includes PMOS transistors P7 and P8 for replicating current signal 13 to produce a corresponding current signal 14 as a slope compensation signal SSC. Since the current signal 13 has a compensation slope that is proportional to the falling slope m2 of the inductor current signal IL, the slope compensation signal SSC will also have the same compensation slope. Figure 13 is an embodiment of a duty cycle detection unit. As shown, the duty cycle detecting unit 302 includes a resistor string composed of N+1 resistors RS1-RSN+1, and N comparators CMP1 CMPNHN. For example, when the output voltage Vout is higher than the divided voltage VRS1, the comparator CMP1 outputs a control signal S1. When the output voltage Vout is higher than the divided voltage VRS2, the comparators CMP1 and CMP2 output control signals S1 and S2 when the output is output. When the voltage Vout is higher than the divided voltage VRS3, the comparators CMP1 to CMP3 output control signals S1 to S3, according to which 0758-A32295TWF; MTKI-06-182; dennis 16 1354433 • Analogy. In other words, the duty cycle detecting unit 302 generates a corresponding control k number S 1 SN to the current mirror 303 according to the ratio between the input voltage Vin of the switching regulator 100 and the output voltage v 〇ut. Therefore, • The control signals S1 to SN contain information on the PW1V in the steady state [the duty cycle (D) of the drive signal SPWMD. Figure 14 is an embodiment of current mirror 303. The current mirror 303 includes N+1 PMOS transistors ΡΑ0 to PAN, and N switching elements SW1 to SWN. In this embodiment, the amplification ratio κ of the current mirror 303 is a function of the period (9). For example, when the duty cycle is 〇. 5, ι-d is 1, so the switching element SW1 is turned on according to the control signal si, so that the dry current signal 12 is equal to the current signal η. When the duty cycle is 0.6, '1-〇 is υ, so the switching elements swi~SW2 are turned on according to the control signals S1 and S2, so that the current signal 12 is 1.5 times the current signal II. When the duty cycle is 〇.7, 1-£> is 2.3, so the switching elements • SW1 to SW3 are turned on according to the control signals si to S3, so that the current signal • 12 will be 2.3 times the current signal II. When the duty cycle is 〇.8, j^ is '4', so the switching elements SW1 to SW4 are turned on according to the control signals si to S4, so that the electric signal 12 is four times the current signal η. When the duty cycle is 0_9, U is 9 ', so the switching elements SW1 to SW5 are turned on according to the guard signals S1 to S5 so that the current signal 12 is 9 times the current source II. In other words, the current mirror 303 amplifies the current signal II according to the control signals S1 to SN from the duty cycle detecting unit 302 as 0758-A32295TWF; MTKI-06-182; dennis 17 1354433 - current signal 12. Figure 15 is another embodiment of a slope compensation unit. As shown in the figure, the slope compensation unit 30B includes a slope extraction unit 31B for obtaining a rising slope ml of the inductor current signal IL according to the current detection signal ID from the current detecting unit 20, and a synthesizing unit 32B. For generating a slope compensation signal SSC according to the current detection signal ID having the rising slope ml of the inductor current signal IL. In this embodiment, the slope extraction unit 31B can be a subtractive circuit for sampling the current detection signal ID during an initial period as an initial current signal IDI, and by the current after the initial period. The initial current signal IDI is subtracted from the detection signal ID to generate a current signal IX having a rising slope ml of an inductor current signal IL. The slope extraction unit 31B (subtraction circuit) includes PMOS transistors P9 to P10, NMOS transistors N3 and N4, resistors R5 to R7, an operational amplifier OP5, a capacitor C3, and switching elements SWA and SWB, wherein the PMOS transistors P9 and P10 The system constitutes a current mirror, and the resistors R5 to R7 are the same electric resistance.

• Figure 16 shows the relationship between the current detection signal ID, the initial current signal IDI and the current signal IX. As shown in Fig. 15 and Fig. 16, in the initial period ,, the switching elements SWA and SWB are turned on, the source terminals of the NMOS transistors N3 and N4 are coupled together, and the output terminal of the operational amplifier OP5 is coupled. Connected to a gate coupled to NMOS transistors N3 and N4. Therefore, the NMOS transistor N3 will have a current debt signal ID flowing through it, and the NMOS transistor N4 will have another current detection signal 0758-A32295TWF; MTKI-06-182; dennis 18 1354433 • ID, so the current Signal IX is zero. Furthermore, the capacitor C3 is used to store the voltage output from the operational amplifier OP5 to sample the current detection signal ID flowing through the NMOS transistor N4.

At time t1, both switching elements SWA and SWB are turned off, and NMOS transistor N3 is still controlled by operational amplifier OP5, but NMOS transistor N4 is controlled by voltage V4 stored in capacitor C3. After the initial period PI, the current detection signal ID flowing through the NMOS transistor N3 will still increase with the inductor current signal IL, but the current detection signal ID (flowed through the NMOS) is sampled at time t1. The transistor N4) is held by capacitor C3 as an initial current signal IDI. Since the current detection signal ID flowing through the NMOS transistor N3 increases with the inductor current signal IL, and the initial current signal IDI flowing through the NMOS transistor N4 is maintained at a fixed value, the current signal IX can be regarded as IX = ID-IDI For example, the current detection signal ID can be assumed to be still ==+1〃, where Ιο is a fixed value, and ml is the rising slope of the inductor current signal IL. When the slope extracting unit 31B samples the initial value of the current detecting signal ID and then takes the initial value from the current current detecting signal ID, the fixed current 1〇 is removed, and the portion having the rising slope ml is left. . In other words, the current signal IX can be expressed as. In this embodiment, the synthesizing unit 32B includes only the duty cycle detecting unit 302 and the current mirror 303. The duty cycle detecting unit 302 is configured to detect the operation of the PWM driving signal SPWMD 0758-A32295TWF according to the relationship between the input voltage Vin of the switching voltage regulator 100 and the output voltage Vout; MTKI-06-l 82; dennis 19 And, by which a corresponding set of control signals S1 to SN are output. The action and structure of the working cycle 2 measuring unit 302 and the current mirror 3〇3 are similar to those of the nth, and will not be described here. The current mirror 3〇3 is used to amplify the current (four) DC having the rising slope (10) of the inductor current signal IL according to the working system 1S1 SN, and generate a current signal of K times the current money as the slope compensation signal ssc, where κ Can be &. In other words, the slope compensation signal SSC can be expressed as: ssc=kix ,=-^^xmlxt = m2xt Therefore, the slope of the slope compensation signal ssc has a compensation slope equal to the falling slope m2 of the inductor current signal, or two of the falling slope W = -. Since the slope compensation unit 3Q can generate the slope compensation signal ssc having a compensation slope (the same as the falling slope m2 of the inductor current signal or one-half of the falling slope m2), the disturbance will be eliminated in several cycles. At the same time, it has the anti-noise ability of Figure 7 and Figure 8. The invention also provides a slope compensation method for a switching voltage regulator. Figure 17 is a flow chart of the slope compensation method of the present invention. In step S710, the inductor current is signaled to generate a current detection signal m that is proportional to the inductor current signal IL. For example, by replicating the inductor current signal IL and generating a replica current that is one hundred times longer than the inductor current signal, it acts as a current ready signal m. In a certain embodiment, M<<1. In step S703, 'the rising slope of the inductor current signal is detected. For example, 'as shown in Fig. 12' can be obtained by integrating current measurement signals m 〇 758-A32295TWF; MTKI-06-I82; dennis 20 1354433

- Converted to voltage VI and then differentiated voltage VI to produce a current signal II with a rising slope ml of the inductive current signal IL. The current signal II. ji = ci_ = ClMxR3xdI- = ClxMxR3xm\ can be expressed as dt dt , where ml is the rise slope of the table inductor current signal IL. In other words, the current signal II has a rising slope ml of the inductor current signal IL. In other words, the initial current signal IDI can be subtracted from the current detection signal ID after the initial period $ by sampling the current detection signal ID in an initial period as an initial current signal IDI, so as to generate A current signal IX of the rising slope m 1 of the inductor current signal IL. For example, as shown in Fig. 16, the current detection signal ID can be /Z) = /〇 + wixi, where 1〇 is a fixed current, and ml is the rising slope ml of the inductor current signal II. When the slope extraction unit 31B in FIG. 15 samples the current detection signal ID and extracts the initial value IDI from the current current value of the current detection signal ID, the fixed current 1〇 is removed. The remainder with the rising slope ml is obtained. φ In other words, the current signal IX can be expressed as. In step S705, the duty cycle (D) of the PWM driving signal SPWMD generated by the PWM unit is detected. For example, the duty cycle of the PWM drive signal SPWMD can be measured according to the proportional relationship between the input voltage Vin of the switching voltage regulator 100 and the output voltage Vout. As shown in FIG. 13, the duty cycle detecting unit 302 can detect the duty cycle of the PWM driving signal SPWMD according to the input voltage Vin and the output voltage Vout of the switching voltage regulator 100, thereby generating a corresponding control. Signals S1 to SN. For example, when the output voltage Vout is higher than 0758-Α32295ΤΨΕ; ΜΤΚΙ-06-182; άεηηί3 21 1354433 divided VRS1, the comparator CMP1 outputs a control signal SI, when the output voltage Vout is higher than the divided voltage VRS2, the comparator CMP1 and CMP2 output control signals S1 and S2. When the output voltage Vout is higher than the divided voltage VRS3, the comparators CMP1 to CMP3 output control signals S1 to S3, and so on. In other words, the duty cycle detecting unit 302 generates corresponding control signals S1 to SN to the current mirror 303 according to the ratio (duty cycle) between the input voltage Vin and the output voltage Vout at the steady state of the switching voltage regulator 100.

In step S707, based on the duty cycle of the inductor current signal IL and the PWM drive signal SPWMD, a slope compensation signal SSC having a compensation slope proportional to the falling slope m2 of the inductor current signal IL is generated. As shown in Fig. 12, the current mirror 303 amplifies the current signal S1 having the rising slope ml of the inductor current signal IL according to the control signals S1 to SN, and outputs a current signal 12 of K times the current signal II. The integrating unit 305 integrates the current signal 12 to generate a corresponding voltage V3. In other words, the voltage V2 can be expressed as a voltage-current converter 306 for converting the corresponding voltage V2 into a corresponding current signal 13, and the current signal I3 = - = - = Kx - x - xMxmlxi number 13 can be expressed as a similar C2 R4 . In this embodiment, capacitors C1 and C2 are the same capacitor, and resistors R3 and R4 are also

1 D is the same resistance, and K is expressed as. Therefore, the current signal 13 /3 = Μ X — X —^― xmlxt = Μ χ — χ m2 x t · ,

Rewritten to 1 2 U 2 . In certain embodiments, K 0758-A32295TWF; MTKI-06-182; dennis 22 1 2 V2 =——\KxI\xdt = Kx — xMxR3xml: C2J C2 1354433

D

It can also be expressed as θ. In other words, K is a function of the duty cycle of the PWM drive signal SPWMD. The current mirror 304 copies the current signal 13 to produce a corresponding current as the slope compensation signal SSC. Since the current signal 13 has a compensation slope proportional to the falling slope m2 of the inductor current signal IL, the slope compensation signal SSC will also have the same compensation slope. Or, as shown in Fig. 15, the current mirror 303 will have a rising slope of the inductor current signal IL according to the control signals S1 to SN.

The current signal IX is amplified and generates K times the current signal IX

The D stream signal, as the slope compensation signal SSC, where K can be 1-D. In other words, the slope compensation signal SSC can be expressed as SSC = KIX = -xmlxt ~ m2xt ^ 1- is . Therefore, the slope compensation signal SSC will have the same compensation slope as the falling slope m2 of the inductor current signal IL. Yumou

1 D In some embodiments, K can be designed such that the slope compensation signal SSC will have a compensation slope of one-half of the falling slope m2 of the inductor current signal IL. In step S709, a feedback signal Ve" is generated by the output voltage Vout of the switching voltage regulator 100. As shown in FIG. 10, the resistors R1 and R2 in the feedback unit 20 are based on the switching voltage regulator. The output voltage Vout of 100 generates a divided voltage V12 output to the error amplifier 41. The error amplifier 41 generates an output signal Ve according to the voltage difference between the divided voltage V12 and a reference voltage Vref. The selectively configurable phase compensation unit 42 The output signal Ve is phase-compensated, and then the feedback signal Ve" is generated and output to the PWM comparator 12. 0758-A32295TWF; MTKI-06-182; dennis 23 1354433 - In step S711, the PWM unit 10 is controlled according to the slope compensation signal SSC, the current detection signal ID, and the feedback signal Ve". For example, As shown in FIG. 10, the feedback signal Ve" can be a voltage signal, and the current detection signal ID and the slope compensation signal SSC can be current signals. Furthermore, the current detection signal ID and the slope compensation signal SSC are combined and converted into an electrical waste signal by a resistor (not shown) for comparison with the feedback signal Ve". In another embodiment The output signal Ve can also be converted into a current signal by using a voltage-current converter between the error amplifier 41 and the phase compensation unit 42 for use with the current detection signal ID and the slope compensation signal SSC. The combined value is compared. The PWM comparator 12 in the PWM unit 10 receives the slope compensation signal SSC, the current detection signal ID, and the feedback signal Ve" to generate a PWM drive signal SPWMD. In some embodiments, the duty cycle of the PWM drive signal SWPMD is determined by the control signal CS. For example, when the clock signal received by the set terminal (S) of the SR latch 14 becomes high, the PWM drive signal SPWMD of the SR latch 14 becomes *high potential, so that the PMOS transistor P0 and the NMOS are electrically The crystal N0 is turned on and off, respectively, and the inductor current signal IL is thus increased. If the voltage signal generated by the combination of the current detection signal ID and the slope compensation signal S S C is higher than the feedback signal Ve, the PWM comparator 12 generates a low logic output for resetting the SR latch 14 . Therefore, the PWM drive signal SPWMD of the SR latch 13 becomes low, so that the PMOS transistor P0 and the NMOS transistor N0 are respectively turned off and on, and the inductor current signal IL is thus reduced until the PWM drive of the SR latch 14 is driven. Signal 0758-A32295TWF; MTKI-06-182; dennis 24 ^54433 SPWMD becomes high potential again β. In this embodiment, a slope compensation signal ssc is generated according to the duty cycle of the duty cycle of the PWM drive signal spWMD and the inductor current signal IL. It has a compensation slope proportional to the falling slope m2 of the inductor current signal IL, which is used for slope compensation, so the disturbance will be eliminated in several cycles, and at the same time has the anti-noise capability shown in Fig. 7 and Fig. 8. . While the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope is subject to the definition of the scope of the patent application attached. [Simple description of the diagram] Figure 1 is a voltage-controlled switching voltage regulator. Figure 2 shows an embodiment of a current controlled switching voltage regulator. Figure 3 is a control loop waveform of a current-controlled switching voltage regulator at steady state. ~ Figure 4 is another control loop waveform of a current-controlled switching voltage regulator at steady state. “Figure 5 is the waveform of the slope compensation signal taken out from the output signal in the error amplifier.” Figure 6 shows the relationship between the average values of the inductor current signals IAvG1 to IAvg3. 25 〇758-A32295TWF; MTKI -06-182;dennis Figure 7 shows a slope shape with one of the slopes of the complement slope. The 8th graph shows a slope with the complement slope.

D Figure 9 is different seven

π 丨 工作 工作 工作 工作 工作 D D D D D 10 第 第 第 第 第 第 表 表 表 表 表 表 表 表 表 表 表 表 表 表 表 表 表 表 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ Fig. 12 showing the current detecting unit and the slope compensating unit shows an embodiment of the slope compensating unit. Figure 13 is an embodiment of a duty cycle detection unit. Figure 14 is an embodiment of a current mirror 3〇3. Figure 15 is another embodiment of a slope compensation unit. Figure 16 shows the relationship between the current detection signal, the initial current signal and the current signal. Figure 17 is a flow chart of the slope compensation method of the present invention. [Main component symbol description] 10: Pulse width modulation (PWM) unit; 12: PWM comparator; 16: PWM driver; 30: slope compensation unit; 32A: synthesis unit; 41: error amplifier; 14: SR latch 2〇·'current detection unit; 31A, 31B: slope extraction unit; 40: feedback unit; 42: phase compensation unit; 0758-A32295TWF; MTKI-06-182; dennis 26 1354433 100: switching voltage regulator 301: differential circuit; 302: duty cycle detection unit; 303, 304: current mirror; 305: integration unit; 306: voltage-current converter; IL: inductor current signal; L0: inductance; 10: current variable; SC , SSC : slope compensation signal; m: compensation slope; ml: rising slope; m2: falling slope; D, D1 ~ D3: duty cycle; IAVG1 ~ IAVG3: average value of the inductor current signal;

Vin: input voltage; Vout: output voltage; C0~C3: capacitance; ID: current detection signal; P0-P10, N0-N4, ΡΑ0~PAN: transistor;

Ve": feedback signal; Ve: output signal; CS, S1~SN: control signal; Vref: reference voltage; VD: corresponding voltage; Π~14: current signal; V2~V4: voltage; CMP1~CMPN: comparator IDI ··Initial current signal; OP1~OP5: Operational amplifier; SRI, SR2: Reset switching element; RD: Load; SPWMD: PWM drive signal; R1~R7, RS1~RSN+1: resistance; VI, V12, VRS1 ~ VRSN: voltage division; SW1-SWN, SWA and SWB: switching elements 0758-A32295TWF; MTKI-06-182; dennis 27

Claims (1)

1354433 ------ Patent No. 96922495 Revision of this patent Volume 5 of the daily record replacement page id 06-- Ten, the scope of application for patent: 1. A switching voltage regulator, including: _. An inductor, coupling Connected to a load; a pulse width modulation (PWM) unit includes an output stage, and the pulse width modulation unit generates a pulse width modulation driving signal for controlling the output stage to transmit the inductor An inductor current signal to the above-mentioned 'load; and a slope compensation unit for outputting a slope compensation signal having a compensation slope to the pulse width modulation unit according to the inductor current signal, wherein the compensation slope is as described above One slope of the inductor current signal is proportional to a falling slope, wherein the slope compensating element measures a rising slope of the inductor current signal, and the duty cycle of the driving signal is increased by the pulse width modulation driving signal and the measured rise The slope gives the falling slope of the above inductor current signal. 2. The switching voltage regulator according to claim 1, further comprising a current detecting unit for detecting the inductor current signal and outputting a current detecting signal to the pulse width modulation The control unit and the above-described 'slope compensation unit, wherein the current detection signal is proportional to the above-mentioned inductor current' signal. 3. The switching voltage regulator according to claim 2, further comprising a feedback unit for generating a feedback signal according to one of the output voltages of the switching voltage regulator, so that the pulse width is adjusted The variable control unit generates the pulse width modulation drive signal based on the slope compensation signal, the current detection signal, and the feedback signal. 0758^32295^^1(20100817) 28 1354433 Patent application No. 96922495 [Η rate is revised this month (more) is being replaced] | Amendment date: 99.10_6 M QQ 10. 2 3 I 4. If applying for a patent The switching voltage regulator of the second aspect, wherein the slope compensation unit comprises: a slope extraction unit configured to extract the rising slope of the inductor current signal according to the current detection signal; and a synthesizing unit And detecting the duty cycle of the pulse width modulation driving signal, and determining the falling slope of the inductor current signal according to the rising slope of the inductor current signal and the duty cycle of the pulse width modulation driving signal. And to generate the above compensation slope signal. 5. The switching voltage regulator according to claim 4, wherein the slope extraction unit comprises a subtraction circuit for sampling the current detection signal as an initial current signal during an initial period. And generating a first current signal having a rising slope of the inductor current signal by subtracting the initial current signal from the current detection signal after the initial period. 6. The switching voltage regulator according to claim 5, wherein the synthesizing unit comprises: a duty cycle detecting unit configured to input a voltage and an output voltage according to one of the switching voltage regulators; Detecting the working period of the pulse width modulation driving signal, and generating a corresponding set of control signals; and a current mirror for generating the compensation according to the corresponding control signal and the first current signal The above slope of the slope compensates for the signal. 7. The switching voltage regulator according to claim 4, wherein the slope extraction circuit comprises: 0758-A32295TWF1 (20100817) 29 L354433 啁正嫩13m 换页96]22495 application patent. The range correction current resistor is configured to convert one of the current detection signals to a voltage; a differential circuit is configured to differentiate the corresponding voltage to generate a first current having the rising slope of the current detection signal signal. 8. The switching voltage regulator of claim 7, wherein the synthesizing unit comprises: a duty cycle detecting unit for inputting a voltage and an output voltage according to one of the switching voltage regulators; Detecting the above duty cycle of the pulse width modulation driving signal, and generating a corresponding set of control signals; and a first current mirror for generating according to the corresponding control signal and the first current signal a second current signal of the compensation slope; an integrating unit for integrating the second current signal to generate a first voltage; and a voltage-current converting unit for converting the first voltage into a third current And a second current mirror for replicating the third current signal as the slope compensation signal. A slope compensation method for a switching voltage regulator, comprising: detecting a rising slope of an inductor current signal flowing from a pulse width modulation unit to a load; detecting the pulse width modulation unit generated by the pulse width modulation unit One pulse width adjustment 0758-A32295TWF1 (201008T7) 30 1354433 The patent application scope revision of No. %122495 ^ g more) positive: #期:99.10.6 ” ------- a duty cycle of the variable drive signal; generating the compensation slope according to the above-mentioned duty cycle of the pulse width modulation drive signal and the rising slope of the inductor current signal a slope compensation signal, wherein the compensation slope is proportional to a falling slope of one of the inductor currents; and the pulse width modulation unit is controlled according to the slope compensation signal. 10. The slope compensation method of the switching voltage regulator, wherein the duty cycle of the pulse width modulation signal is generated according to a proportional relationship between an input voltage of one of the switching voltage regulators and an output voltage. J 11. The switching voltage crying slope compensation method according to claim 9 of the patent application scope, further comprising: measuring the inductor current signal to generate a current detecting signal proportional to the inductor current signal; and: The voltage is output by one of the above-mentioned switching voltage regulators, and the (four) number is generated to make the upper _wave width light single ^, the above oblique The rate compensation unit is controlled by the feedback signal; the step of the 9th pin-receiving voltage regulator rate includes: detecting the rising slope of the inductor current signal in a private initial period 'The above current detection signal is taken as the initial current signal; & (4) 仃 sampling 'after the above initial period' is subtracted from the above current_signal by the upper 75S-A32295TWn (2〇l〇08l7) 31 1354433 丨II雠 replacement page; the patent scope of the 96122495 modifies the initial current signal to generate a first current signal having the above-described rising slope of the inductor current signal. 13. As claimed in claim 12 The slope compensation method of the switching voltage regulator, wherein the step of generating the slope compensation signal comprises: amplifying the first current signal according to the duty cycle of the pulse modulation driving signal to generate the slope compensation signal. 14. The slope compensation method of the switching voltage regulator according to claim 9 of the patent application, detecting the rising slope of the inductor current signal The step of: converting the current detection signal into a first voltage; and differentiating the first voltage to generate a first current signal having the rising slope of the inductor current signal. The method for determining a slope compensation of the switching voltage regulator according to the item 14, wherein the step of generating the slope compensation signal comprises: amplifying the first current signal according to the duty cycle of the pulse width modulation driving signal to generate the above a second current signal of the falling slope of the inductor current signal; integrating the second current signal to generate a second voltage; and converting the second voltage to the slope compensation signal. 16. A switching voltage regulator comprising: an inductor connected to a load; a slope compensation unit coupled to the inductor, the slope compensation unit configured to modulate the drive signal according to a pulse width Work cycle and flow through 0758-A32295TWF1 (20100817) 32 1354433 p—--- Year of the year (more) W 99.10.6 Patent Application No. 96922495 modifies a rising slope of an inductor current signal of one of the above inductors, obtains a falling slope of the inductor current signal, and generates a slope compensation signal having a compensation slope, wherein the compensation slope The current detecting and detecting unit is configured to detect the inductor current signal to generate a current detecting signal proportional to the inductor current signal to the slope compensation unit; a pulse width modulation unit comprising a comparator for receiving the current 4 detection signal, the slope compensation signal and a feedback signal, and at least one output transistor for outputting the inductor current signal to the inductor; A feedback unit is connected between the comparator and the inductor, and the feedback unit is configured to generate the feedback signal according to an output voltage of one of the switching voltage regulators. 17. The switching voltage regulator of claim 16, wherein the slope compensation unit comprises: a subtraction circuit for sampling the current detection signal as an initial current signal in an initial period And after the initial period, the current detection signal is subtracted from the initial current signal to generate a first current signal having the rising slope of the inductor current signal. 18. The switching voltage regulator according to claim 17, wherein the slope compensation unit further comprises: a duty cycle detecting unit coupled to the switching voltage regulator 0758-A32295TWF1 (20100817) 33 1354433 Although the year of the year is a conversion page j €0. 10. QG - II No. 96122495 patent application scope revision)) One input voltage and one output voltage, the above duty cycle detection unit is used according to the above switching voltage The input voltage of the regulator and the output voltage are detected, and the working cycle of the pulse width modulation driving signal is detected, and a corresponding control signal is generated; and a first current mirror is coupled to The duty cycle detecting unit is configured to generate the slope compensation signal having the compensation slope according to the corresponding control signal and the first current signal from the subtraction circuit. The switching voltage regulator according to claim 16, wherein the slope compensation unit comprises: a resistor for converting the current detection signal into a corresponding voltage; and a differential circuit for The corresponding voltage is differentiated to obtain a first current signal having the rising slope of the inductor current signal. The switching voltage regulator according to claim 19, wherein the slope compensation unit further comprises: 'a duty cycle detecting unit coupled to the switching voltage regulator of the input voltage and one Output voltage, the duty cycle detecting unit is configured to detect the duty cycle of the pulse width modulation driving signal according to the input voltage and the output voltage, and generate a corresponding control signal; a first current The mirror is connected to the working cycle detecting unit, and the first current mirror is configured to use the above-mentioned corresponding control signal to have the above-mentioned inductance 075S-A32295TWF1 (20100817) 34 1354433 air bird, f night replacement. -Pilule No. 96122495 The application of the patent range corrects the first current signal of the rising slope of the current signal to generate a second current signal having one of the compensation slopes; an integrating unit coupled to the first current mirror, wherein the integrating unit is configured to The second current signal is integrated to generate a first voltage; a voltage-current conversion unit is tapped to the above integral And a voltage-current conversion unit configured to convert the first voltage into a third current signal, and a second current mirror to replicate the third current signal as the slope compensation signal. 0758-A32295TWF1 (20100817) 35