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TWI245386B - Heat-dissipating semiconductor device with a flexible circuit board - Google Patents

Heat-dissipating semiconductor device with a flexible circuit board Download PDF

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Publication number
TWI245386B
TWI245386B TW093140870A TW93140870A TWI245386B TW I245386 B TWI245386 B TW I245386B TW 093140870 A TW093140870 A TW 093140870A TW 93140870 A TW93140870 A TW 93140870A TW I245386 B TWI245386 B TW I245386B
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TW
Taiwan
Prior art keywords
heat
semiconductor device
flexible
board
patent application
Prior art date
Application number
TW093140870A
Other languages
Chinese (zh)
Other versions
TW200623362A (en
Inventor
Shih-Ping Hsu
Original Assignee
Phoenix Prec Technology Corp
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Publication date
Application filed by Phoenix Prec Technology Corp filed Critical Phoenix Prec Technology Corp
Priority to TW093140870A priority Critical patent/TWI245386B/en
Application granted granted Critical
Publication of TWI245386B publication Critical patent/TWI245386B/en
Publication of TW200623362A publication Critical patent/TW200623362A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

A heat-dissipating semiconductor device with a flexible circuit board is proposed, which includes a heat-dissipating package and at least a flexible circuit board. The flexible circuit board is electrically connected to heat-dissipating package. On the flexible circuit board at least an election element, such as memory, capacity, resistor or inductance is mounted thereon in order to form a module structure. By mean of the flexible circuit board accommodation space can be expended.

Description

1245386 九、發明說明： 【發明所屬之技術領域】 —種結合有可撓性軟板之散 種散熱封裝件整合有可猝姓护妃 千蛉版衣置，尤指 【先前技術】 之㈣型半導體裝置。 笔子產品縮小化，ρ足a , 單一功处刑…長久以來的發展趨勢，並且以往 行動電話結合數位相機之多功、!7^ 的需求’如 口梦+ 钺之夕功月匕（multiple function)電子 ::，使得隨身型的電子產品不再僅有單一使用功能。為 处^產業之積體電路（lnt啊ed咖uh，ic)係朝向多功 性迠之方向發展。如具有多種功能的積體電路，由 盆得以提供多種不同的功能，而以ic為主體架構，並在 ::輸入/輸出接點上連接不同的被動元件，如電阻、電容或 电感等所組成之群組之一，即可組合成該1(：所提供之 能0 但以封裝完成之1C連接被動元件之方式，通常係先製 作印刷兒路板，再將該Ic及被動元件插裝在印刷電路板 上，而藉由印刷電路板以達成連接。如此一來，則使得整 體的體積變大，而無法達到薄小之目的。 又習知之散熱增益型球柵陣列式（EBGA, Enhanced Bal1 Gnd Array)，如第1圖所示，係在一散熱板li(heat sink) 上宜衣一具有開口 12丨（opening)的基板12，於該基板12 的開口 121内裝置一晶片13(chip)，且該晶片13以銲線14 連接至基板12 ’並且在基板12的表面上植接有複數個錫 5 18106 1245386 球15。 雖然該EBGA結構藉由散熱板u，而 能，伸今玄其扣Ί 9 有问放Λ兵之效 亥基板12之開口 121裝置晶片η 位置可供裝置其它元件 1夕餘的 (active element)，使 之甩谷或氣阻等被動元件 使用需求，而-法 …、次1乍其匕的應用變化。 【發明内容】 鑑於前述習知技術之缺失，本㈣之 =了種結合有可撓性軟板之散熱封I件，俾:係在提 間以格載外接電子元件。 于^ i、配置空 =發明之又—目的，係在提供―種杜 ^板之散熱封裳件，藉以免除配置二性軟板 之Μ發明之次一目的，係在提供-種Μ有問題。 之放熱封裝件，以構建模组化結構，俥：有可撓性軟板 件。 得俾可便於外接電子元 本發明之再一目的，係在提供一 之散，同時得縮小封裝體積 有可繞性軟板 軟板二 =，，:= 至少—可撓性軟板，係接 啟熱封裝件；以及 上，以供承接複數電m亚連接在該散熱封裝件 而該散熱封裝件係包括 之表面，且該封裝，係結 -切體元件’係埋 ：/、有至少-開口 ；至少 衣基板之開口内，並且結合在 】8]〇6 6 1245386 ί熱片的表且該半導體元件係以打線連接至封裝基 I於封Α基板表面植接複數個導電元件。 該可撓性軟板上得接置至少—带 件係如主動元件、砒叙_ M 电子兀件，而该電子元 性軟板提供接置空問，A认 件寺俾可猎由可撓 由該可撓性軟板芦矛配置空間不足的問題。俾藉 :配成夕種不同功能及特性的封裝 γ壬 用效能。 早J徒回日日片的使 再者，該可撓性軟板得進 性軟板貼置在該散熱封裝件之二折使:可挽 上的電子元件得以結合在散熱几性軟板 整體體積。 午上俾可鈿小封裝的 又垓可撓性軟板係包括有複數個 一 連接墊接置至外部電子裝+ 而可藉由該 子裝置，俾可提供變換組裝的導體裝置或電 圍。 早性而可有更大的應用範 【實施方式】 着 以下係藉由特定的目碰+ 式，熟習此技藝之:=Γ例說明本發明之實施方 瞭解本發明之其他優點心兒明書所揭示之内容輕易地 /、他彳支點與功效。本發 的具體實施例加以施行或鹿、了糟由其他不同 可基於不同觀點與鹿：： °兄明書中的各項細節亦 種修部與變更。在不恃離本發明之精神下進行各 以下之實施例係進一牛 V砰細§兄明本發明之觀點，但並 18106 7 1245386 非—以任何觀點限制本發明之範疇。 [第一實施例] 請參閱第2圖，係盔士六nn 軟板Hi% t、..’…、奄月所揭露—種結合有可撓性 孕人扳之放熱.型丰導體裝置 熱封##2 不思囚，主要係包括：一散 …対衣件3,係於—例如金屬 ^ 骞次陶瓦之散熱片31表面結合 封衣基板32,於該封裝基板32且 該開口 321内置入 /、"開口 32卜方； 件33結合在散^ 31^=4件33,並使該半導體元 導體元件33之散執饮:而;以藉由該散熱片31提高半 34rw- κ 、放此，而该半導體元件33係以銲線 34(wire bond)接至封裝基柘 、， 住兮本_ μ 板32，亚以一封裝膠體％覆蓋 任6亥丰V體兀件33及鋥蜱以^ 0> JU AK ^ r 7 ，又於該封裝基板32表面形 成係如錫球（solder ball)、鋥執n 」、 電凸塊之導電元件36 .以及f p pad)、接腳(pin)或導 並電性少—可挽性軟板4，係接置 連接在该放熱封裝件3之封裝基板^上，而 性軟板4係為一軟性的㊉ ^ 接複數電子元件41,==，於該可撓性軟板4得供承 動元件或光學元件等，^子元件41係如主動元件、被 、，、中之主動元件係如光元件或半導 “卜而§亥被動元件係如電阻、電容或電感所組成之群1245386 IX. Description of the invention: [Technical field to which the invention belongs]-A kind of loose heat dissipation package combined with a flexible flexible board is integrated with a protectable concubine version, especially the "previous technology" type Semiconductor device. Reduction in writing products, ρ a, single execution ... long-term development trend, and the combination of mobile phones with the power of digital cameras in the past, the demand of 7 ^ 'such as mouth dream + 钺 之 夕 功 月 agger (multiple function ) Electronics :: makes portable electronic products no longer have a single-use function. The integrated circuit (lnt, ed, uh, ic) for the industry is developing in the direction of multiple functions. For example, integrated circuits with multiple functions are composed of basins that can provide a variety of different functions, with ic as the main structure, and different passive components such as resistors, capacitors, or inductors connected to the :: input / output contacts. One of the groups can be combined to form the 1 (: the provided energy 0 but the packaged 1C is used to connect the passive components, usually the printed circuit board is first made, and then the Ic and the passive components are inserted in The printed circuit board, and the printed circuit board is used to achieve the connection. In this way, the overall volume becomes larger, and the purpose of thinness cannot be achieved. Also known as the thermal gain type ball grid array (EBGA, Enhanced Bal1) Gnd Array), as shown in FIG. 1, is attached to a heat sink li (heat sink), a substrate 12 having openings 12 (opening), and a chip 13 (chip) is installed in the opening 121 of the substrate 12. ), And the chip 13 is connected to the substrate 12 ′ with bonding wires 14 and a plurality of tin 5 18106 1245386 balls 15 are implanted on the surface of the substrate 12. Although the EBGA structure can be extended by the heat sink u, Its buckle 9 has the effect of releasing Λbing Haiji The position of the opening 121 of the 121 device wafer η can be used for other components of the device (active element), making it necessary for passive components such as threshing or air resistance, and the application of -method ... Summary of the Invention] In view of the lack of the aforementioned conventional technology, this article = a kind of heat-seal I combined with a flexible flexible board, and it is: the external electronic components are mounted in the compartment in a grid. Another purpose of the invention is to provide a heat-seal package for a kind of plate, so as to avoid the second purpose of the invention of the bisexual flexible board, which is to provide a kind of problem. Constructing a modular structure, there is a flexible flexible board. Another objective of the present invention is to facilitate the external electronic components. It is to provide a dispersion, and at the same time to reduce the packaging volume, there is a flexible flexible board and a flexible board. Two = ,, == at least—a flexible flexible board connected to the thermal package; and a top surface for receiving multiple electrical connections to the thermal package and the thermal package includes the surface, and the package , Tie-cut body elements' Tie: /, have at least-openings; At least in the opening of the clothing substrate, and combined with the] 8] 〇6 6 1245386 and the semiconductor element is connected to the package base by wire bonding, and a plurality of conductive elements are implanted on the surface of the substrate A. The flexibility The flexible board must be connected at least-the straps are such as active components and electronic components, and the electronic component flexible board provides the connection space. The problem of insufficient space for the flexible soft board reeds. 俾 Borrowing: The packaging efficiency of the package γ with different functions and characteristics is provided. In addition, the early and the return of the Japanese film, the flexibility of the flexible soft board The flexible board is placed on the heat-dissipating package in two folds, so that the electronic components that can be pulled up can be combined with the overall volume of the heat-dissipating flexible board. At noon, the flexible flexible board system can be packaged in a small package and includes a plurality of connecting pads connected to external electronic devices. With this sub-device, it is possible to provide a conductor device or an electrical circuit that can be assembled by conversion. Early and can have a larger application [Embodiment] The following is to familiarize yourself with this technique by using a specific eye contact + formula: = Γ Examples illustrate the implementation of the present invention to understand other advantages of the present invention What is revealed is easy / different and effective. The specific embodiments of the present invention can be implemented or deer, and other differences can be based on different viewpoints and deer: ° The details in the brother's book are also revised and changed. Each of the following examples is carried out without departing from the spirit of the present invention. The details of the present invention are described, but 18106 7 1245386 does not limit the scope of the present invention in any way. [First embodiment] Please refer to FIG. 2, the helmet helmet six nn soft board Hi% t, ..'..., yueyue revealed-a combination of flexible pregnant women to release heat.封 ## 2 I do n’t think about prison, mainly including: a piece of… clothing 3, tied to—for example, metal ^ ceramic tiles, the surface of the heat sink 31 is combined with the coating substrate 32, the packaging substrate 32 and the opening 321 Built-in /, " opening 32, cube; piece 33 is combined with the scattered ^ 31 ^ = 4 pieces 33, and the semiconductor element conductor element 33 is scattered: and; by means of the heat sink 31, 34rw- κ, put it here, and the semiconductor element 33 is connected to the packaging base with a wire bond 34, and the _ μ board 32, which is covered with a packaging colloid% Ren 6 Haifeng V body element 33 And 鋥 ticks ^ 0 > JU AK ^ r 7, and on the surface of the package substrate 32 are formed a system such as a solder ball, a capacitor n ", a conductive element 36 (and a fp pad) of electrical bumps, and pins. (pin) or less electrical conductivity—the flexible flexible board 4 is connected to the packaging substrate ^ of the heat-emitting package 3, and the flexible flexible board 4 is a flexible ㊉ ^ is connected to a plurality of electronic components 41 , ==, in The flexible flexible board 4 can be used as a supporting element or an optical element, and the sub-element 41 is such as an active element, a blanket, or an active element is such as a light element or a semiconducting element. A group of resistors, capacitors or inductors

組0 T 且°亥放鋪裝件3之封裝基板32包括有複數個連接墊 37 ’又該可撓性軟板4表面具有連接墊42 ’其得以銀膠 (silVei lesign)、銲錫（5〇】叫、導電樹脂、八⑶等電性連 4电子兀件41係可透過該可撓性軟板4而電性連接至該散 8 】81〇6 1245386 得有更佳的使用範圍。 [第三實施例] 同請參閱第4圖，係為本發明之另—實施結構剖面干立 =述實施例不同處在於該可撓性軟板 ： 二固=封裝件3之另一表面上，例如可固定在二 ‘ _面，以提升接置於該可撓性軟板4上+# 41之散熱效率， 导版4上包子兀件 合成-許，位^ 板4與散熱封裝件3結 門而；右 體積並可擴充電子元件41的配置空 間而可有較廣之應用範圍。 由上述之貫施結構態樣令，散熱封裝件u 軟板，而可提供配置空間以連接電子丄:件:接置可换性 體元件之使用效妒，… 件，俾以提高半導 ^ _ b亚^供模組化結構以提供變換搭 電子兀件之變換使用的彈性。 又換格載 用以:ΪΓ"4 為本發明之較佳實施例而已’並非 用以限定本發明之實質技術内匕1非 内容係廣義地定義於下述之申請專5明之貫質技術 成之技術實體或方法，若是與 \，任何他人完< 者係完全相同，亦或為同—等效=申範圍所定義 此申請專利範圍中。 句將被視為涵蓋於 【圖式簡單說明】 示意=圖係為習知散熱增益型間球陣列封裝之結構剖面 第2圖係為本發明之具有可 中間板以薛線接至半導體元件的剖面==裝件結構的 18106 10 1245386 第3圖係為本發明之結合有可撓性軟板之 的半導體元件埋設在中間板内並以增層結構連;:::裝件 板的剖面示意圖；以及 可纹性軟 弟4圖係為本發明之結合有可撓性軟板之 的可撓性軟板貼合在半導體裝置一側的剖面十炙伞 【主要元件符號說明】 /、思圖。 11、21散熱板 121 、 221 、 321 開口 14、34 銲線 24 線路增層結構 31 散熱片 32, 絕緣板 33 半導體元件 36 導電元件 39 外部電子裝置 41 電子元件 43 電性連接材 12、22 基板 13、23 晶片 15、25 锡球 3 散熱封裝件 32 封裝基板 321 、 321，開口 35 封裝膠體 38 線路增層結構 4 可撓性軟板 37 、 42 、 42’連接塾 18106 11The package substrate 32 of the set 0 T and the pavement 3 includes a plurality of connection pads 37 ′, and the flexible flexible board 4 has connection pads 42 ′ on its surface, which can be provided with silver glue (silVei lesign) and solder (50%). 】 Electrical connection 4 electronic elements 41, such as electric cable, conductive resin, and 8CD, can be electrically connected to the fan 8 through the flexible flexible board 4.] 81〇6 1245386 has a better range of use. Third Embodiment] Please refer to FIG. 4 as another embodiment of the present invention. The structure of the embodiment is dry. The difference between the embodiment described above lies in the flexible flexible board: Ergo = the other surface of the package 3, for example It can be fixed on the second surface to improve the heat dissipation efficiency of + # 41 connected to the flexible soft board 4. The buns on the guide plate 4 are synthesized-Xu, bit ^ board 4 and heat dissipation package 3 are connected to the door. And; the right volume can expand the configuration space of the electronic component 41 and can have a wide range of applications. From the above-mentioned structure and order, heat dissipation package u flexible board, and can provide configuration space to connect electronics: : The use of interchangeable body components is jealous, ..., to improve the semiconductor ^ _ b sub ^ for the modular structure to provide change The elasticity of the use of the electronic components is changed. The grid is used to: ΪΓ " 4 is the preferred embodiment of the present invention 'is not used to limit the essential technology of the present invention. The non-content is defined broadly below The technical entity or method described in the application of the five-dimensional consistent technology is completely the same as \, any other person < is the same, or the same-equivalent = application scope defined in the scope of the patent application. It is considered to be covered by [Simplified description of the diagram] Schematic = The diagram is a cross-section of the structure of a conventional heat-dissipation inter-ball array package. The second diagram is a cross-section of the present invention with a middle plate that can be connected to a semiconductor element by a Scher wire. = 18106 10 1245386 of the mounting structure FIG. 3 is a semiconductor component combined with a flexible flexible board of the present invention embedded in an intermediate board and connected in a layered structure; ::: cross-sectional view of the mounting board; and The figure of soft texture 4 is a cross-section umbrella of a flexible flexible plate combined with a flexible flexible plate of the present invention bonded to the side of a semiconductor device. [Description of main component symbols] /, Figure. 11 , 21 cooling plate 121, 221, 321 Ports 14, 34 Welding wire 24 Line buildup structure 31 Heat sink 32, Insulation plate 33 Semiconductor element 36 Conductive element 39 External electronic device 41 Electronic component 43 Electrical connection material 12, 22 Substrate 13, 23 Chip 15, 25 Solder ball 3 Thermal package 32 Package substrate 321, 321, opening 35 Package gel 38 Circuit build-up structure 4 Flexible flexible plate 37, 42, 42 'connection 18106 11

Claims (1)

1245386 第93140870號專利申請案 申請專利範圍修正本 1 · 一種結合有可A (94年9月曰 —散熱片r'人板之散熱型半導體裝置，包括: —封裝基板，係結合在該散埶 基板具有至少—開口；…片之表面，且該封舞 至少一半導體元件，#娌讯卢# 内，=結合在該散熱片的表=裝基板之開口 固定於該散熱片上。 Μ可撓性軟板係可彎折 2· ^請專利範圍第μ 散熱片之材質係 衣置，其中，該 3.如申請專利範圍第5陶究其中之-者。 半導體元件係散熱型半導體裝置，其中，該 4 封裝基板表面形咸導H〇nd)連接至封裝基板，並於 ，二可繞性軟板之散熱型半導體裝置，包括： 矣巴緣板，儀牡 具有至少1 〇 · 'σ σ该散熱片之表面，且該絕 至少一半導體元 並且結合在該散仏埋呂又在该絕緣板之開口 至」、—。放熱片的表面；以及 、σ教板，係接置並電性連接該半導 1 】8106(修 1245386 . * 件，以供承接複數個電子元件，該可挽性軟板係可彎折 固定於該散熱片上。 5. 如申凊專利範圍帛4項之散熱型半導體裝置，其中，該 絶緣板及半導體兀件表面形成—線路增層結構，並於線 路增層結構表面形成導電元件。 6. ::請：：範圍第}項或第4項之散熱型半導體裝置， 其中，该半導體元件係為一晶片。 7·=請=範圍第3項或第5項之散熱型半導體裝置, 二’，電元件係為錫球(s〇】der _、銲墊 pad)、接腳（ριη)及導電凸塊其中之一者。 8. 圍第1項之散熱型半導體裝置，其中，該 于裝基板包括有複數個連接墊，且 h性連接材使該可撓二= 接墊接置並電性連接該封裝基板。 9. 如申請專利範圍f 5項之散熱型半導 線路增声紝福勺紅女、— 、置-、中’该 …。構包括有稷數個連接墊，且 有相對應的連接墊，藉由一 1 人板〆、 之連接執垃¥、，+, 电性連接材使該可撓性軟板 ，接墊接置亚電性連接該線路增層結構。 1 0·如申請專利範圍第1或 中mu 月文熱型半導體裝置，其 ^ "T 性軟板復包括複數個#·於η & 墊，拉㈣個叹於另外位置的連接 猎由该連接塾以接置至外部電子裝置。 1 ·如申請專利範圍第1或 中…工 飞項之散熱型半導體裝置，1 中之一者。 ⑨兀件_兀件及光學元件其 】8106(修正本） 2 1245386 12. 如申請專利範圍第11項之散熱型半導體裝置，其中， 該主動元件係為光電元件及半導體元件其中之一者。 13. 如申請專利範圍第11項之散熱型半導體裝置，其中， 該被動元件係為電阻、電容及電感所形成之組合。 3 18106(修正本）1245386 Patent Application No. 93140870 Application for Amendment of Patent Scope 1. A heat sinking semiconductor device incorporating Ke A (September 1994-heat sink r 'board), including:-a package substrate, which is incorporated in the radiator The substrate has at least an opening; a surface of the sheet, and the at least one semiconductor element enclosed in the # 娌 讯 卢 # = a surface bound to the heat sink = the opening on which the substrate is mounted is fixed on the heat sink. M flexibility The flexible board can be bent 2. The material of the heat dissipation sheet of the μ range of the patent scope is clothing, among which, 3. The third one is the same as the fifth of the patent application scope. The semiconductor element is a heat sink type semiconductor device, of which The surface of the 4 package substrate is connected to the package substrate, and the heat-dissipating semiconductor device of the two flexible flexible plates includes: a slab edge plate, and the slab has at least 1 〇 · σσσ The surface of the heat sink, and the at least one semiconductor element is combined with the diffuser, and the opening of the insulation board is opened to, ". The surface of the heat-radiating sheet; and the σ teaching board, which is connected and electrically connected to the semiconductor 1] 8106 (repaired 1245386. * pieces for receiving multiple electronic components, the removable flexible board can be bent and fixed On the heat sink. 5. For example, the heat-dissipating semiconductor device of the patent application No. 4 item, wherein the surface of the insulating plate and the semiconductor element is formed as a circuit layer-increasing structure, and a conductive element is formed on the surface of the circuit layer-increasing structure. 6 :: Please :: Radiation type semiconductor device of the range item} or item 4, wherein the semiconductor element is a wafer. 7 · = Please = Radiation type semiconductor device of the range item 3 or item 5, ', The electrical component is one of a solder ball (s〇) der _, a solder pad, a pin (ριη), and a conductive bump. 8. The heat-dissipating semiconductor device surrounding item 1, wherein, the The mounting substrate includes a plurality of connection pads, and the h-shaped connection material enables the flexible two = pads to be connected and electrically connected to the packaging substrate. 9. For example, the heat dissipation type semiconducting line sound reinforcement of item 5 of the patent application scope 5 Blessed red girl, —, set-, middle 'this .... The structure includes several The connection pad has a corresponding connection pad. The connection is performed by a 1-person board, and the electrical connection material makes the flexible soft board, and the pad is connected to the sub-electricity to connect the circuit. Layer structure. 1 · If the scope of patent application is the first or the medium-temperature thermal semiconductor device, the "T" flexible board includes a plurality of # · 于 η & pads, and sighs at another location. This connection can be used to connect to external electronic devices. 1 · If the scope of patent application is the first or medium ... Industrial heat dissipation type semiconductor device, one of 1. Its] 8106 (revised version) 2 1245386 12. If the heat-dissipating semiconductor device of the 11th scope of the patent application, the active element is one of the photovoltaic element and the semiconductor element. 13. If the 11th scope of the patent application The heat-dissipating semiconductor device, wherein the passive element is a combination of a resistor, a capacitor, and an inductor. 3 18106 (revised version)
TW093140870A 2004-12-28 2004-12-28 Heat-dissipating semiconductor device with a flexible circuit board TWI245386B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112447690A (en) * 2019-08-29 2021-03-05 力成科技股份有限公司 Semiconductor packaging structure with antenna on top

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112447690A (en) * 2019-08-29 2021-03-05 力成科技股份有限公司 Semiconductor packaging structure with antenna on top
CN112447690B (en) * 2019-08-29 2024-05-14 力成科技股份有限公司 Semiconductor packaging structure with antenna on top

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