[go: up one dir, main page]

TWI226137B - Structure of dual-pad high speed photodiode - Google Patents

Structure of dual-pad high speed photodiode Download PDF

Info

Publication number
TWI226137B
TWI226137B TW93100597A TW93100597A TWI226137B TW I226137 B TWI226137 B TW I226137B TW 93100597 A TW93100597 A TW 93100597A TW 93100597 A TW93100597 A TW 93100597A TW I226137 B TWI226137 B TW I226137B
Authority
TW
Taiwan
Prior art keywords
photodiode
substrate
deep
reach
charge region
Prior art date
Application number
TW93100597A
Other languages
Chinese (zh)
Other versions
TW200524172A (en
Inventor
Jin-Shown Shie
Thunter Hwang
Chin-Wen Huang
Ming-Hung Tsai
Chien-Chung Lin
Original Assignee
Integrated Crystal Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Integrated Crystal Technology filed Critical Integrated Crystal Technology
Priority to TW93100597A priority Critical patent/TWI226137B/en
Application granted granted Critical
Publication of TWI226137B publication Critical patent/TWI226137B/en
Publication of TW200524172A publication Critical patent/TW200524172A/en

Links

Landscapes

  • Light Receiving Elements (AREA)

Abstract

A structure of a high-speed reach-through photodiodes, which is made on a thick and high-resistivity layer grown by epitaxy method on a high-conductivity substrate of the same semiconductor type, has both P and N electrodes of the photodiode formed on its upper surface, so that the bottom electrode is accessible for wire bonding from the die surface in specific packages whenever applications are necessary. The structure is characterized by having a deeply etched hole or holes on the surface and down below the substrate boundary, so that the electrical contact from a pad to the high-conductivity substrate, either P- or N-type, can be connected directly through metallization over the surfaces of the etched hole or holes. Therefore the high series resistance of the photodiode device, which is associated with the thick epitaxial layer, can be eliminated, exempting from the conventional method of deep and expensive drive-in diffusion. The performance of the photodiode, both bandwidth and sensitivity, hence can be upgraded.

Description

1226137 五、發明說明(1) --- 一、【發明所屬之技術領域】 本發明係關於一種雙焊墊式光電二極體,尤關於一種 具有極小之時間常數(Time constant )的高速雙焊墊式 光電二極體。 一、【先如技術】 目前高速的光纖通訊的普及需大量利用光電二極體 (Photodiode )來實現。在此應用領域中,頻寬與靈敏度 的良窥為衡量光電二極體性能的兩重要指標。這兩種因素 皆會因為光電二極體結構所寄生之接合面電容(juncti〇n capacitance)及串聯電阻而劣化,此電容及串聯電阻如 圖1之標號CD及匕所示。又,圖2為光電二極體與其互相匹 配的轉移阻抗放大器(TIA)之等效電路圖,其中串聯電 阻Rs、T I A的輸入電阻Rin、及二極體之接合面之空乏電容 (Junction depletion capacitance) CD 將造成流到放大 器T IA之光感應電流的RC時間延遲現象,因而影響頻寬。 由於電路安定性的關係,設計TIA的Rin屬性通常極小,故 一旦Rs相對Rin太大於Rin時,就會引起嚴重的RC時間延遲現 象及信號處理感度的降低,其因在串聯電阻Rin將有礙光感 應之電荷流到T I A,導致電流只能旁通地流過空乏電容CD, 進而降低光偵測功能之靈敏度。因此,為了製造高速且靈 敏的光電二極體,就必須使串聯電阻Rs相對於Rin的大小降 到最低,方能符合實際需求;特別是在高速之傳輸要求 下。1226137 V. Description of the invention (1) --- [Technical field to which the invention belongs] The present invention relates to a dual-pad type photodiode, and more particularly to a high-speed dual-solder with a very small time constant. Pad type photodiode. I. [Xianru Technology] At present, the popularization of high-speed optical fiber communication requires a large number of photodiodes. In this application field, a good look at bandwidth and sensitivity are two important indicators for measuring the performance of a photodiode. Both of these factors are degraded by the junction capacitance and the series resistance parasitic to the photodiode structure. The capacitance and the series resistance are shown as CD and dagger in Figure 1. In addition, FIG. 2 is an equivalent circuit diagram of the photodiode and its matched transfer impedance amplifier (TIA), in which the series resistance Rs, the input resistance Rin of the TIA, and the junction capacitance of the diode (Junction depletion capacitance) CD will cause the RC time delay of the photo-induced current flowing to the amplifier T IA, thus affecting the bandwidth. Due to the stability of the circuit, the Rin property of the design TIA is usually very small, so once Rs is too large relative to Rin, it will cause serious RC time delay phenomenon and decrease in signal processing sensitivity, which will be hindered by the series resistance Rin The light-induced charge flows to the TIA, causing the current to flow only through the empty capacitor CD, thereby reducing the sensitivity of the light detection function. Therefore, in order to manufacture high-speed and sensitive photodiodes, the size of the series resistance Rs relative to Rin must be minimized to meet the actual needs; especially under the requirements of high-speed transmission.

12261371226137

到目前ι 紛紛被使用、止’數十年來已經有各種光電二極體的構造 況;未曾有二然而’各個結構通常只適於其特定之應用情 與通却A? 種通用型光電二極體能適於全部之光電偵測 電二極體社途。本發明係提出一種創新且製作廉宜的光 光通訊啦二構’具有高速及高靈敏度的特性可滿足特定之 粒之上=求。此特殊結構之一特徵在於:一光電二極體晶 電極盘表面’設置有當作焊線(wire bonding )用的P 將其’中電極之兩線墊(Bonding pad),利用特殊之方法 身^ 之一焊線塾與元件之下方電極連接’來降低元件本 造j串I電阻,以及焊線所引致的寄生電容;此雙線墊構 &可配合符合某些特定封裝元件所規定之特別接腳排序; J如一極體晶粒之下基座(Substrate)電極必須與其 在封裝彳匕架(Lead frame)座落之電極呈電性隔離而不能 導電時。 三、【發明内容】 本發明之一特點在提供一種具有貫穿式空乏區 (Reach-through depletion region )構造之低接合面電 容(Junction capacitance)之光電二極體。此貫穿式空 乏區構造具有一厚的高電阻磊晶層,係利用磊晶方法成長 於同型的高導電性半導體基板上而獲得者。形成在此磊晶 圓(Wafer)上之光電二極體,因此具有相等於磊晶厚度 之貫穿空間電荷區及小接合面電容。又此元件之P與N兩電 極之焊線墊(B〇nding Pad)皆形成在晶粒表面,而其中So far, ι have been used, and there have been a variety of photodiode structure conditions for decades; never before, however, each structure is usually only suitable for its specific application and general purpose A? Suitable for all photodiode detection. The present invention proposes an innovative and inexpensive production of optical communication optical two-frame structure, which has the characteristics of high speed and high sensitivity, which can meet specific requirements. One feature of this special structure is that a surface of a photodiode crystal electrode plate is provided with P for wire bonding, and a bonding pad of the middle electrode is formed by a special method. ^ One of the bonding wires 连接 is connected to the lower electrode of the component to reduce the series I resistance of the component and the parasitic capacitance caused by the bonding wire; this dual wire pad structure & can meet the requirements of some specific packaged components Special pin ordering; J. If a substrate electrode under a polar die must be electrically isolated from the electrode seated on the lead frame and cannot conduct electricity. 3. Summary of the Invention A feature of the present invention is to provide a photovoltaic diode with a low junction capacitance with a Reach-through depletion region structure. This penetrating empty region structure has a thick high-resistance epitaxial layer, which is obtained by using an epitaxial method to grow on a high-conductivity semiconductor substrate of the same type. The photodiode formed on this epitaxial circle (Wafer) therefore has a penetrating space charge region and a small junction capacitance equal to the epitaxial thickness. The bonding pads of the P and N electrodes of the device are all formed on the surface of the die, and

第10頁 1226137 五、發明說明(3) 之一銲墊與該晶粒 連之金屬連結。其 面上具有深韻刻孔 之基座部份,俾藉 層直接使該銲塾與 遙晶層帶來元件内 體之頻寬與靈敏度 根據本發明之 疊的P —N或N —P接 又,根據本發 石夕或三一五族化合 本發明之其他 申請專利範圍當可 之基板(Substrate)電極形成電性相 中,該光電二極體之特徵在於:元件表 ,向下貫穿過該高阻磊晶層到達低阻值 由形成在該深餘刻孔表面上的金屬沉積 基座間呈優良之電性連接,以消除由厚 部的高串聯電阻,而得以提升光電二極 〇 一實施樣態,該光電二極體之中具有層 面結構。 明之另一實施樣態,該光電二極體係由 物半導體材料所構成。 目的及優點由隨後之詳細說明及隨附之 更加明白。 四、【實施方式】 首先參見圖1,為了具有高速且高光電靈敏度的特 性’一光電二極體必須使用厚的高電阻係數之基板來增加 空乏區11的深度來達成目的。其因在於空乏區丨丨的寬度係 與兀件接合面之電容值成反比關係,較寬的空乏區丨丨具有 較小的接合電容;另外,較深厚的空乏區入射光線吸收之 效率高而有較佳的光電轉換靈敏度。 然而’一旦使用超過空乏需求厚度的過厚高阻基板 時’將使位在空之區外方的中性基板區丨2帶有一相當的内 邓串如電阻,如圖丨之^所示者。若此内部串聯電阻太高,Page 10 1226137 V. Description of the invention (3) One of the pads is connected to the metal connected to the grain. The base part with deep rhyme cut holes on its surface, the boring layer directly makes the solder joint and the remote crystal layer bring the bandwidth and sensitivity of the inner body of the component according to the present invention. In addition, according to the scope of the present invention and other applications of the Group 315 compound invention, when the substrate electrode forms an electrical phase, the photodiode is characterized by a component table that passes through downwards. The high-resistance epitaxial layer reaches a low-resistance value, and an excellent electrical connection is formed between the metal deposition bases formed on the surface of the deep-recessed engraved hole, so as to eliminate the high series resistance from the thick part, thereby improving the photoelectric diode In the aspect, the photodiode has a layer structure. In another embodiment, the photodiode system is composed of a semiconductor material. The purpose and advantages will be made clearer by the detailed description and the ensuing details. 4. Embodiment First, referring to FIG. 1, in order to have high speed and high photoelectric sensitivity, a photodiode must use a thick, high-resistance substrate to increase the depth of the empty region 11 to achieve the purpose. The reason is that the width of the empty region is inversely proportional to the capacitance value of the joint surface of the element. A wider empty region has a smaller bonding capacitance. In addition, the deeper empty region has a higher efficiency of absorbing incident light and Have better photoelectric conversion sensitivity. However, 'when using an over-thick, high-resistance substrate that exceeds the empty required thickness', the neutral substrate region located outside the empty region will be provided with a comparable internal string such as a resistor, as shown in Figure ^ . If this internal series resistance is too high,

1226137 五、發明說明(4) " - 將使元件速度及靈敏度功能產生嚴重的退化。因此,、甫^ 高速光電元件之製作中會採用磊晶基板來改善,如圖3、吊 示者。即,利用磊晶方法,在相同導電型態且高摻^产 高導電性(低,值)⑦基板之上形成設計所需厚度的^阻 值磊晶層3 1。藉由此種磊晶結構製造光電二極體時,將可 大幅降低上述基板所帶來的串聯電阻值。甚者,具有貫& 型態的空乏區時,將完全免除至下電極基板的串聯電二二 為了防止此種高阻性材料又結構近本質性 (intrinsic)的純度在磊晶製程期間發生自發摻雜 (Auto-doping )現象,而被晶圓背面的高濃度雜質所污 染,一般較好的方法是使用擴散性小的銻元素做摻雜的高 濃度基板32,以簡化製程,如圖3所示者。因銻元素為五1 價,故此種基板屬N型。 ’、· 、然而’在某些已制定之封裝規範中,如To shlink之光 纖連接器’ |^供裝设晶粒的金屬基底44 (如圖4)被規定 必須f與負偏壓,因此,在光電二極體運作時必須承受逆 向偏壓的條件下,不能使上述銻摻雜的N型基板32直接與 金屬基底44呈電性連接。如圖4所示者,解決此問題的方 ^為藉由非導電性的樹脂4 3之黏合而將光電二極體晶片固 晶(Die bonding)在金屬基底44之上,因此可避免兩者 間的電性連通。但是在此狀況下,亦必須使下基座電極呈 現在光電二極體之上表面與一銲墊相連,以提供焊線來構 成迴路。在目前市售的此種光電二極體之中,通常利用深 度的貫穿式擴散製程,例如以N型的磷掺雜,使上表面的1226137 V. Description of the Invention (4) "-Will seriously degrade the speed and sensitivity of the device. Therefore, in the production of high-speed optoelectronic components, epitaxial substrates will be used to improve, as shown in Fig. 3. That is, the epitaxial method is used to form a high-resistance epitaxial layer 31 of a desired thickness on a substrate having the same conductivity type and high dopant production and high conductivity (low value). When a photodiode is manufactured with such an epitaxial structure, the series resistance value brought by the above substrate can be greatly reduced. In addition, when there is an empty region with a constant & type, the series connection to the lower electrode substrate will be completely eliminated. In order to prevent the high-resistance material and the structure's intrinsic purity from occurring during the epitaxial process, Spontaneous doping (Auto-doping) phenomenon, and contamination by high-concentration impurities on the back of the wafer, generally a better method is to use the anti-doping high-concentration substrate 32 with a small diffusion to simplify the process, as shown in the figure 3 shown. Since the antimony element is valence of one to five, this type of substrate is N-type. ', ·,' However, in some established packaging specifications, such as To shlink's fiber optic connectors' | ^ The metal substrate 44 (see Figure 4) for mounting die is required to have f and negative bias, so Under the condition that the photodiode must withstand reverse bias when operating, the above-mentioned antimony-doped N-type substrate 32 cannot be electrically connected directly to the metal substrate 44. As shown in FIG. 4, the solution to this problem is to bond the photodiode wafer to the metal substrate 44 by bonding the non-conductive resin 43, so both can be avoided Between the electrical connections. However, in this case, the lower base electrode must also be connected to a pad on the upper surface of the photodiode to provide a bonding wire to form a circuit. Among such photodiodes currently on the market, a deep penetration diffusion process such as N-type phosphorus doping is usually used to make the upper surface

1226137 五、發明說明(5) 基體銲墊46能電性地通過高阻磊晶層至不方之高導電性的 N型基板41上。 然而’咼速性能的石夕光電二極體具有石夕蠢晶厚度常達 數十微米,所需的驅入擴散(Drive-u diffusion)製程 非常費時,因而成本極高。此外,長時間的高溫驅入製程 更將造成外擴散(Out-diffusion)效應,如圖4之虛線42 所示。亦即,引起基板高濃度銻雜質的朝向磊晶層擴散, 因而使高阻層的有效厚度變薄而且不易控制。如此一來, 將使空乏區寬度變小,因而電容值隨之變大,故 反應速度的設計。 1千 ,就砷化鎵或其它的 於組成材料中砷的高 必大幅影響元件組成 的最終性能,導致無 不適宜進行深度的驅 ’本發明在此提出一 極體結構及其製程。 局摻雜基板的溝槽來 接著在餘刻溝槽的表 外部配線的上銲墊4 6 性,藉由此種結構可 電阻值並趨近於無。 屬的真空塗佈與回火 散(Out-diffusion ) 丹者 而言,由 散過程勢 電二極體 之兀件並 因此 的光電二 形成深達 散製程, 封裝體之 優良導電 内部串聯 行此種金 的向外擴 療氣壓之故,高溫的驅入擴 的電性及與此息息相關的光 去預期的結果,故坤化鎵類 入擴散製程。 、 種足以改善上述缺點之創新 如圖5所示,藉由蝕刻製程 取代上述習知的深層驅入擴 面覆蓋金屬層,使其與提供 電性相連。由於覆蓋金屬的 大幅地降低此光電二極體的 由於可以在極低的溫度中進 後製程,故上述基板銻雜質 現象幾可同時忽略,而得1226137 V. Description of the invention (5) The substrate pad 46 can electrically pass through the high-resistance epitaxial layer to the N-type substrate 41 with a different high conductivity. However, the Shixi Photodiode with fast performance has a stupid thickness of tens of micrometers. The required drive-u diffusion process is very time-consuming and therefore extremely costly. In addition, the long-term high temperature drive-in process will cause an out-diffusion effect, as shown by the dashed line 42 in FIG. 4. That is, it causes the substrate with a high concentration of antimony impurities to diffuse toward the epitaxial layer, thereby making the effective thickness of the high-resistance layer thin and difficult to control. In this way, the width of the empty region will be reduced, and the capacitance value will be increased accordingly, so the response speed is designed. 1 thousand, regarding the high level of gallium arsenide or other arsenic in the constituent materials will greatly affect the final performance of the component composition, resulting in no unsuitable deep driving. The present invention proposes a polar structure and its process. The locally doped substrate trenches are followed by the upper pads 4 6 of the external wiring on the surface of the remaining trenches. With this structure, the resistance value can be close to none. For vacuum coating and tempering (Out-diffusion), as far as the Danish process is concerned, the deep-diffusion process is formed by the components of the potential diode and therefore the photoelectric two, and the excellent conductive inside of the package is connected in series. Due to the gold's outward expansion therapy pressure, the high temperature drives the expansion of the electrical properties and the light related to this expected result, so the gallium is incorporated into the diffusion process. An innovation that is sufficient to improve the above disadvantages is shown in Fig. 5, which replaces the conventional deep-layer drive-in cover metal layer by an etching process to make it electrically connected. Since the covering metal greatly reduces the photodiode, since the post-processing can be performed at extremely low temperatures, the above-mentioned antimony impurities on the substrate can be almost ignored at the same time.

第13頁 1226137 五、發明說明(6) 以保持原來指定的磊晶層厚度。 藉由熟知的異方向性餘刻(A η - i s 〇 t r 〇 p i c )可形成v 型的麵刻溝槽來達到上述目的,如圖5所示者。就石夕^光電 一極體而言,可使用例如氫氧化鉀(κ〇ίΙ )等蝕刻液在 (1 0 〇 )的矽晶圓面上蝕刻成倒金字塔形的V型溝槽,且其 開口及深度尺寸可以被精確地控制。溝槽之(丨11 )表面 ,八彳員斜性在電子束鍍金屬膜時可充份地被金屬沉積層覆 蓋其上’而無Step coverage的問題。 、就砷化鎵系的材料而言,則亦有其它熟知的異方性蝕 刻液可以採用。其知識廣見於相關半導體製程之教科書 上。 曰 此外除了上述藉由異方向性餘刻形成溝槽以外,亦 Ϊ ^ ^不會使钱刻後之槽面過於陡山肖而能被充份地覆 ^屬層沉積的蝕刻方法。例如,如圖6所示,使用熟知 、=〇3、CHgCOOH及“所組成的⑶―8蝕刻液進行等向性 石夕進K 2 !!石夕㈣速度(每分鐘約7· 4微米)。但對 70 %於垂i方向7 Τ具:定程度之側向的蝕刻效應(约 性。、 "故可形成傾斜之碗形曲面而得覆蓋 ^ = t =述者,僅為了用於方便說明本發明之較佳實施 發明所做的任何變】狹㊁於實施例^ ^ 支更 s屬本發明申請專利之範圍。Page 13 1226137 V. Description of the invention (6) In order to maintain the thickness of the epitaxial layer originally specified. The v-shaped face-etched grooves can be formed by the well-known anisotropic relief (A η-is s 0 t r 0 p i c), as shown in FIG. 5. In the case of the Shixun photodiode, an etching solution such as potassium hydroxide (κ〇ίΙ) can be used to etch an inverted pyramid-shaped V-shaped groove on the silicon wafer surface, and its Opening and depth dimensions can be precisely controlled. On the (11) surface of the trench, the eight-member slope can be fully covered by the metal deposition layer when the electron beam is plated on the metal film 'without the problem of step coverage. As far as gallium arsenide-based materials are concerned, other well-known anisotropic etching solutions can also be used. Its knowledge is widely found in textbooks on related semiconductor processes. In addition to the above-mentioned etching method of forming trenches by using anisotropic relief, the method of etching will not make the surface of the grooves after money engraving too steep and can be fully covered with metal layer deposition. For example, as shown in FIG. 6, the isotropic Shi Xijin K 2 !! Shi Xizhen speed (approximately 7.4 micrometers per minute) is performed using a well-known CD-8 etching solution consisting of = 03, CHgCOOH, and " . But for 70% in the vertical direction 7T with: a certain degree of lateral etching effect (approximate., &Quot; so it can form a tilted bowl-shaped curved surface to cover ^ = t = the description, only for It is convenient to explain any changes made by the preferred embodiments of the present invention.] Narrower than the examples ^ ^ It is within the scope of the present invention to apply for a patent.

1226137 圖式簡單說明 五、【圖式簡單說明】 圖1為習知具有P+ — r接面結構的高速光電二極體,其 中在空乏區之外的高阻中性區具有不良的内部串聯電阻 值。 圖2為光電二晶體與其互相匹配的放大器之等效電路 圖’其中i4為流經TIA之有效信號電流。 圖3為具有磊晶基板的高速光電二極體結構。 圖4為兩銲墊式p 一 n光電二極體的結構,具有晶粒與 負壓之金屬基底44互相黏合但電性絕緣的特性。 圖5為本發明之一創新的高速光電二極體結構,其中 特點為藉由異方向性蝕刻而消除習知的串聯電阻。 圖6為本發明之另一創新的高速光電二極體結構,其 中特點為藉由等向性蝕刻而消除習知的串聯電阻。 立件符號說明: Η 空乏區(Dep 1 e t i on reg i on )或空間電荷區(Space charge region ) 12 中性區(Neutral region) 13 活性區鋅墊(Active bonding pad) 14 基體下電極(Substrate lower electrode) 15 貫穿式(Reach- through )空乏區界面(Junet i on ) 16 氧化層(Oxidation layer) 31 高電阻係數蠢晶層(H i gh res i st i v i ty ep i tax i a 1 layer )1226137 Brief description of the diagram 5. Simple explanation of the diagram Figure 1 is a conventional high-speed photovoltaic diode with a P + -r junction structure, in which the high-resistance neutral region outside the empty region has poor internal series resistance value. Fig. 2 is an equivalent circuit diagram of the photodiode and its matched amplifier. 'I4 is the effective signal current flowing through the TIA. FIG. 3 is a high-speed photodiode structure with an epitaxial substrate. Fig. 4 shows the structure of a two-pad p-n photodiode, which has the characteristics that the crystal grains and the negative-pressure metal substrate 44 are adhered to each other but are electrically insulated. FIG. 5 is an innovative high-speed photodiode structure according to the present invention, which is characterized by eliminating conventional series resistance by anisotropic etching. FIG. 6 is another innovative high-speed photodiode structure of the present invention, which is characterized by eliminating the conventional series resistance by isotropic etching. Description of symbols of standing pieces: D Dep 1 eti on reg i on or Space charge region 12 Neutral region 13 Active bonding pad 14 Substrate lower electrode electrode) 15 Reach-through empty area interface (Junet i on) 16 Oxidation layer 31 High resistivity stupid layer (H i gh res i st ivi ty ep i tax ia 1 layer)

第15頁 1226137 圖式簡單說明 32 高摻雜導電性基板(High doping conductive substrate ) 41 驅入式擴散導線(Dr i ve-i n d i f f used conduct or ) 42 基座外擴散後之界面(Substrate out diffusion boundary ) 43 電 Ί緣性環氧樹脂(Non-conductive epoxy) 46 連結基體之+ 4. + , u ,. 、銲塾(Substrate connected bonding pad )1226137 on page 15 Brief description of drawings 32 High doping conductive substrate 41 Dr i ve-i ndiff used conduct or 42 Substrate out diffusion interface boundary) 43 Non-conductive epoxy 46 + 4. +, u,., Substrate connected bonding pad

第16頁Page 16

Claims (1)

1226137 六、申請專利範圍 1· 一種具有貫穿式(Reach-through )空間電荷區(Space charge region)的局速光電二極體,此貫穿式空間電荷 區的構造係利用磊晶方法成長厚的高電阻係數磊晶層在同 導電型之高摻雜導電性半導體基板上,其中該光電二極體 之P與N兩電極皆佈置在晶粒表面,且其中之一個基體銲墊 則具有通至該高導電性基板相連之金屬佈局, 該光電二極體之特徵係在於: 其上表面具有深蝕刻孔,向下貫穿過該高阻值磊晶層 而達磊晶層下方之基板部份,俾藉由沉積在該深刻孔之表 面的一金屬層構造而直接呈電性連接於該銲墊與基座電極 間,故得以消除由厚蠢晶層内部所帶來的高串聯電阻,藉 以提升光電二極體之頻寬與靈敏度。 2·如中請專利範圍第1項之具有貫穿式(Reach-through ) 空間電荷區的高速光電二極體,其中該深蝕刻孔係指藉由 異方性蝕刻技術所形成之傾斜V型凹槽為特徵者。 3·如中請專利範圍第1項之具有貫穿式(Reach-through ) 空間電荷區的高速光電二極體,其中該深蝕刻孔係指藉由 等方性蝕刻技術所形成之傾斜碗型曲面凹槽為特徵者。 4.如中請專利範圍第1項之具有貫穿式(Reach-through) 空間電荷區的光電二極體,其中該光電二極體係指P 一 N或 N — P接面者。1226137 6. Scope of patent application 1. A local-speed photodiode with a Reach-through space charge region. The structure of this penetrating space-charge region uses the epitaxial method to grow thick and high The resistivity epitaxial layer is on a highly doped conductive semiconductor substrate of the same conductivity type, in which the P and N electrodes of the photodiode are arranged on the surface of the die, and one of the substrate pads has a lead to the The metal layout of the high-conductivity substrate connected to the photodiode is characterized in that: the upper surface has deep-etched holes that pass through the high-resistance epitaxial layer and reach the substrate portion below the epitaxial layer. A metal layer structure deposited on the surface of the deep hole is directly electrically connected between the pad and the base electrode, so the high series resistance caused by the thick stupid crystal layer can be eliminated, thereby improving the photoelectricity. Bandwidth and sensitivity of the diode. 2. The high-speed photodiode with a Reach-through space charge region as described in item 1 of the patent, wherein the deep-etched hole refers to an inclined V-shaped recess formed by anisotropic etching technology. The groove is characteristic. 3. The high-speed photodiode with a Reach-through space charge region as described in item 1 of the patent, wherein the deep-etched hole refers to an inclined bowl-shaped curved surface formed by an isotropic etching technique. The groove is characteristic. 4. The photovoltaic diode with a Reach-through space charge region as described in item 1 of the patent, wherein the photovoltaic diode system refers to a P-N or N-P junction. 第17頁 1226137Page 12 1226137 第18頁Page 18
TW93100597A 2004-01-09 2004-01-09 Structure of dual-pad high speed photodiode TWI226137B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW93100597A TWI226137B (en) 2004-01-09 2004-01-09 Structure of dual-pad high speed photodiode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW93100597A TWI226137B (en) 2004-01-09 2004-01-09 Structure of dual-pad high speed photodiode

Publications (2)

Publication Number Publication Date
TWI226137B true TWI226137B (en) 2005-01-01
TW200524172A TW200524172A (en) 2005-07-16

Family

ID=35613552

Family Applications (1)

Application Number Title Priority Date Filing Date
TW93100597A TWI226137B (en) 2004-01-09 2004-01-09 Structure of dual-pad high speed photodiode

Country Status (1)

Country Link
TW (1) TWI226137B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8410568B2 (en) 2008-08-29 2013-04-02 Tau-Metrix, Inc. Integrated photodiode for semiconductor substrates

Also Published As

Publication number Publication date
TW200524172A (en) 2005-07-16

Similar Documents

Publication Publication Date Title
US4831430A (en) Optical semiconductor device and method of manufacturing the same
US6175141B1 (en) Opto-electronic sensor component
KR100889365B1 (en) 3D image sensor and its manufacturing method
US4847210A (en) Integrated pin photo-detector method
US7863701B2 (en) Optical semiconductor device and method for manufacturing the same
US20140367695A1 (en) Trench high electron mobility transistor device
US20170133362A1 (en) Method for producing trench high electron mobility devices
US6690078B1 (en) Shielded planar dielectrically isolated high speed pin photodiode and method for producing same
JPH01205564A (en) Optical semiconductor device and its manufacture
JP4443981B2 (en) Semiconductor photodetector element and photodetector
CN106169508A (en) A kind of two-way ultra-low capacitance Transient Voltage Suppressor and preparation method thereof
TWI226137B (en) Structure of dual-pad high speed photodiode
KR100564587B1 (en) Photodiode and its manufacturing method
JP6658910B2 (en) Back-illuminated light receiving element and optical module
US7214971B2 (en) Semiconductor light-receiving device
US10361326B2 (en) Advanced CPV solar cell assembly process
JP3592115B2 (en) Photodetector with built-in circuit
JP2700356B2 (en) Light receiving element
JP6988103B2 (en) Manufacturing method of semiconductor devices, semiconductor devices
TWI228836B (en) Low-parasitic structure of reach-through photodiode
US20070200199A1 (en) Semiconductor bulk resistance element
CN108346711B (en) Improved Fabrication Method of Vertical Structure Photodetector
KR100518059B1 (en) switching diode and its manufacturing method
JP2000269537A (en) Semiconductor light receiving device
CN1901239A (en) Penetrating photodiode with low parasitic capacitance structure