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TW413946B - Semiconductor apparatus and method for manufacturing same - Google Patents

Semiconductor apparatus and method for manufacturing same Download PDF

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Publication number
TW413946B
TW413946B TW088103918A TW88103918A TW413946B TW 413946 B TW413946 B TW 413946B TW 088103918 A TW088103918 A TW 088103918A TW 88103918 A TW88103918 A TW 88103918A TW 413946 B TW413946 B TW 413946B
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Taiwan
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oxide film
trench
silicon
silicon oxide
film
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TW088103918A
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Chinese (zh)
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Hiroki Koga
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Nippon Electric Co
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

A semiconductor device and a manufacturing method for the semiconductor device in which there is no defect such as deteriorated switching characteristics of a MOS transistor or long-term reliability of a gate oxide film, increased leakage current between a gate electrode and a silicon substrate or the deteriorated gate withstand voltage, otherwise produced due to excessive etching of a silicon oxide film in an outer trench rim neighboring to a device area to form a recess to expose the shoulder of a device area. In order to prevent this from occurring, a silicon oxide film spacer is provided on a sidewall section of an opening on a silicon substrate after an opening is formed in the silicon nitride film, in order to form a trench smaller in dismeter than the diameter of the opening in the silicon nitride film.

Description

413946 五、發明說明(1) 發明背景 . ’ 發明之領域 本發明係關於一種半導體裝置具有渠溝隔離構造,用 以將形成在半導體基板上的活動區隔離及絕緣;及其製造 方法。 _ 相關技術之描述 在LSI的裝置隔離技術中,有使用一種渠溝膈離構 造,在於在半導體基板之表面上所形成的.裝置區之間設置 一渠溝並以絕緣膜填入渠溝的内部以達成隔離及絕緣的目 的。在此渠溝隔離構造的製造方法中,在不使裝置的性能 或信賴性惡化方面其為重要因素之一。 然而,藉由習知技術所形成的渠溝隔離的形狀為,將 靠近裝置區之肩部的渠溝頂部上的氧化矽膜過度地蝕刻, 以形成一凹部以露出裝置區的肩部。在此渠溝隔離中,有 一個問題有關於其後形成之MOS電晶體的開關特性或閘極 氧化膜的長期信賴性惡化、閘極電極與矽基板間的漏洩電 流增加或閘極耐壓下降。 現在為了處理這些問題,在特開平07-193083號公報 中揭露有一種方法藉由後續步驟進行渠溝肩部之溝槽的填 入;在特開平09-321134號公報所揭露有一種改變裝置區 的中央及肩部的載子濃度的方法以緩和肩部的電場集中。 以下將參考圖5a~5d及圖6e〜6g說明目前所使用的技 術,其為逐步顯示半導體裝置之習知製造方法的橫剖面 圖。413946 V. Description of the invention (1) Background of the invention. Field of the invention The present invention relates to a semiconductor device having a trench isolation structure for isolating and insulating active regions formed on a semiconductor substrate; and a method for manufacturing the same. _ Description of related technology In the device isolation technology of LSI, a trench separation structure is used, which is formed on the surface of a semiconductor substrate. A trench is set between the device areas and the trench is filled with an insulating film. Internal to achieve the purpose of isolation and insulation. This method of manufacturing the trench isolation structure is one of the important factors in that it does not deteriorate the performance or reliability of the device. However, the shape of the trench isolation formed by the conventional technique is to over-etch the silicon oxide film on the top of the trench near the shoulder of the device region to form a recess to expose the shoulder of the device region. In this trench isolation, there are problems related to the switching characteristics of the MOS transistor formed later or the long-term reliability of the gate oxide film, the leakage current between the gate electrode and the silicon substrate, or the breakdown voltage of the gate. . In order to deal with these problems, a method is disclosed in Japanese Patent Application Laid-Open No. 07-193083 to fill the grooves at the shoulders of the trench by subsequent steps; a device changing area is disclosed in Japanese Patent Application No. 09-321134. The method of carrier concentration in the center and shoulders is to ease the electric field concentration in the shoulders. 5a to 5d and FIGS. 6e to 6g will be described below, which are cross-sectional views showing a conventional manufacturing method of a semiconductor device step by step.

第5頁Page 5

‘首先,如圖5a所示,藉由熱氧化法在矽基板21,上形成 ίΐίτίΐΐΪ22,達5〜2〇ηΠ1的厚度,且藉由化學氣相沈積 ccvj))法在其上形成氮化矽膜23,達1〇〇~3〇〇nm的膜厚度。 接著,使用光刻技術,將光阻圖案24形成在將成為裝置區 的預定區上。接著,使用‘乾式蝕刻技術,藉由非等向性姓 刻將氮化矽膜23與第1氧化矽膜22以此順序移除。 接著,如圖5b所示,使用氮化矽膜23作為餘刻光罩, 非等向性地姓刻矽基板2 1以形成渠溝2 5。若非等向性乾式 蚀刻係使用C F 4與Η B r的氣體混合物所執行,則得到梦與氮 化矽或氧化矽膜的選擇比率為1 〇左右的量級。進行餘刻使 得渠溝25將為150〜5 0 0nm深。 接著’如圖5c所示’藉由熱氧化法在渠溝25的内壁上 形成第2氧化矽膜26。熱氧化的目的為移除由乾式蝕刻所 產生在渠溝25之内壁表面上的損害。如此一來,.氧化膜的 厚度範圍在10〜30nm是適當的。接著氮化矽膜23用作氧化 防止膜,以使妙基板21之表面上的裝置區不被氧化。 接著,如圖5d所示,使用CVD法,在整個表面上形成 第3氧化矽膜27。形成之膜的厚度取決於渠溝25的深度、 第1氧化矽膜22的膜厚度與氮化矽膜23的膜厚度,將第3氧 化矽膜27的膜厚度決定成使得第3氧化矽膜27的膜厚度實 質上等於渠溝25深度、第1氧化矽膜2 2之膜厚度與氣化碎 瞑23之膜厚度的總和。以第3氧化矽膜27完全填入渠溝25 的内部。 一 接著’如圖6e所示,使用化學機械研磨(cjjp)法將第3'Firstly, as shown in FIG. 5a, a silicon oxide layer 21 is formed on the silicon substrate 21 by a thermal oxidation method to a thickness of 5 ~ 20nΠ1, and silicon nitride is formed thereon by a chemical vapor deposition method (ccvj)). The film 23 has a film thickness of 100 to 300 nm. Next, a photoresist pattern 24 is formed on a predetermined region to be a device region using a photolithography technique. Next, using a 'dry etching technique', the silicon nitride film 23 and the first silicon oxide film 22 are removed in this order by an anisotropic engraving. Next, as shown in FIG. 5b, a silicon nitride film 23 is used as a relief mask, and the silicon substrate 21 is etched anisotropically to form a trench 25. If the anisotropic dry etching is performed using a gas mixture of C F 4 and Η B r, the selection ratio of dream to silicon nitride or silicon oxide film is on the order of 10. The remainder is performed so that the trench 25 will be 150 to 500 nm deep. Next, as shown in FIG. 5c, a second silicon oxide film 26 is formed on the inner wall of the trench 25 by a thermal oxidation method. The purpose of thermal oxidation is to remove damage on the inner wall surface of the trench 25 caused by dry etching. In this way, it is appropriate that the thickness of the oxide film ranges from 10 to 30 nm. The silicon nitride film 23 is then used as an oxidation prevention film so that the device region on the surface of the substrate 21 is not oxidized. Next, as shown in Fig. 5d, a third silicon oxide film 27 is formed on the entire surface using a CVD method. The thickness of the formed film depends on the depth of the trench 25, the thickness of the first silicon oxide film 22, and the thickness of the silicon nitride film 23. The thickness of the third silicon oxide film 27 is determined such that the third silicon oxide film The film thickness of 27 is substantially equal to the sum of the depth of the trench 25, the film thickness of the first silicon oxide film 22, and the film thickness of the gasification fragment 23. The inside of the trench 25 is completely filled with a third silicon oxide film 27. Next, as shown in FIG. 6e, the third step is to use the chemical mechanical polishing (cjjp) method

413946 五、發明說明(3) ^化矽膜27研磨。進行此研磨真到將氮化矽膜23丄的第3 化矽膜27完全除去為止,以露出氮化矽膜23的表面。然 =,需調整研磨時間以使氮化矽膜23不被完全除去。此 择’ ^成在I化石夕膜23中的開孔寬度χ3較渠溝6的開孔寬 2。此乃由於第2氧化矽膜2 6係藉由熱氧化法形成在 又等於氣化矽膜23的開孔寬度的渠溝的内壁上。 在對矽表面熱氧化時,使矽表面縮減了相當於氧化膜 一半的距離。若在此構造中第2氧化矽膜2 6的膜厚 二為3 0nm ’則當與氮化矽膜23的開孔寬度χ3比較時,渠 寬度的一側將增加約1511111,渠溝碰度的兩侧則增加3〇ηπ^ 接著’如圖6 f所示,使用加熱到約丨5 〇它的磷酸溶 液’將氮化矽膜23選擇性除去。以第2氧化矽膜26與第3 ::膜27填入渠溝25的内部以使得只有第3氧化矽膜27突 ^在碎基板21的表面上。在碎基板21的表面上/膜2 = 在…21上的第3氧切膜27單側的 寬度較渠溝25的寬度窄z3。 接著’如圖6g所示,使用氫氟酸溶液,將第1 膜22姓刻除去。接荖,耕功主工L t 梦 .,.J 2 Γ 對碎基板2i表面上的裝置區進行熱 3〇nm。接著藉由氫氟酸溶液將如此形成 =7 5 =膜加以#刻除去。在濕式#刻製程的過程中, ΐ i 3 λ板η面上的第3氧化石夕膜2 7也被钱刻除去,使 :第氧化矽膜27的尚度縮減到接近矽基板21之表面的 /X. ° 在深入研究本發明的過程· 413946 五、發明說明(4) ~ •當藉由此濕式蝕刻製程來餑刻第3氧化砂眩?7.的办中 部分時,在渠溝的内壁及與其距離z3 矽膜27的犬出 分。於是,若在此情況下進行濕式姓^之間未設突出部 板21上的第3氧化梦琪27已被钮刻到預設’的則一在突出於梦基 渠溝之内部的第2氧化矽膜26的頂部也馬上=逐=地钕入 刻,直到最後形成凹部28為止,如圖6g所示结果是在形 成於渠溝25的兩側的裝置區中形成肩部29。 發明概要 在以習知方法所形成之半導遒裝置的肩部29中,電場 傾向於集中,以致於若是將凹部28形成在渠溝25中,則產 生如此形成的Μ 0 S電晶體的開關特性惡化或是閘極氧化膜 的長期彳§賴性惡化的問題。此外’閘極電極與梦基板間的 漏洩電流傾向於增加’或閘極耐壓傾向於惡化。 有鑑於上述問題’本發明的目的為提供一種半導體裝 置與其製造方法’其中可以防止在埋入渠溝表面的氧化矽 膜表面形成凹部’或如此形成的MOS電晶體的開關特性惡 化。本發明的另一目的為防止閘極氧化膜的長期信賴性惡 化、閘極電極與石夕基板間的漏浪電流增加或閘極耐壓惡 化。 本發明的其它目的當由整份說明書内容而更加明白。 為了完成上述目的’本發明提供一種裝置,其中渠溝 的直徑小於第1絕緣膜中的開孔,-藉由在半導體基板上形 成第1絕緣膜(如圖1 C中的氮化矽膜3 );接著在第1絕緣膜413946 V. Description of the invention (3) ^ Silicon film 27 is polished. This polishing is performed until the third silicon film 27 of the silicon nitride film 23 丄 is completely removed, so that the surface of the silicon nitride film 23 is exposed. However, the polishing time needs to be adjusted so that the silicon nitride film 23 is not completely removed. In this case, the opening width χ3 in the fossil evening film 23 is larger than the opening width 2 of the trench 6. This is because the second silicon oxide film 26 is formed on the inner wall of the trench which is equal to the opening width of the vaporized silicon film 23 by a thermal oxidation method. When the silicon surface is thermally oxidized, the silicon surface is reduced by a distance equivalent to half the oxide film. If the film thickness 2 of the second silicon oxide film 26 in this structure is 30 nm, then when compared with the opening width χ3 of the silicon nitride film 23, one side of the channel width will increase by about 1511111, and the channel and groove collision degree Both sides of the silicon nitride film are increased by 30 ηπ ^. Then, as shown in FIG. 6f, the silicon nitride film 23 is selectively removed by using a phosphoric acid solution heated to about 50 °. The inside of the trench 25 is filled with the second silicon oxide film 26 and the third :: film 27 so that only the third silicon oxide film 27 protrudes on the surface of the broken substrate 21. On the surface of the broken substrate 21 / film 2 = the width of one side of the third oxygen cut film 27 on ... 21 is narrower than the width of the trench 25 by z3. Next, as shown in FIG. 6g, the first film 22 is engraved and removed using a hydrofluoric acid solution. Then, the main farm worker L T Meng ... J 2 Γ heats the device region on the surface of the broken substrate 2i by 30 nm. The film thus formed was then removed by a hydrofluoric acid solution. During the wet #etching process, the third oxide film 27 on the n plane of the ΐ i 3 λ plate was also removed by money engraving, so that the survivability of the second silicon oxide film 27 was reduced to be close to that of the silicon substrate 21 Surface of / X. ° In-depth study of the process of the present invention · 413946 V. Description of the invention (4) ~ • When to etch the third oxide of sand with this wet etching process? 7. During the middle part, the dogs are on the inner wall of the trench and the silicon film 27 with a distance of z3. Therefore, in this case, if the third oxide Mengqi 27 on the wet plate ^ with no protruding portion 21 has been engraved to the preset ', the first one protruding from the inside of the Mengji trench 2 The top of the silicon oxide film 26 is also immediately carved into the ground until the recess 28 is finally formed. As shown in FIG. 6 g, the shoulder 29 is formed in the device region formed on both sides of the trench 25. SUMMARY OF THE INVENTION In the shoulder 29 of a semiconducting device formed by a conventional method, the electric field tends to be concentrated, so that if the recess 28 is formed in the trench 25, a switch of the M0S transistor thus formed is generated Deterioration of characteristics or long-term deterioration of gate oxide film. In addition, 'the leakage current between the gate electrode and the dream substrate tends to increase' or the gate withstand voltage tends to deteriorate. In view of the above-mentioned problem, an object of the present invention is to provide a semiconductor device and a method of manufacturing the same, in which it is possible to prevent the formation of a recess on the surface of a silicon oxide film buried in a trench surface or the deterioration of the switching characteristics of a MOS transistor thus formed. Another object of the present invention is to prevent deterioration of the long-term reliability of the gate oxide film, increase of leakage current between the gate electrode and the Shixi substrate, or deterioration of the withstand voltage of the gate. Other objects of the present invention will become clearer from the contents of the entire specification. In order to accomplish the above object, the present invention provides a device in which the diameter of the trench is smaller than the opening in the first insulating film, by forming a first insulating film on a semiconductor substrate (such as a silicon nitride film 3 in FIG. 1C). ); Then on the first insulating film

第8頁 413946 五、發明說明(5) 的内壁上形成第2絕緣膜(如圈l.c中的氧化矽膜隔棱5);與 接著使用第1與第2絕緣膜所設的開孔作為光罩來形成渠 溝,或藉由只使用第1絕緣膜(如圖3 c中的氮化矽膜1 3 )的 開孔作為光罩來形成渠溝,與接著在渠溝的内壁上形成磊 晶層(如圖3c中的矽磊晶層16)。更具體來說,本發明的裝 置具有下述特點: 在第1實施態樣中,本發明提供一種在基板.中具有渠 溝的半導體裝置的製造方法,包含:在該基板上形成具有 預設開孔的第1絕緣膜;在第1絕緣膜中的開孔的内壁上配 置第2絕緣膜;與使用第1絕緣膜邊第2絕緣膜所設的開孔 作為光罩來形成渠溝。 ΐ 在第2實施態樣中,本發明提供一種在基板中具有渠 溝的半導體裝置的製造方法,包含:在該基板上形成具有 預設開孔的第1絕緣膜;使用第1絕緣膜中的開孔作為光罩 來形成渠溝;藉由沈積在渠溝的内壁上來形成蟲晶層;與 .在磊晶層的内壁上配置第2絕緣膜。 本發明又提供半導體裝置的製造方法,包含以下步 驟:a ) 在矽基板上連續地形成第1氧化矽膜2與氮化矽膜 3 ; b) 藉由光蝕刻步驟在第1氧化矽膜2與氮化矽膜3中形 成開孔;c) 在氮化矽膜3中的開孔的側壁上配置氧化矽膜 隔板5 ; d) 使用氮化矽膜3與氧化矽膜隔板5作為光罩來形 成渠溝6 ; e ) 在渠溝6的内壁上形成第3氧化矽膜7 ; f ) 將 第4氧化矽膜8埋入該渠溝6的内部中;g) 除去氮化矽膜 3,與?1) 除去突出於基板上的第3氧化矽膜7與第4氧化矽Page 8 413946 V. Description of the invention (5) A second insulating film is formed on the inner wall (such as the silicon oxide film 5 in the circle lc); and then the openings provided by the first and second insulating films are used as light The trench is formed by using a mask, or the trench is formed by using only the opening of the first insulating film (such as the silicon nitride film 1 3 in FIG. 3 c) as a photomask, and then forming a trench on the inner wall of the trench. Crystal layer (such as the silicon epitaxial layer 16 in Figure 3c). More specifically, the device of the present invention has the following characteristics: In a first embodiment, the present invention provides a method for manufacturing a semiconductor device having a trench in a substrate. The method includes: forming a substrate having a preset on the substrate; A first insulating film having openings; a second insulating film disposed on an inner wall of the opening in the first insulating film; and a trench formed by using the opening provided in the second insulating film beside the first insulating film as a photomask. ΐ In a second aspect, the present invention provides a method for manufacturing a semiconductor device having a trench in a substrate, comprising: forming a first insulating film having a predetermined opening on the substrate; and using the first insulating film The openings are used as a photomask to form a trench; a worm crystal layer is formed by depositing on the inner wall of the trench; and a second insulating film is disposed on the inner wall of the epitaxial layer. The present invention also provides a method for manufacturing a semiconductor device, including the following steps: a) continuously forming a first silicon oxide film 2 and a silicon nitride film 3 on a silicon substrate; b) performing a photo-etching step on the first silicon oxide film 2 Forming openings in the silicon nitride film 3; c) disposing a silicon oxide film spacer 5 on the sidewall of the opening in the silicon nitride film 3; d) using the silicon nitride film 3 and the silicon oxide film spacer 5 as Photomask to form the trench 6; e) forming a third silicon oxide film 7 on the inner wall of the trench 6; f) burying a fourth silicon oxide film 8 into the interior of the trench 6; g) removing silicon nitride Films 3 and 1) Remove the third silicon oxide film 7 and the fourth silicon oxide protruding from the substrate

第9頁 413946 五、發明說明(6) 膜.8 。 明 說 單 簡' 之 式 圖 為 β :剖 ~1;橫 的 圖法 方 成 形 溝 渠 的 例 施 實 第 之 明 發 本 照 依 示 顯 :步J 圖 面 依®依 示豸示 顯㊣顯 步’步 逐®逐 為δ為 Id~2橫? θ & 2^3 圖法圖 方 成 形 形 溝 溝 El、-'^,-'Μ/ 的 的 例例 施 施 實 實 ύ 11 CSI 第續第 之延之 明的明 發d發 1* 本~本 形 溝 渠 的 例 施 實 2 第 之 明 本 照 依 示 顯 。步 圖逐 f87 S為 剖h橫T -C? e 4 法圖 方 成 音 I 橫4 ^ 5 法圖 方 成 圖 面 為 其 3 圖 知 習 示 顯 為 圖 面 剖 。橫 續的 延法 的方 d成 3 ~形 a 溝 渠 為 其 圖 面 剖 橫 的 法 方 成 形 溝 渠 知 習 示 顯。 為續 6g延 e-的 6 d 圖5 ί a 5 圖 明| 說一 -g-3 # 符 板 基 矽 膜 化 氧 板 隔 膜案膜 砂圖碎 1化阻化溝:彳 第II光氧渠第第 i lii 一 一一 2 3 4 5 6 7 8 溪漢 匕匕 /1 /1 氧氧 第10頁 413946 五、發明說明σ) 1 1 ~矽基板 1 2 ~第1氧化矽膜 1 3〜氮化矽膜 1 4〜光阻圖案 1 5〜渠溝 1 6 ~磊晶矽層 1 7 ~第2絕緣膜 .. 1 8〜第3氧化矽膜 2 1〜矽基板 2 2〜第1氧化矽膜 〜 2 3 ~氮化矽膜 < 2 4 ~光阻圖案 2 5 -渠溝 2 6〜第2氧化矽膜 2 7 ~第3氧化矽膜 28〜四部 2 9 *肩部 鮫佳實施例之詳細說明 以下將參考較佳實施例說明本發明。 在使用形成在矽基板之具有預設開孔的氮化矽膜(圖( 1 c中的3 )作為蝕刻光罩以形成渠溝時,在依照本發明之半' 導體裝置製造方法的較佳實施例中,將氧化矽膜隔板(圖 1 c中的5 )配置於氮化矽膜之開孔的内壁上。Page 9 413946 V. Description of the invention (6) Membrane .8. It is stated that the formula is β: Section ~ 1; Example of a horizontal channel forming a ditch. The first example of the Mingfa is based on the display: Step J Figure surface according to the display according to the instructions. Step by step ® for δ for Id ~ 2 horizontal? θ & 2 ^ 3 Illustration of the shape of the grooves El,-'^, -'Μ / Shi Shi Shi Shi 11 CSI second continuation of Yan Mingming's Mingfa dfa 1 * ~ Examples of this form of ditch 2 The first copy of the original version is displayed. Step by step f87 S is the cross section of the horizontal T -C? E 4 method chart into the sound I horizontal 4 ^ 5 method chart into the map is shown in the figure 3 shows the map is shown in the figure. The method of horizontally extending the method d into 3 to a shape of a ditch is shown in the figure. Continued 6g d e- 6 d Figure 5 ί a 5 Illustrated | Say one-g-3 # Fuban based silicon film oxygenated film diaphragm film sand picture broken 1 resistance ditch: the second photo-oxygen channel No. i lii one by one 2 3 4 5 6 7 8 Xihan dagger / 1/1 oxygen oxygen page 10 413946 5. Description of the invention σ) 1 1 ~ silicon substrate 1 2 ~ first silicon oxide film 1 3 ~ Silicon nitride film 1 4 to photoresist pattern 1 5 to trench 16 6 to epitaxial silicon layer 17 to 2nd insulating film. 1 8 to 3rd silicon oxide film 2 1 to silicon substrate 2 2 to 1st oxidation Silicon film ~ 2 3 ~ Silicon nitride film < 2 4 ~ Photoresist pattern 2 5-Trench 2 6 ~ Second silicon oxide film 2 7 ~ Third silicon oxide film 28 ~ Four parts 2 9 * Best implementation of shoulder DETAILED DESCRIPTION OF EXAMPLES The invention will be described below with reference to preferred embodiments. When using a silicon nitride film with a predetermined opening formed in a silicon substrate (3 in FIG. 1c) as an etching mask to form a trench, the method for manufacturing a semi-'conductor device according to the present invention is preferred. In the embodiment, a silicon oxide film separator (5 in FIG. 1 c) is disposed on the inner wall of the opening of the silicon nitride film.

第11頁 五、發明說明(8) 又,使用形成在矽基板之具有預設開孔的氮化矽膜 (圖lc中的3)作為蝕刻光罩,來形成渠溝(圖3c的15),其 後在渠溝内部表面形成矽磊晶層(圖3 c中的1 6 )。 為了進一步說明本發明的上述實施例,參考圖卜4, 以製程步驟的順序顯示本發明的幾個例子。 實施例1 、 圖la〜Id與2e~2h為逐步顯示本發明之第1實施例的橫 剖面圖。同時,分開圖1與圖2以方便說明。 首先,如圖la所示,藉由熱^化法將第1氧化矽膜2形 成在矽基板1上,達5~20nm的厚度,與藉由化學氣相沈積( (CVD)法將氮化矽膜3形成在其上,達100~ 3 0 0 ηπι的膜厚 度。接著,使用光刻技術,將光阻圖案4形成在將成為裝 置區的預定區中。接著,使用乾式蝕刻技術,對氮化矽膜 3與第1氧化矽膜2以此順序進行非等向性蝕刻。 接著藉由氧電衆將光阻圖案4剝除;如圖lb所不。接 著在其整個表面上形成第2氧化矽膜。對此第2氧化矽膜進 行非等向性回蝕以將氧化矽膜隔板5留在氮化矽膜3之開孔 的侧壁上。 需注意的是,第2氧化矽膜的膜厚度需設定成不會將 氮化矽膜3的開孔完全埋住的厚度。即,氧化矽膜的膜厚 ( 度需比氮化矽膜3之開孔的範圍中的最窄部分的寬度的一 半來得薄。 舉例來說,若是最窄的開孔的寬度為0 . 2 # m,即2 0 0Page 11 V. Description of the invention (8) In addition, a trench is formed by using a silicon nitride film (3 in FIG. 1c) with a predetermined opening formed on a silicon substrate as an etching mask (15 in FIG. 3c). Then, a silicon epitaxial layer is formed on the inner surface of the trench (16 in FIG. 3c). In order to further explain the above embodiments of the present invention, referring to FIG. 4, several examples of the present invention are shown in the order of process steps. Embodiment 1 FIGS. 1a to 1d and 2e to 2h are cross-sectional views showing a first embodiment of the present invention step by step. Meanwhile, FIG. 1 and FIG. 2 are separated for convenience of explanation. First, as shown in FIG. 1a, a first silicon oxide film 2 is formed on a silicon substrate 1 by a thermal process to a thickness of 5 to 20 nm, and nitrided by a chemical vapor deposition (CVD) method. A silicon film 3 is formed thereon to a film thickness of 100 to 300 ηπ. Next, a photoresist pattern 4 is formed in a predetermined region which will be a device region using a photolithography technique. Next, using a dry etching technique, the The silicon nitride film 3 and the first silicon oxide film 2 are anisotropically etched in this order. Then, the photoresist pattern 4 is stripped by an oxygen electrode; as shown in FIG. 1b. Then a first film is formed on the entire surface. 2 silicon oxide film. This second silicon oxide film is anisotropically etched back to leave the silicon oxide film separator 5 on the side wall of the opening of the silicon nitride film 3. It should be noted that the second oxide The film thickness of the silicon film needs to be set to a thickness that does not completely bury the openings of the silicon nitride film 3. That is, the film thickness of the silicon oxide film (the degree must be larger than the most in the range of the openings of the silicon nitride film 3). The width of the narrow part is half thin. For example, if the width of the narrowest opening is 0. 2 # m, that is 2 0 0

第12頁 413946 五、發明說明(9) nm.,則第2氧化矽膜的厚度需較.開孔寬度之一半的1 '0 0 nm來 得薄。即,第2氧化矽膜的厚度最好在30〜80nm。 接著,如圖1 c所示,使用氮化矽膜3與氧化矽膜隔板5 作為蝕刻光罩對矽基板1進行非等向性蝕刻,以產生渠溝 6。舉例來說,若是使用CF4與㈣!"的混合氣體來進行非等 向性乾式蝕刻,則可得到矽對於氮化矽膜或對於氧化矽膜 的選擇比率在約1 0的量級°進行此時的蝕刻以使_得渠溝6 成為150〜500nm深。 接著,如圖1 d所示,使用熱氧化法,將第3氧化矽膜7 形成在渠溝6的内壁表面上。熱氧〜化的目的為除去由乾式 蝕刻在渠溝6的内壁表面上所造成的損害。因此,厚度薄 的氧化膜符合所需。 舉例來說,氧化膜的厚度在1 0〜3 0 n m的量級符合所 需。即使其是厚的,氧化膜的厚度需要比如此所形成的第 2氧化矽膜的膜厚度的兩倍來得薄。由於氮化矽膜3作為抗 氧化表面,故矽基板1上的裝置區未被氧化。 接著,如圖2 e所示,使用C V D法,將第4氧化矽膜8形 成在整個表面上。形成之膜的厚度取決於渠溝6的深度、 第1氧化矽膜2的膜厚度與氮化矽膜3的膜厚度。.將第4氧化 矽膜8的膜厚度設定成約等於其總和。以第4氧化矽膜8完 全填入渠溝6的内部。 接著使用CMP法將第4氧化矽膜8加以研磨,如圖2 ί所 示。此研磨進行到氮化矽膜3上的第4氧化矽膜8完全除去 為止,以露出氮化矽膜3的表面。調整研磨時間使得氮化Page 12 413946 V. Description of the invention (9) nm. The thickness of the second silicon oxide film needs to be thinner than 1'0 0 nm, which is half of the opening width. That is, the thickness of the second silicon oxide film is preferably 30 to 80 nm. Next, as shown in FIG. 1 c, the silicon substrate 1 is anisotropically etched using the silicon nitride film 3 and the silicon oxide film spacer 5 as an etching mask to generate a trench 6. For example, if an anisotropic dry etching is performed using a mixed gas of CF4 and ㈣! &Quot;, the selection ratio of silicon to the silicon nitride film or the silicon oxide film can be obtained at about 10 degrees. The etching at this time makes the trench 6 to a depth of 150 to 500 nm. Next, as shown in FIG. 1D, a third silicon oxide film 7 is formed on the inner wall surface of the trench 6 using a thermal oxidation method. The purpose of thermal oxidation is to remove the damage caused by dry etching on the inner wall surface of the trench 6. Therefore, a thin oxide film is desirable. For example, the thickness of the oxide film is in the order of 10 to 30 nm, as required. Even if it is thick, the thickness of the oxide film needs to be thinner than twice the film thickness of the second silicon oxide film thus formed. Since the silicon nitride film 3 serves as an oxidation-resistant surface, the device region on the silicon substrate 1 is not oxidized. Next, as shown in Fig. 2e, a CVD method is used to form a fourth silicon oxide film 8 over the entire surface. The thickness of the formed film depends on the depth of the trench 6, the film thickness of the first silicon oxide film 2 and the film thickness of the silicon nitride film 3. The film thickness of the fourth silicon oxide film 8 is set to be approximately equal to the sum thereof. The inside of the trench 6 is completely filled with a fourth silicon oxide film 8. Then, the fourth silicon oxide film 8 is polished by the CMP method, as shown in FIG. This polishing is performed until the fourth silicon oxide film 8 on the silicon nitride film 3 is completely removed, so that the surface of the silicon nitride film 3 is exposed. Adjust the grinding time so that nitriding

第13頁 413946 五、發明說明(ίο) 石夕.膜3未被完全除去。 此時’氮化矽膜3的開孔寬度χΐ比的渠溝6的寬度yl來 得寬。此乃由於當藉由乾式蝕刻技術形成渠溝6時,氧化 矽膜隔板5係預先形成在氮化矽膜3中的開孔的内部上。 接著’使用加熱到約1 5 〇 °C磷酸溶液來選擇性除去氣 化矽膜3,如圖2 g所示。以第3氧化矽膜7與第4氧化矽膜8 填入渠溝6的内部,使得氧化矽膜隔板5與第4氧乂匕矽膜8突 出於矽基板1的表面外。 ' 在裝置區的表面上留下第1氧化矽膜2。突出於矽基板 1上的第1氧化石夕膜2 ’係以超過渠^溝6之寬度ζι的距離突出 於裝置區上。 接著’如圖2h所示’使用氫氟酸溶液將第1氧化矽膜2 蝕刻除去。矽基板1之表面上的裝置區進行10nni~3〇nm之厚 度範圍的熱氧化’以形成熱氧化膜,接著以氫氟酸溶液將 其蝕刻除去。在濕式蝕刻製程的過程中,也將突出於硬基 板1的表面上的氧化矽膜蝕刻除去5俾使其高度降低至約 與碎基板1的表面一樣。 在第1_實施例中,突出於矽基板丨上的第4氧化矽膜8與 氧化梦膜隔板5 ’係以超過渠溝6之寬度ζΐ的距離突於 置區上’使得當藉由濕式蝕刻製程將突出的部分卜^ 時’並沒有在較相期僅只渠溝内壁上的第3氧化二 分受到姓刻之風險’而不致如習知技術般在準 、 a 成凹部。 杈何奴在渠溝的頂部形 實施例2Page 13 413946 V. Description of the Invention (Shi). Film 3 has not been completely removed. At this time, the opening width χ of the silicon nitride film 3 is wider than the width yl of the trench 6. This is because when the trench 6 is formed by the dry etching technique, the silicon oxide film spacer 5 is formed in advance on the inside of the opening in the silicon nitride film 3. Next, the phosphoric acid silicon film 3 is selectively removed using a phosphoric acid solution heated to about 150 ° C, as shown in Fig. 2g. The inside of the trench 6 is filled with the third silicon oxide film 7 and the fourth silicon oxide film 8 so that the silicon oxide film separator 5 and the fourth silicon oxide film 8 protrude out of the surface of the silicon substrate 1. 'A first silicon oxide film 2 is left on the surface of the device region. The first oxidized oxide film 2 'protruding on the silicon substrate 1 protrudes on the device region by a distance exceeding the width ζm of the trench 6. Next, as shown in FIG. 2h, the first silicon oxide film 2 is etched away using a hydrofluoric acid solution. The device region on the surface of the silicon substrate 1 is thermally oxidized 'in the thickness range of 10 nm to 30 nm to form a thermal oxide film, which is then removed by etching with a hydrofluoric acid solution. During the wet etching process, the silicon oxide film protruding from the surface of the hard substrate 1 was also removed by etching to reduce the height to about the same as the surface of the broken substrate 1. In the first embodiment, the fourth silicon oxide film 8 and the dream film spacer 5 protruding on the silicon substrate 丨 protrude on the placement area by a distance exceeding the width ζΐ of the trench 6 so that when When the wet etching process will highlight the part, there is no risk that only the third oxidized bismuth on the inner wall of the trench is exposed to the surname engraving in the comparative phase, so that it is not as accurate as the conventional technique, and a recess is formed. Henu in the shape of the top of the trench Example 2

第14頁 413946 五、發明說明 以下 步顯示本 上的方便 在第 孔的内壁 之開孔的 以碎遙晶 茲參 矽基板1 1 周知的光 1 3與氧化 說明本發明的第2實硃例。S3a〜3d , 發明之第2實施例的橫剖面圓 4h二 ,將圖3與4分別分成囷33〜3(1與“〜#。為了說月 1實施例中,藉由在作為光翠的氣化 隔板,來形成*徑小於氣化二 渠溝。在第2實施例中’上述之直徑 的成長構造形成在渠溝的内部β 的杀薄伢 考圖3a,將第1氧化矽膜12與氮化矽膜13形成在 上,與上述之第1實施例相同。接著,使用眾所 刻技術與乾式蝕刻技術〜,將開孔形成在氮化矽膜 矽膜1 2中。 在藉由氧電漿剝除光阻圖案14之後,使用氮化矽膜i 3 作為蚀刻光罩山非等向性蝕刻矽基板丨丨,以形成渠溝丨5。 若是使用CL與HBr的氣體混合物來進行非等向性乾式# 亥jJ ’則會得到矽對於氬化矽或氧化矽膜的選擇比率在丨〇的 量級。此時’進行蝕刻以使渠溝1 5的深度為 150nm〜500nm 。 接著’如圊3c所示’使用超高真空CVD裝置,藉由選 擇蟲晶成長使矽成長在渠溝15的内壁上,以形成磊晶矽層 16 °由於在本製程中使用選擇成長方法,故磊晶矽層只成 長在矽所露出的區域中,即在渠溝的内部中。藉由磊晶成@ 長所得之矽膜的厚度取決於渠溝1 5的開孔寬度。若是開孔_ 的最窄部分為〇 . 2 // m,即2 0 0 n m 1則藉由磊晶成長所得之 矽膜的厚度最好是較開孔寬度之一半的1 〇 〇nm來得薄,例Page 14 413946 V. Description of the invention The following steps show the convenience of opening holes in the inner wall of the first hole with a broken silicon crystal silicon substrate 1 1 well-known light 13 and oxidation to explain the second example of the present invention . S3a ~ 3d, the cross section circle 4h of the second embodiment of the invention, and divides Figs. 3 and 4 into 囷 33 ~ 3 (1 and "~ #. In order to say the month 1 embodiment, The baffle is vaporized to form a channel with a diameter smaller than that of the second channel for gasification. In the second embodiment, the growth structure of the above-mentioned diameter is formed in the interior of the channel. 12 and a silicon nitride film 13 are formed on the same as in the above-mentioned first embodiment. Next, openings are formed in the silicon nitride film silicon film 12 by using a publicly-etched technique and a dry etching technique ~. After the photoresist pattern 14 is stripped from the oxygen plasma, a silicon nitride film i 3 is used as an etching mask to etch the silicon substrate anisotropically to form a trench 5. If a gas mixture of CL and HBr is used Performing the anisotropic dry type # jjJ 'will get the selection ratio of silicon to silicon argon or silicon oxide film in the order of 〇. At this time, the etching is performed so that the depth of the trench 15 is 150 nm to 500 nm. Then "as shown in Fig. 3c", using an ultra-high vacuum CVD apparatus, silicon is grown on the inner wall of the trench 15 by selecting the vermicular crystal growth. In order to form an epitaxial silicon layer at 16 °, since the selective growth method is used in this process, the epitaxial silicon layer only grows in the area where the silicon is exposed, that is, in the interior of the trench. The thickness of the silicon film depends on the opening width of the trench 15. If the narrowest part of the opening _ is 0.2 2 m, that is, 20 nm, the thickness of the silicon film obtained by epitaxial growth is the largest. Fortunately, it is thinner than 100nm, which is half of the opening width. For example,

第15頁 413946 五、發明說明(12) 如‘30~80nm。 . 成在3 ί於ϊ :示’藉由熱氧化法將第2絕緣膜17形 ϋ形成於#溝,部的蠢㈠層16上。氧㈣的厚度最 U = f ^且^右疋最厚的情況也需比完整的磊晶矽層 】= 得薄。由於氛化梦膜13作為抗氧化 膜,故f基板11上的裝置區未被氧化。 接者’使用如第1實施例中所 , 化矽膜1 8形成在整個表面上u 4之CMP方法-將第3氧 填入渠溝!的内部。 以便以第3氧化梦膜18完全 臈1 8 S ί政:5 ί L實施例中所邋之CMP方法於第3氧化矽 =研磨,直到將氮化㈣13的表面露出為止,如圖 變窄此:氮的成長造成渠溝15的寬度 寬。 11 $膜13的開孔寬度X2較渠溝15的寬度y2來得 接著,如圖4g所示’使用如第丨實施例所述之加 ί膜容液,來選擇性除去氮化矽膜13。以第、絕 媒1 7輿繁q窗f化矽膜丨8填入渠溝1 5的内部,而使第2絕緣 留在裝置區的表面上,在的/二將的第^ 夕^係以超過渠溝i 5之寬度z 2的距離突出到裝置區:化 將ίΛ’/圖4h所示,使用如第1實施例的氫氣酸溶液, 氧化矽膜12蝕刻除去。矽基板丨丨之表面上的 厚JOrun〜30nra的範圍進行熱氧化,以形成熱氧化膜區Page 15 413946 V. Description of the invention (12) Such as ‘30 ~ 80nm.成 于 3 于 于 ϊ: showing that the second insulating film 17 is formed on the ##, 部 的 的 ㈠ layer 16 by a thermal oxidation method. The thickness of the oxygen oxide is U = f ^ and the thickness of 疋 is the thinnest than the complete epitaxial silicon layer]. Since the dream film 13 serves as an anti-oxidation film, the device region on the f substrate 11 is not oxidized. The receiver 'uses a CMP method in which a siliconized film 18 is formed on the entire surface as in the first embodiment-a third oxygen is filled into the trench! internal. In order to completely use the third oxide film 18 to 18S, the CMP method is as described in the embodiment. At the third silicon oxide = polishing, until the surface of the hafnium nitride 13 is exposed, as shown in this figure, this is narrowed. : The growth of nitrogen causes the width of the trench 15 to be wide. The opening width X2 of the film 13 is larger than the width y2 of the trench 15. Next, as shown in FIG. 4g, the silicon nitride film 13 is selectively removed by using a film holding solution as described in the first embodiment. Fill the inside of the trench 15 with the first and second dielectrics, windows, and silicon films, and leave the second insulation on the surface of the device area. Protrude to the device area by a distance exceeding the width z 2 of the trench i 5: as shown in FIG. 4 /, using the hydrogen acid solution of the first embodiment, the silicon oxide film 12 is removed by etching. Thermally oxidize the silicon substrate with a thickness of JOrun ~ 30nra on the surface to form a thermal oxide film area

413946 五、發明說明(13) ^著以氫I酸溶液將之蝕刻除未。在濕式蝕刻製程的過程 ,又將突出在矽基板表面上的氧化矽膜蝕刻等 於發基板11之表面的高度。 2 在第2實施例中,與第1實施例相同,突出在矽基板11 的第3氧化;ε夕琪1 8與第2絕緣膜1 7,係超過渠溝1 5之寬度 2 2的距離,如圖4g所示。因此,當藉由濕式蝕刻製程將突 =的部分钮刻除去時’並沒有在較初期僅只渠溝内壁上的 ϋ絕緣膜丨7的部分受到蝕刻之風險,而不致如習知技術 多i ί溝的頂部形成凹部。如上所述,本發明提供下列許 本發明的第1效果為:由於藉由光蝕刻製程在依序形 ^ = 1夕基板上的熱氧化膜與氮化物臈中形成開孔後,且在 m膜中的開孔的側壁上形成氧化膜隔,故接著進行 形ΐ ΐ m i化膜充填的後續# ^ *的裝f之橫剖面 寬狀成如圖2f所示,亦即氮化石夕膜中的開孔較渠溝寬度為 氮化矽膜中的開孔的寬度較渠溝寬,即 ^的渠溝的内部突出的氧化矽膜較渠溝寬。亦 ^當接著藉由濕式钮刻製程將突出在石夕::j κ:因 地餘刻,…ί部;ΐ:的外緣部分被過度 外部。 丨的形成,以防止襞置區的肩部露出到 藉由此渠溝隔離,可以防止如此形成的mos電晶體的413946 V. Description of the invention (13) ^ It is removed by etching with a hydrogen I acid solution. During the wet etching process, the silicon oxide film protruding on the surface of the silicon substrate is etched equal to the height of the surface of the hair substrate 11. 2 In the second embodiment, the same as the first embodiment, the third oxidation protruding from the silicon substrate 11; ε Xiqi 18 and the second insulating film 17 is a distance exceeding the width 22 of the trench 15 , As shown in Figure 4g. Therefore, when a part of the button is removed by a wet etching process, only the part of the ϋ insulating film on the inner wall of the trench is exposed to the risk of etching in the early stage, which is not as known in the art. A recess is formed at the top of the groove. As described above, the present invention provides the following first effect of the present invention: after openings are formed in the thermally oxidized film and nitride hafnium on the substrate in a sequential shape by a photolithography process, and An oxide film barrier is formed on the side wall of the opening in the film, so the subsequent cross-section of the shape of the subsequent filling of the film filling is as shown in Figure 2f, that is, in the nitride film The width of the opening is larger than the width of the trench in the silicon nitride film, that is, the silicon oxide film protruding inside the trench is wider than the trench. Also, when the next step is to use the wet button engraving process, it will be highlighted in Shi Xi :: j κ: because of the rest of the time,… Department; ΐ: The outer edge part is excessively external.丨 is formed to prevent the shoulders of the placement area from being exposed. By this trench isolation, it is possible to prevent the formation of the mos transistor.

第17頁Page 17

Η 413946 五、發明說明(14) 開關特性惡化。此外,可以防本閘極氧化膜的長期信賴性 惡化,且可以防止閘極電極與矽基板之間的漏洩電流,也 可以防止閘極耐壓的惡化。 4 需注意的是,在較佳實施例之詳細說明中所提’出之具 體的實施例僅為了易於說明本發明之技術内容,而並非將 本發明狹義地限制於該實施例。又,在不超出本發明之精 神及以下申請專利範圍之情況,可作種種變化免施。Η 413946 V. Description of the invention (14) Switching characteristics deteriorate. In addition, it is possible to prevent the long-term reliability of the gate oxide film from deteriorating, prevent leakage current between the gate electrode and the silicon substrate, and prevent deterioration of the withstand voltage of the gate. 4 It should be noted that the specific embodiment mentioned in the detailed description of the preferred embodiment is only for easy explanation of the technical content of the present invention, and does not limit the present invention to the embodiment in a narrow sense. In addition, without departing from the spirit of the present invention and the scope of the following patent applications, various changes can be made without exemption.

第18頁Page 18

Claims (1)

第19頁 1999. 06.28.019Page 19 1999.06.28.019 第19頁 1999. 06.28.019 413946 修正 案號 88103918 六、申諳專利範圍 a) 在矽基板上連續地形成第1氧化矽膜2與氮化矽膜 b ) 藉由光蝕刻步驟在該第1氧化矽膜2與該氮化矽膜3 中形成開孔; c ) 在該氮化矽膜3中的開孔的側壁上配置氧化矽膜隔 板5 ; d ) 使用該氮化矽膜3與氧化矽膜隔板5作為光罩來形 成渠溝6 ; e )在該渠溝6的内壁上形成第3氧化矽膜7 ; f )將第4氧化矽膜8埋入該渠溝6的内部中; g) 除去該氮化矽膜3;與 h) 除去突出於該基板上的第3氧化矽膜7與第4氧化矽 膜 8 @':=丨 體裝置的製造方法包含以下步驟: a) 在矽基板上連續地形成第1氧化矽膜1 2與氮化矽膜 13 ; b) 藉由光蝕刻步驟在該第1氧化矽膜1 2與該氮化矽膜 1 3中形成開孔; c )使用該第1氧化矽膜1 2與氮化矽膜1 3作為光罩來形 成渠溝1 5 ; d) 藉由沈積在該渠溝的内壁上來形成屋晶砂層16 ; e ) 在該磊晶矽層1 6的内壁上配置第2絕緣膜i 7 ; f) 將第3氧化矽膜1 8埋入該渠溝1 5的内部中; g) 除去該氮化矽膜JJ;與Page 19, 1999. 06.28.019 413946 Amendment No. 88103918 6. Scope of patent application a) The first silicon oxide film 2 and the silicon nitride film b are continuously formed on a silicon substrate. B) Through the photo-etching step in the first An opening is formed in the silicon oxide film 2 and the silicon nitride film 3; c) a silicon oxide film spacer 5 is arranged on the sidewall of the opening in the silicon nitride film 3; d) the silicon nitride film 3 is used with The silicon oxide film separator 5 is used as a photomask to form a trench 6; e) a third silicon oxide film 7 is formed on the inner wall of the trench 6; f) a fourth silicon oxide film 8 is buried inside the trench 6 G) removing the silicon nitride film 3; and h) removing the third silicon oxide film 7 and the fourth silicon oxide film 8 protruding from the substrate @@: = 丨 The manufacturing method of the bulk device includes the following steps: a ) Forming a first silicon oxide film 12 and a silicon nitride film 13 on a silicon substrate continuously; b) forming an opening in the first silicon oxide film 12 and the silicon nitride film 13 by a photo-etching step; C) using the first silicon oxide film 12 and the silicon nitride film 13 as a photomask to form a trench 15; d) forming a roof crystal sand layer 16 by depositing on the inner wall of the trench; e) at The Lei A second insulating film i 7 is arranged on the inner wall of the crystalline silicon layer 16; f) a third silicon oxide film 18 is buried inside the trench 15; g) the silicon nitride film JJ is removed; and 1999. 06.28. 020 88103918 衫年 < 月>g曰 修正_ 六、申請專利範圍 h)除去突出於該基板上的第名氧化矽膜JJ與第这氧化 矽膜JJ。 7. 一種半導體裝置,於其基板中具有渠溝,其中: 所設置的渠溝係使用氮化矽膜與氧化矽膜隔板作為光 罩所形成,其中該氮化矽膜係形成在設有預設開孔的基板 上;且該氧化矽膜隔板係配置在該氮化矽膜的内壁上; 將氧化矽膜填入到該渠溝的内部中;且於其中 - 在填入該渠溝的該氧化矽膜的表面未設有凹部。 8.—種半導體裝置,包含有使用形成於基板上之設 有預設開孔的氮化矽膜作為光罩所形成的渠溝,其中: 將矽磊晶層設在該渠溝的内壁上,+ 將氧化矽膜填入該渠溝的内部中;且其中 在填入該渠溝的該氧化矽膜的表面未設凹部。1999. 06.28. 020 88103918 Year of the shirt < Month > g said correction_ VI. Patent application scope h) Remove the first silicon oxide film JJ and the first silicon oxide film JJ protruding from the substrate. 7. A semiconductor device having a trench in its substrate, wherein: the trench is provided by using a silicon nitride film and a silicon oxide film separator as a photomask, wherein the silicon nitride film is formed on the substrate On the substrate with preset openings; and the silicon oxide film separator is arranged on the inner wall of the silicon nitride film; the silicon oxide film is filled into the interior of the trench; and in it-the trench is filled The surface of the silicon oxide film of the groove is not provided with a recess. 8. A semiconductor device comprising a trench formed by using a silicon nitride film with a predetermined opening formed on a substrate as a photomask, wherein: a silicon epitaxial layer is provided on an inner wall of the trench , + A silicon oxide film is filled into the interior of the trench; and no recess is provided on the surface of the silicon oxide film filled in the trench. 第2〗頁 1999. 06, 28.021Page 2 1999.06, 28.021
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