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TW354682U - Fast flash and erasable RAM - Google Patents

Fast flash and erasable RAM

Info

Publication number
TW354682U
TW354682U TW087200414U TW87200414U TW354682U TW 354682 U TW354682 U TW 354682U TW 087200414 U TW087200414 U TW 087200414U TW 87200414 U TW87200414 U TW 87200414U TW 354682 U TW354682 U TW 354682U
Authority
TW
Taiwan
Prior art keywords
fast flash
erasable ram
erasable
ram
flash
Prior art date
Application number
TW087200414U
Other languages
English (en)
Inventor
Chen-Shi Lin
Jr-Ming Chen
Lin-Sung Wang
Hung-Ming Li
Ge-Rung Jang
Original Assignee
Worldwide Semiconductor Mfg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Worldwide Semiconductor Mfg filed Critical Worldwide Semiconductor Mfg
Priority to TW087200414U priority Critical patent/TW354682U/zh
Priority to JP9611298A priority patent/JPH11204666A/ja
Priority to US09/123,305 priority patent/US6026028A/en
Publication of TW354682U publication Critical patent/TW354682U/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/684—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685—Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
TW087200414U 1998-01-12 1998-01-12 Fast flash and erasable RAM TW354682U (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW087200414U TW354682U (en) 1998-01-12 1998-01-12 Fast flash and erasable RAM
JP9611298A JPH11204666A (ja) 1998-01-12 1998-04-08 フラッシュ型ｅｅｐｒｏｍ構造
US09/123,305 US6026028A (en) 1998-01-12 1998-07-28 Hot carrier injection programming and negative gate voltage channel erase flash EEPROM structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW087200414U TW354682U (en) 1998-01-12 1998-01-12 Fast flash and erasable RAM

Publications (1)

Publication Number Publication Date
TW354682U true TW354682U (en) 1999-03-11

Family

ID=21632614

Family Applications (1)

Application Number Title Priority Date Filing Date
TW087200414U TW354682U (en) 1998-01-12 1998-01-12 Fast flash and erasable RAM

Country Status (3)

Country Link
US (1) US6026028A (zh)
JP (1) JPH11204666A (zh)
TW (1) TW354682U (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030092236A1 (en) * 2000-01-31 2003-05-15 Danny Shum Flash memory cell and method to achieve multiple bits per cell
JP4623782B2 (ja) 1999-10-15 2011-02-02 スパンション エルエルシー 半導体記憶装置及びその使用方法
US6556477B2 (en) 2001-05-21 2003-04-29 Ibm Corporation Integrated chip having SRAM, DRAM and flash memory and method for fabricating the same
US6670234B2 (en) 2001-06-22 2003-12-30 International Business Machines Corporation Method of integrating volatile and non-volatile memory cells on the same substrate and a semiconductor memory device thereof
KR100445055B1 (ko) * 2002-05-16 2004-08-21 주식회사 하이닉스반도체 삼중웰 구조를 갖는 반도체소자의 제조 방법
US6980471B1 (en) * 2004-12-23 2005-12-27 Sandisk Corporation Substrate electron injection techniques for programming non-volatile charge storage memory cells
US7463546B2 (en) 2006-07-31 2008-12-09 Sandisk 3D Llc Method for using a passive element memory array incorporating reversible polarity word line and bit line decoders
US7499366B2 (en) 2006-07-31 2009-03-03 Sandisk 3D Llc Method for using dual data-dependent busses for coupling read/write circuits to a memory array
US8279704B2 (en) * 2006-07-31 2012-10-02 Sandisk 3D Llc Decoder circuitry providing forward and reverse modes of memory array operation and method for biasing same
US7554832B2 (en) * 2006-07-31 2009-06-30 Sandisk 3D Llc Passive element memory array incorporating reversible polarity word line and bit line decoders
US7486587B2 (en) * 2006-07-31 2009-02-03 Sandisk 3D Llc Dual data-dependent busses for coupling read/write circuits to a memory array
KR100851546B1 (ko) * 2006-09-22 2008-08-11 삼성전자주식회사 비휘발성 기억 장치 및 그 동작 방법
CN102201411B (zh) * 2010-03-25 2013-04-03 上海丽恒光微电子科技有限公司 叠栅非易失性快闪存储单元、存储器件及其制造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5963479A (en) * 1996-12-28 1999-10-05 Hyundai Electronics Industries, Co., Ltd. Method of erasing a flash memory cell and device for erasing the same

Also Published As

Publication number Publication date
US6026028A (en) 2000-02-15
JPH11204666A (ja) 1999-07-30

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