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Internal Circuitry In Semiconductor Integrated Circuit Devices
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Abstract
A process of planarization between metal layers, which is applicable to a semiconductor substrate with formed dielectric layer on the surface, includes: (1) forming multiple metal patterns on the dielectric layer; (2) forming one first insulator covering the metal pattern and the dielectric layer uncovered by the first metal pattern; (3) forming a photoresist pattern on partial the first insulator; (4) with the photoresist pattern as mask etching the first insulator into multiple trenches; (5) removing the photoresist pattern; (6) forming spin-on glass filling the trenches; (7) forming one second insulator covering the substrate surface.
TW84101960A1995-03-021995-03-02Planarization method between metal layers
TW255048B
(en)