TW202336831A - Nitride semiconductor substrate and manufacturing method therefor - Google Patents
Nitride semiconductor substrate and manufacturing method therefor Download PDFInfo
- Publication number
- TW202336831A TW202336831A TW111136276A TW111136276A TW202336831A TW 202336831 A TW202336831 A TW 202336831A TW 111136276 A TW111136276 A TW 111136276A TW 111136276 A TW111136276 A TW 111136276A TW 202336831 A TW202336831 A TW 202336831A
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- crystal silicon
- substrate
- single crystal
- nitride semiconductor
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Description
本發明關於一種氮化物半導體基板及其製造方法。The present invention relates to a nitride semiconductor substrate and a manufacturing method thereof.
半導體薄膜製造方法之一的MOCVD法,在大口徑化和量產性方面優異,能夠將均質的薄膜結晶進行成膜,因此被廣泛地使用。此外,由GaN所代表的氮化物半導體被期待作為次世代半導體材料,其可突破Si(矽)作為材料的極限。The MOCVD method, one of the semiconductor thin film manufacturing methods, is widely used because it is excellent in large-diameter and mass-produced and can form uniform thin film crystals. In addition, nitride semiconductors represented by GaN are expected to be next-generation semiconductor materials that can break through the limits of Si (silicon) as a material.
因為GaN為飽和電子速率大這樣的特性而能夠製作能夠高頻操作的裝置,此外也因為絕緣崩潰電場大,所以能夠在高輸出下進行操作。此外,也可期待輕量化和小型化、低電力消耗化。近年來,由於5G等所代表的通訊速度的高速化、和伴隨其的高輸出化的要求,高頻且能夠在高輸出下操作的GaN HEMT受到矚目。Because GaN has characteristics such as a high saturation electron velocity, it is possible to create a device that can operate at high frequencies. In addition, because the insulation breakdown electric field is large, it can be operated at high output. In addition, weight reduction, miniaturization, and low power consumption are also expected. In recent years, due to the increase in communication speed represented by 5G and others, and the accompanying demand for higher output, GaN HEMTs that can operate at high frequencies and at high output have attracted attention.
作為用以用來製作GaN裝置的GaN磊晶晶圓的基板,Si基板最為價廉且在大口徑化方面有利。此外,由於導熱係數高且放熱性良好的特性,也使用了SiC基板。但是,該等基板與GaN的熱膨脹係數不同,因此在磊晶成膜後的冷卻步驟中會施加應力,而容易發生裂縫。此外,藉由施加強烈的應力,有時會在裝置製程中發生晶圓破裂的情況。此外,無法將較厚的GaN進行成膜,所以即便在磊晶層內將複雜的應力緩和層進行成膜,在無裂縫的情況下大約在5 μm左右就會到達極限。As a substrate for GaN epitaxial wafers used to manufacture GaN devices, Si substrates are the cheapest and are advantageous in increasing the diameter. In addition, SiC substrates are also used due to their high thermal conductivity and good heat dissipation characteristics. However, the thermal expansion coefficients of these substrates and GaN are different, so stress is applied during the cooling step after epitaxial film formation, and cracks are prone to occur. In addition, by applying strong stress, wafer cracks sometimes occur during device manufacturing. In addition, it is impossible to form a thick GaN film, so even if a complex stress relaxation layer is formed in the epitaxial layer, the limit will be reached at about 5 μm without cracks.
另一方面,因為GaN基板具有與GaN磊晶層相同(或者非常相近)的熱膨脹係數,所以不易發生上述這樣的問題,但是自立GaN基的製作不僅困難,還極高價並且無法製作出口徑較大的基板,所以不適於進行量產。On the other hand, because the GaN substrate has the same (or very similar) thermal expansion coefficient as the GaN epitaxial layer, the above-mentioned problems are less likely to occur. However, the production of a self-supporting GaN substrate is not only difficult, but also extremely expensive and cannot be produced with a large aperture. substrate, so it is not suitable for mass production.
因此,專利文獻1揭示了一種GaN磊晶用的大口徑基板(以下,GaN用支撐基板),其為大口徑且與GaN的熱膨脹係數相近。該GaN用支撐基板,由支撐結構、被積層於該支撐結構的其中一面的平坦化層、及被積層於該平坦化層的單晶矽層所構成,該支撐結構包含多晶陶瓷芯、第一黏著層、導電層、第二黏著層及阻障層。Therefore,
藉由使用該成長用支撐基板,能夠製作一種氮化物半導體基板,其為大口徑且磊晶層的厚度較厚,並且不會產生裂縫。此外,由於與GaN的熱膨脹係數差極小,在GaN成長時或冷卻時不易產生翹曲,因此,不僅能夠將成膜後的基板的翹曲控制得較小,還不需在磊晶層中設置複雜的應力緩和層,因此磊晶成膜時間會變短,能夠大幅地降低磊晶成長的成本。進一步,成長用支撐基板大部分為陶瓷,因此基板本身非常硬,不僅不易發生塑性變形,還不會發生無法以口徑大的GaN on Si來解決的晶圓破裂。 [先前技術文獻] (專利文獻) By using this growth support substrate, it is possible to produce a nitride semiconductor substrate having a large diameter, a thick epitaxial layer, and no cracks. In addition, since the difference in thermal expansion coefficient between GaN and GaN is extremely small, it is less likely to warp when GaN is grown or cooled. Therefore, warpage of the substrate after film formation can be controlled to be small, and there is no need to install an epitaxial layer in the epitaxial layer. The complex stress relaxation layer shortens the epitaxial film formation time and can significantly reduce the cost of epitaxial growth. Furthermore, most of the growth support substrates are made of ceramics, so the substrate itself is very hard and not only difficult to undergo plastic deformation, but also does not cause wafer cracks that cannot be solved with large-diameter GaN on Si. [Prior technical literature] (patent document)
專利文獻1:日本特表2020-505767。Patent Document 1: Japanese Special List 2020-505767.
[發明所欲解決的問題] 用於高頻用途的GaN on Si裝置中,使用有高電阻的單晶矽基板。但是,在單晶矽基板上將AlN、AlGaN、GaN等進行成膜的過程中,Al與Ga會在單晶矽基板中擴散,造成單晶矽基板表層(與氮化物半導體磊晶層的界面附近)低電阻化,而會有高頻特性劣化這樣的問題。 [Problem to be solved by the invention] GaN on Si devices for high-frequency applications use single-crystal silicon substrates with high resistance. However, during the film formation process of AlN, AlGaN, GaN, etc. on a single crystal silicon substrate, Al and Ga will diffuse in the single crystal silicon substrate, causing an interface between the surface layer of the single crystal silicon substrate (and the nitride semiconductor epitaxial layer). Nearby), the resistance becomes low, and there is a problem of deterioration of high-frequency characteristics.
GaN用支撐基板的表層也是單晶矽層,所以在用於高頻用途時,在AlN、AlGaN、GaN等的成長中,Al與Ga會在單晶矽層內擴散,而會發生同樣的高頻損耗的問題。The surface layer of the GaN supporting substrate is also a single crystal silicon layer. Therefore, when used for high-frequency applications, during the growth of AlN, AlGaN, GaN, etc., Al and Ga will diffuse in the single crystal silicon layer, and the same high-frequency will occur. frequency loss problem.
本發明是為了解決上述問題而成者,目的在於提供一種氮化物半導體基板及其製造方法,該氮化物半導體基板在氮化物半導體的成長中Al會在單晶矽層內擴散進行低電阻化,而抑制了高頻特性劣化的情況。 [解決問題的技術手段] The present invention is made to solve the above problems, and aims to provide a nitride semiconductor substrate in which Al diffuses in the single crystal silicon layer during the growth of the nitride semiconductor to reduce the resistance and a manufacturing method thereof. This suppresses the deterioration of high-frequency characteristics. [Technical means to solve problems]
為了解決上述問題,本發明提供一種氮化物半導體基板,其具備:在積層有複數層而成之複合基板上形成有單晶矽層之成長用基板、與被成膜於該成長用基板的前述單晶矽層上的氮化物半導體薄膜; 前述單晶矽層的碳濃度是5E17 atoms/cm 3以上且1E22 atoms/cm 3以下。 In order to solve the above problems, the present invention provides a nitride semiconductor substrate including: a growth substrate in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers are laminated; and the aforementioned growth substrate formed into a film. A nitride semiconductor thin film on a single crystal silicon layer; the carbon concentration of the single crystal silicon layer is 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
只要是如此地單晶矽層的碳濃度為5E17 atoms/cm 3以上,即能夠抑制往單晶矽層內的Al與Ga的擴散,而能夠抑制單晶矽層的低電阻化。此外,只要單晶矽層的碳濃度為1E22 atoms/cm 3以下,即能夠防止晶性的惡化,因此能夠作成晶性佳的基板。其結果,能夠提供高頻特性良好的氮化物半導體基板。 As long as the carbon concentration of the single crystal silicon layer is 5E17 atoms/cm 3 or more, the diffusion of Al and Ga into the single crystal silicon layer can be suppressed, and the resistance of the single crystal silicon layer can be suppressed from becoming low. In addition, as long as the carbon concentration of the single crystal silicon layer is 1E22 atoms/cm 3 or less, deterioration of crystallinity can be prevented, and therefore a substrate with good crystallinity can be produced. As a result, a nitride semiconductor substrate with excellent high-frequency characteristics can be provided.
此外,較佳是:前述氮化物半導體薄膜包含GaN、AlN及AlGaN中的一種以上。In addition, it is preferable that the nitride semiconductor thin film contains one or more types of GaN, AIN, and AlGaN.
只要是這樣的氮化物半導體薄膜,能夠確實地提供高頻特性良好的氮化物半導體基板。Such a nitride semiconductor thin film can reliably provide a nitride semiconductor substrate with excellent high-frequency characteristics.
此外,較佳是:前述單晶矽層具有100~500 nm的厚度,並且前述氮化物半導體薄膜的總膜厚為2 μm以上且10 μm以下。Furthermore, it is preferable that the single crystal silicon layer has a thickness of 100 to 500 nm, and the total film thickness of the nitride semiconductor thin film is 2 μm or more and 10 μm or less.
本發明中,能夠將單晶矽層及氮化物半導體薄膜作成這樣的厚度。In the present invention, the single crystal silicon layer and the nitride semiconductor thin film can be made to have such thickness.
此外,較佳是:前述複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於整個該第一黏著層的第二黏著層及被積層於整個該第二黏著層的阻障層,且 前述單晶矽層被形成於平坦化層之上,該平坦化層被積層於前述複合基板的僅其中一面。 In addition, preferably, the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, a second adhesive layer laminated on the entire first adhesive layer, and a second adhesive layer laminated on the entire first adhesive layer. the barrier layer of the second adhesive layer, and The single crystal silicon layer is formed on a planarization layer, and the planarization layer is laminated on only one side of the composite substrate.
只要是這樣的構成,成長用基板的大部分為陶瓷,因此基板本身非常硬,不僅不易發生塑性變形,還不會發生無法以矽基板來解決的晶圓破裂。With such a structure, most of the growth substrate is made of ceramic, so the substrate itself is very hard and is not prone to plastic deformation or wafer cracking that cannot be solved with a silicon substrate.
此外,前述複合基板在前述第一黏著層與前述第二黏著層之間可具有被積層於整個前述第一黏著層的導電層。In addition, the composite substrate may have a conductive layer laminated on the entire first adhesive layer between the first adhesive layer and the second adhesive layer.
能夠依據需要對複合基板賦予導電性。Conductivity can be imparted to the composite substrate as needed.
此外,較佳是下述形態:前述複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於整個該第一黏著層的阻障層、被積層於該阻障層的背面的第二黏著層及被積層於該第二黏著層的背面的導電層,且 前述單晶矽層被形成於平坦化層之上,該平坦化層被積層於前述複合基板的前述阻障層的正面。 Furthermore, it is preferable that the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, a barrier layer laminated on the entire first adhesive layer, and a barrier layer laminated on the entire first adhesive layer. a second adhesive layer on the back side of the barrier layer and a conductive layer laminated on the back side of the second adhesive layer, and The single crystal silicon layer is formed on a planarization layer, and the planarization layer is laminated on the front surface of the barrier layer of the composite substrate.
只要是使用了這樣的成長用基板之氮化物半導體基板,不會產生由於成長用基板的正面側導電層所造成的漏洩路徑,而能夠作成高頻特性優異者。A nitride semiconductor substrate using such a growth substrate can have excellent high-frequency characteristics without generating a leakage path due to the front-side conductive layer of the growth substrate.
此外,較佳是下述形態:前述複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於該第一黏著層的背面的導電層、被積層於該導電層的背面的第二黏著層及阻障層,該阻障層被積層於前述第一黏著層的正面及側面、前述導電層的側面以及前述第二黏著層的側面及背面,且 前述單晶矽層被形成於平坦化層之上,該平坦化層被積層於前述複合基板的前述阻障層的正面。 Furthermore, it is preferable that the composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, a conductive layer laminated on the back surface of the first adhesive layer, and a conductive layer laminated on the back surface of the first adhesive layer. The second adhesive layer and barrier layer on the back side of the conductive layer, the barrier layer is laminated on the front and side surfaces of the aforementioned first adhesive layer, the side surfaces of the aforementioned conductive layer, and the side surfaces and back surface of the aforementioned second adhesive layer, and The single crystal silicon layer is formed on a planarization layer, and the planarization layer is laminated on the front surface of the barrier layer of the composite substrate.
只要是使用了這樣的成長用基板之氮化物半導體基板,不會產生由於成長用基板的正面側導電層所造成的漏洩路徑,而能夠作成高頻特性優異者。A nitride semiconductor substrate using such a growth substrate can have excellent high-frequency characteristics without generating a leakage path due to the front-side conductive layer of the growth substrate.
此時,較佳是:前述導電層包含多晶矽層。At this time, it is preferable that the conductive layer includes a polycrystalline silicon layer.
導電層能夠作成這樣的層。The conductive layer can be formed into such a layer.
此時,較佳是:前述多晶陶瓷芯包含氮化鋁。At this time, it is preferable that the polycrystalline ceramic core contains aluminum nitride.
只要是設為這樣的複合基板,能夠使與氮化物半導體的熱膨脹係數差變得極小。With such a composite substrate, the difference in thermal expansion coefficient with the nitride semiconductor can be minimized.
此外,較佳是:前述第一黏著層及前述第二黏著層包含四乙基矽氧烷(TEOS,tetraethyl orthosilicate)層或氧化矽(SiO 2)層,並且前述阻障層包含氮化矽。 In addition, preferably, the first adhesive layer and the second adhesive layer include a tetraethyl orthosilicate (TEOS) layer or a silicon oxide (SiO 2 ) layer, and the barrier layer includes silicon nitride.
第一黏著層及第二黏著層、以及阻障層的厚度能夠作成這樣的層。The thickness of the first adhesive layer, the second adhesive layer, and the barrier layer can be such a layer.
此外,較佳是:前述平坦化層包含四乙基矽氧烷(TEOS)或氧化矽(SiO 2),且具有500~3000 nm的厚度。 Furthermore, it is preferable that the planarization layer contains tetraethylsiloxane (TEOS) or silicon oxide (SiO 2 ) and has a thickness of 500 to 3000 nm.
平坦化層能夠設為這樣的層。The planarization layer can be such a layer.
此外,本發明提供一種氮化物半導體基板的製造方法,該氮化物半導體基板具備成長用基板、與被成膜於該成長用基板上的氮化物半導體薄膜, 該製造方法包含下述步驟: 步驟(1),其在積層有複數層而成之複合基板上,形成碳濃度5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的單晶矽層,來製作成長用基板;及, 步驟(2),其使前述氮化物半導體薄膜磊晶成長於前述成長用基板的前述單晶矽層上,來製造氮化物半導體基板。 In addition, the present invention provides a method for manufacturing a nitride semiconductor substrate, which includes a growth substrate and a nitride semiconductor thin film formed on the growth substrate. The manufacturing method includes the following steps: Step ( 1), forming a single crystal silicon layer with a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on a composite substrate in which a plurality of layers are laminated, to produce a substrate for growth; and, step (2) In this method, the nitride semiconductor thin film is epitaxially grown on the single crystal silicon layer of the growth substrate to produce a nitride semiconductor substrate.
只要是這樣地操作而為使用了單晶矽層的碳濃度為5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的成長用基板之氮化物半導體基板的製造方法,能夠較容易地製造高頻特性良好的氮化物半導體基板。 As long as the manufacturing method of a nitride semiconductor substrate using a growth substrate with a carbon concentration of a single crystal silicon layer of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less is performed in this way, high-frequency production can be easily produced. Nitride semiconductor substrate with excellent characteristics.
此外,較佳是將前述步驟(1)設為包含下述步驟之步驟: 步驟(1-1),其準備一複合基板作為前述複合基板,該複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於整個該第一黏著層的第二黏著層及被積層於整個該第二黏著層的阻障層; 步驟(1-2),其在前述複合基板的僅其中一面將平坦化層進行積層;及, 步驟(1-3),其藉由將具備單晶矽層之施予基板貼合於前述平坦化層,來形成前述單晶矽層,該單晶矽層具有100~500 nm的厚度且以5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的濃度進行碳摻雜而成。 In addition, it is preferable that the aforementioned step (1) includes the following steps: Step (1-1), which prepares a composite substrate as the aforementioned composite substrate. The composite substrate includes a polycrystalline ceramic core laminated throughout the The first adhesive layer of the polycrystalline ceramic core, the second adhesive layer laminated on the entire first adhesive layer, and the barrier layer laminated on the entire second adhesive layer; Step (1-2), which is described above The planarization layer is laminated on only one side of the composite substrate; and, step (1-3), which forms the single crystal silicon layer by bonding a donor substrate with a single crystal silicon layer to the planarization layer. , the single crystal silicon layer has a thickness of 100 to 500 nm and is doped with carbon at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
只要是這樣的構成,成長用基板的大部分為陶瓷,因此基板本身非常硬,不僅不易發生塑性變形,還能夠確實地製造一種氮化物半導體基板,其不會發生無法以矽基板來解決的晶圓破裂。With this configuration, most of the growth substrate is made of ceramic, so the substrate itself is very hard and is not easily plastically deformed. It is also possible to reliably produce a nitride semiconductor substrate that does not produce crystallization problems that cannot be solved with silicon substrates. The circle breaks.
此時,在前述步驟(1-1)中,能夠將前述複合基板作成在前述第一黏著層與前述第二黏著層之間具有被積層於整個前述第一黏著層的導電層者。In this case, in the step (1-1), the composite substrate can be made to have a conductive layer laminated on the entire first adhesive layer between the first adhesive layer and the second adhesive layer.
能夠依據需要對複合基板賦予導電性。Conductivity can be imparted to the composite substrate as needed.
此外,較佳是將前述步驟(1)設為包含下述步驟之步驟: 步驟(1-1),其準備一複合基板作為前述複合基板,該複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於整個該第一黏著層的阻障層、被積層於該阻障層的背面的第二黏著層及被積層於該第二黏著層的背面的導電層; 步驟(1-2),其在前述複合基板的前述阻障層的正面將平坦化層進行積層;及, 步驟(1-3),其藉由將具備單晶矽層之施予基板貼合於前述平坦化層,來形成前述單晶矽層,該單晶矽層具有100~500 nm的厚度且以5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的濃度進行碳摻雜而成。 In addition, it is preferable that the aforementioned step (1) includes the following steps: Step (1-1), which prepares a composite substrate as the aforementioned composite substrate. The composite substrate includes a polycrystalline ceramic core laminated throughout the A first adhesive layer of the polycrystalline ceramic core, a barrier layer laminated on the entire first adhesive layer, a second adhesive layer laminated on the back side of the barrier layer, and a second adhesive layer laminated on the back side of the second adhesive layer a conductive layer; step (1-2), which laminates a planarization layer on the front surface of the barrier layer of the composite substrate; and step (1-3), which involves laminating a layer with a single crystal silicon layer The substrate is bonded to the planarization layer to form the single crystal silicon layer, which has a thickness of 100 to 500 nm and is carbon doped at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less. Mixed up.
只要是這樣的氮化物半導體基板的製造方法,不會產生由於複合基板的正面側導電層所造成的漏洩路徑,而能夠製造高頻特性優異的氮化物半導體基板。With this method of manufacturing a nitride semiconductor substrate, a nitride semiconductor substrate having excellent high-frequency characteristics can be manufactured without generating a leakage path due to the front-side conductive layer of the composite substrate.
此外,較佳是將前述步驟(1)設為包含下述步驟之步驟: 步驟(1-1),其準備一複合基板作為前述複合基板,該複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於該第一黏著層的背面的導電層、被積層於該導電層的背面的第二黏著層及阻障層,該阻障層被積層於前述第一黏著層的正面及側面、前述導電層的側面以及前述第二黏著層的側面及背面; 步驟(1-2),其在前述複合基板的前述阻障層的正面將平坦化層進行積層;及, 步驟(1-3),其藉由將具備單晶矽層之施予基板貼合於前述平坦化層,來形成前述單晶矽層,該單晶矽層具有100~500 nm的厚度且以5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的濃度進行碳摻雜而成。 In addition, it is preferable that the aforementioned step (1) includes the following steps: Step (1-1), which prepares a composite substrate as the aforementioned composite substrate. The composite substrate includes a polycrystalline ceramic core laminated throughout the The first adhesive layer of the polycrystalline ceramic core, the conductive layer laminated on the back side of the first adhesive layer, the second adhesive layer laminated on the back side of the conductive layer and the barrier layer, the barrier layer is laminated on The front and side surfaces of the first adhesive layer, the side surfaces of the conductive layer, and the side and back surfaces of the second adhesive layer; Step (1-2), which is to perform a planarization layer on the front surface of the barrier layer of the composite substrate Lamination; and, step (1-3), which forms the aforementioned single crystal silicon layer by bonding a substrate having a single crystal silicon layer to the aforementioned planarization layer, and the single crystal silicon layer has a wavelength of 100 to 500 nm. thickness and carbon doping at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
只要是這樣的氮化物半導體基板的製造方法,不會產生由於複合基板的正面側導電層所造成的漏洩路徑,而能夠製造高頻特性優異的氮化物半導體基板。With this method of manufacturing a nitride semiconductor substrate, a nitride semiconductor substrate having excellent high-frequency characteristics can be manufactured without generating a leakage path due to the front-side conductive layer of the composite substrate.
此外,較佳是將前述步驟(1-3)設為包含下述步驟之步驟: 步驟(1-3-1),其藉由CVD法將前述摻雜有碳之單晶矽薄膜成膜於單晶矽基板上,來製作前述施予基板; 步驟(1-3-2),其將前述施予基板的前述摻雜有碳之單晶矽薄膜與前述平坦化層貼合;及, 步驟(1-3-3),其將前述施予基板的前述單晶矽基板去除,並進一步以使前述施予基板的前述摻雜有碳之單晶矽薄膜成為期望的厚度的方式進行加工,來形成前述碳濃度為5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的單晶矽層。 In addition, it is preferable that the aforementioned step (1-3) includes the following steps: Step (1-3-1), which uses a CVD method to form a film of the aforementioned carbon-doped single crystal silicon film on On a single crystal silicon substrate, the aforementioned application substrate is produced; step (1-3-2), which involves laminating the aforementioned carbon-doped single crystal silicon film of the aforementioned application substrate to the aforementioned planarization layer; and, steps (1-3-3), which removes the single crystal silicon substrate of the applied substrate and further processes the carbon-doped single crystal silicon thin film of the applied substrate to a desired thickness, A single crystal silicon layer having a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less is formed.
藉由這樣的操作,不僅能夠較為簡單且確實地製造具有高碳濃度的單晶矽薄膜之施予基板,還能夠在平坦化層上容易地形成所期望的厚度的單晶矽層。 [發明的效果] By such an operation, not only can a substrate having a single crystal silicon thin film with a high carbon concentration be produced relatively simply and reliably, but also a single crystal silicon layer of a desired thickness can be easily formed on the planarization layer. [Effects of the invention]
如以上所述,根據本發明,能夠提供一種氮化物半導體基板及其製造方法,該氮化物半導體基板在氮化物半導體的成長中,Al與Ga會在單晶矽層內擴散進行低電阻化,而抑制了高頻特性劣化的情況。As described above, according to the present invention, it is possible to provide a nitride semiconductor substrate and a manufacturing method thereof. In the nitride semiconductor substrate, during the growth of the nitride semiconductor, Al and Ga diffuse in the single crystal silicon layer to reduce the resistance. This suppresses the deterioration of high-frequency characteristics.
如同上述,在單晶矽層上將氮化物半導體進行成膜的過程中,Al與Ga會在單晶矽層中擴散,造成單晶矽層的表層(與GaN磊晶層的界面附近)變得低電阻化,而有高頻特性劣化這樣的問題。As mentioned above, during the process of forming a nitride semiconductor film on a single crystal silicon layer, Al and Ga will diffuse in the single crystal silicon layer, causing the surface layer of the single crystal silicon layer (near the interface with the GaN epitaxial layer) to become The resistance has to be lowered, which leads to the problem of deterioration of high-frequency characteristics.
針對抑制在GaN成長中Al與Ga會在單晶矽層內擴散而低電阻率化並且高頻特性惡化的方法,發明人致力於研究,發現藉由將單晶矽層的碳濃度設為5E17 atoms/cm 3以上且1E22 atoms/cm 3以下,可抑制往單晶矽層內的Al與Ga的擴散,並且能夠抑制單晶矽層的低電阻化,進而可兼備晶性良好的基板與藉由碳的擴散阻障,藉此能夠作成一種高頻特性良好的氮化物半導體基板,進而完成本發明。 The inventors have devoted themselves to research on methods to suppress the diffusion of Al and Ga in the single crystal silicon layer during the growth of GaN, resulting in low resistivity and deterioration of high frequency characteristics, and found that by setting the carbon concentration of the single crystal silicon layer to 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less can suppress the diffusion of Al and Ga into the single crystal silicon layer, and can suppress the single crystal silicon layer from becoming low-resistance, thereby achieving both a substrate with good crystallinity and a By using the diffusion barrier of carbon, a nitride semiconductor substrate with good high-frequency characteristics can be produced, and the present invention is completed.
亦即,本發明是一種氮化物半導體基板,其具備:在積層有複數層而成之複合基板上形成有單晶矽層之成長用基板、與被成膜於該成長用基板的前述單晶矽層上的氮化物半導體薄膜; 前述單晶矽層的碳濃度是5E17atoms/cm 3以上且1E22atoms/cm 3以下。 That is, the present invention is a nitride semiconductor substrate including a growth substrate in which a single crystal silicon layer is formed on a composite substrate in which a plurality of layers are laminated, and the single crystal film formed on the growth substrate. Nitride semiconductor thin film on the silicon layer; The carbon concentration of the single crystal silicon layer is 5E17atoms/cm 3 or more and 1E22atoms/cm 3 or less.
此外,本發明是一種氮化物半導體基板的製造方法,該氮化物半導體基板具備成長用基板、與被成膜於該成長用基板上的氮化物半導體薄膜, 該製造方法包含下述步驟: 步驟(1),其在積層有複數層而成之複合基板上,形成碳濃度5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的單晶矽層,來製作成長用基板;及, 步驟(2),其使前述氮化物半導體薄膜磊晶成長於前述成長用基板的前述單晶矽層上,來製造氮化物半導體基板。 In addition, the present invention is a method for manufacturing a nitride semiconductor substrate, which includes a growth substrate and a nitride semiconductor thin film formed on the growth substrate. The manufacturing method includes the following steps: Step ( 1), forming a single crystal silicon layer with a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on a composite substrate in which a plurality of layers are laminated, to produce a substrate for growth; and, step (2) In this method, the nitride semiconductor thin film is epitaxially grown on the single crystal silicon layer of the growth substrate to produce a nitride semiconductor substrate.
以下,詳細地說明本發明,但是本發明不限於此。Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.
[氮化物半導體基板]
本發明的氮化物半導體基板,例如如第1圖所示的氮化物半導體基板300,其具備:在積層有複數層而成之複合基板200上形成有單晶矽層7之成長用基板100、與被成膜於該成長用基板100的前述單晶矽層7上的氮化物半導體薄膜8,並且前述單晶矽層7的碳濃度是5E17atoms/cm
3以上且1E22atoms/cm
3以下。
[Nitride Semiconductor Substrate] The nitride semiconductor substrate of the present invention, for example, the
只要如此地單晶矽層7的碳濃度是5E17atoms/cm
3以上,可抑制往單晶矽層7內的Al與Ga的擴散,能夠抑制單晶矽層7的低電阻化。此外,只要單晶矽層7的碳濃度是1E22atoms/cm
3以下,能夠防止晶性的惡化,因此能夠作成晶性良好的基板。其結果,能夠提供高頻特性良好的氮化物半導體基板。
As long as the carbon concentration of the single
此外,從獲得更優異的二次諧波特性的觀點來看,單晶矽層7的碳濃度較佳是設為1E18atoms/cm
3以上。
In addition, from the viewpoint of obtaining more excellent second harmonic characteristics, the carbon concentration of the single
成長用基板
如第1圖所示,成長用基板100,例如能夠由複合基板200(支撐結構)、被積層於該複合基板200的僅其中一面的平坦化層6及被積層於該平坦化層6的上述碳濃度的單晶矽層7(實質性的單晶矽層)所構成,該複合基板包含多晶陶瓷芯1、被積層於整個該多晶陶瓷芯1的第一黏著層2、被積層於整個該第一黏著層2的導電層3、被積層於整個該導電層3的第二黏著層4及被積層於整個該第二黏著層4的阻障層5。再者,上述導電層3及第一黏著層2可依據需要進行成膜,但是不一定要存在,或者有時也僅成膜於其中一面。
Growth substrate
As shown in FIG. 1 , the
在此處,多晶陶瓷芯1包含氮化鋁,並且藉由煅燒助劑例如在1800℃的高溫中進行煅燒,而具有約600~1150 μm的厚度。基本上,大多是以Si基板的SEMI規格的厚度來形成。Here, the polycrystalline
第一黏著層2及第二黏著層4包含四乙基矽氧烷(TEOS)層或氧化矽(SiO
2)層、或者包含兩者之層,並且是藉由LPCVD製程或CVD製程等來進行堆積並具有大致為50~200 nm的厚度。
The first
導電層3包含多晶矽,並且是藉由LPCVD製程等來進行堆積並具有約150~500 nm的厚度。導電層是用以賦予導電性的層,並且例如可摻雜硼(B)和磷(P)等。該包含多晶矽之導電層3可依據需要設置,也可以不設置,還可以被成膜於僅其中一面。The
此外,阻障層5包含氮化矽層,並且是藉由LPCVD製程等來進行堆積,例如具有100~1000 nm的厚度。In addition, the
平坦化層6藉由LPCVD製程等來進行堆積,厚度是500~3000 nm左右。該平坦化層6是為了上表面的平坦化來進行堆積,較佳是包含四乙基矽氧烷(TEOS)或氧化矽(SiO
2)者,但是可以是SiO
2、Al
2O
3、Si
3N
4或氮氧化矽(Si
xO
yN
z)等一般的陶瓷的膜材料等。
The
單晶矽層7例如具有約100~500 nm的厚度,是作為用以使GaN等其他磊晶成長的成長面來利用的層,可使用層轉印製程等來接合於平坦化層6。如同上述,單晶矽層7是摻雜有特定濃度的碳者。The single
再者,各層的厚度和製造方法、所用的物質等不限於上述厚度和製造方法、所用的物質,也不需存在有全部的層。Furthermore, the thickness, manufacturing method, and materials used of each layer are not limited to the thickness, manufacturing method, and materials used, and all layers do not need to be present.
此外,作為前述成長用基板的另一例,例如能夠如第4圖所示,由複合基板、僅黏合於前述複合基板的正面的平坦化層6及黏合於前述平坦化層的單晶矽層7來構成,該複合基板包含:多晶陶瓷芯1、被積層於整個前述多晶陶瓷芯的第一黏著層2、被積層於整個前述第一黏著層的阻障層5、被積層於前述阻障層的背面的第二黏著層4及被積層於前述第二黏著層的背面的導電層3。In addition, as another example of the growth substrate, for example, as shown in FIG. 4 , a composite substrate, a
只要是使用了這樣的導電層3僅成膜於背面側的結構的成長用基板之氮化物半導體基板,當製作高頻裝置時,不會產生由於成長用基板的正面側導電層所造成的漏洩路徑,而能夠作成高頻特性優異者。As long as a nitride semiconductor substrate is used as a growth substrate in which the
此外,作為前述成長用基板的再另一例,例如能夠如第5圖所示,由複合基板、僅黏合於前述複合基板的正面的平坦化層6及黏合於前述平坦化層的單晶矽層7來構成,該複合基板包含:多晶陶瓷芯1、被積層於整個前述多晶陶瓷芯的第一黏著層2、被積層於前述第一黏著層的背面的導電層3、被積層於前述導電層的背面的第二黏著層4及阻障層5,該阻障層5被積層於前述第一黏著層的正面及側面、前述導電層的側面以及前述第二黏著層的側面及背面。In addition, as yet another example of the growth substrate, for example, as shown in FIG. 5 , a composite substrate, a
只要是使用了這樣的導電層3僅成膜於背面側的結構的成長用基板之氮化物半導體基板,當製作高頻裝置時,不會產生由於成長用基板的正面側導電層所造成的漏洩路徑,而能夠作成高頻特性優異者。As long as a nitride semiconductor substrate is used as a growth substrate in which the
氮化物半導體薄膜
作為形成於成長用基板100的單晶矽層7之上的氮化物半導體薄膜8,並無特別限定,例如能夠設為包含GaN、AlN及AlGaN中的一種以上者。
Nitride semiconductor thin film
The nitride semiconductor
亦即,氮化物半導體薄膜能夠設為AlN、AlGaN及GaN等的磊晶成長層,但是磊晶層的結構不限於此,包含未成膜AlGaN的情況、和在AlGaN成膜後進一步成膜AlN的情況。此外,也包含成膜有複數層使Al組成變化的AlGaN的情況。That is, the nitride semiconductor thin film can be an epitaxial growth layer of AlN, AlGaN, GaN, etc., but the structure of the epitaxial layer is not limited to this, and includes a case where AlGaN is not formed, and a case where AlN is further formed after the AlGaN film is formed. condition. In addition, it also includes the case where a plurality of layers of AlGaN are formed to change the Al composition.
磊晶層的表層側處能夠設置裝置層。裝置層能夠作成設置有下述層之結構:會產生二維電子氣體且晶性高的層(通道層)、會使二維電子氣體產生的層(阻障層)及最表層處的cap層(頂蓋層)。通道層例如能夠設為GaN層,但是不限於此。阻障層能夠使用Al組成為20%左右的AlGaN,但是例如也能夠使用InGaN等,並且不限於此。Cap層例如也能夠設為GaN層和SiN層,並且不限於此。此外,該等裝置層的厚度和阻障層的Al組成,能夠依據裝置的設計來變更。A device layer can be provided on the surface side of the epitaxial layer. The device layer can have a structure provided with the following layers: a layer (channel layer) that generates two-dimensional electron gas and has high crystallinity, a layer that generates two-dimensional electron gas (barrier layer), and a cap layer at the outermost layer (top layer). The channel layer can be a GaN layer, for example, but is not limited thereto. The barrier layer can use AlGaN with an Al composition of about 20%. However, for example, InGaN can also be used, and is not limited thereto. The Cap layer can be a GaN layer or a SiN layer, for example, and is not limited thereto. In addition, the thickness of the device layers and the Al composition of the barrier layer can be changed according to the design of the device.
氮化物半導體薄膜的膜厚可基於用途變更,但是並無特別限定,較佳是氮化物半導體薄膜的總膜厚為2 μm以上且10 μm以下。The film thickness of the nitride semiconductor thin film can be changed depending on the application, but is not particularly limited. Preferably, the total film thickness of the nitride semiconductor thin film is 2 μm or more and 10 μm or less.
[氮化物半導體基板的製造方法] 上述的本發明的氮化物半導體基板,能夠依照以下的操作來製造。以下,說明本發明的氮化物半導體基板的製造方法。 [Method for manufacturing nitride semiconductor substrate] The above-mentioned nitride semiconductor substrate of the present invention can be manufactured according to the following operations. Hereinafter, the method for manufacturing the nitride semiconductor substrate of the present invention will be described.
〈步驟(1)〉 步驟(1)是在積層有複數層而成之複合基板上,形成碳濃度5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的單晶矽層,來製作成長用基板的步驟。作為步驟(1)的實施態樣,可列舉如以下的第一態樣、第二態樣及第三態樣。 <Step (1)> Step (1) is to form a single crystal silicon layer with a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on a composite substrate in which a plurality of layers are laminated to produce a substrate for growth. steps. Examples of implementation aspects of step (1) include the following first, second, and third aspects.
第一態樣 步驟(1)的第一態樣能夠設為包含如以下的步驟(1-1)~(1-3)之步驟。 first form The first aspect of step (1) can be a step including the following steps (1-1) to (1-3).
步驟(1-1) 步驟(1-1)是準備一複合基板作為複合基板的步驟,該複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於整個該第一黏著層的第二黏著層及被積層於整個該第二黏著層的阻障層。此處所準備的複合基板,只要是上述複合基板即可。 Steps (1-1) Step (1-1) is a step of preparing a composite substrate as a composite substrate. The composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, and a first adhesive layer laminated on the entire polycrystalline ceramic core. a second adhesive layer and a barrier layer laminated throughout the second adhesive layer. The composite substrate prepared here may be the above-mentioned composite substrate.
步驟(1-2) 步驟(1-2)是在複合基板的僅其中一面將平坦化層進行積層的步驟。平坦化層只要藉由上述材料及方法進行積層即可。 Steps (1-2) Step (1-2) is a step of laminating a planarizing layer on only one side of the composite substrate. The planarization layer only needs to be laminated using the above-mentioned materials and methods.
步驟(1-3) 步驟(1-3)是藉由將具備單晶矽層之施予基板貼合於平坦化層,來形成單晶矽層的步驟,該單晶矽層具有100~500 nm的厚度且以5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的濃度進行碳摻雜而成。步驟(1-3)能夠包含如以下的步驟(1-3-1)~(1-3-3)之步驟。 Step (1-3) Step (1-3) is a step of forming a single crystal silicon layer by bonding a substrate having a single crystal silicon layer to a planarization layer. The single crystal silicon layer has a thickness of 100 to 500 nm thickness and carbon doping at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less. Step (1-3) can include the following steps (1-3-1) to (1-3-3).
步驟(1-3-1) 步驟(1-3-1)是藉由CVD法將摻雜有碳之單晶矽薄膜成膜於單晶矽基板上,來製作施予基板的步驟。更具體而言,施予基板能夠如以下的操作來製作。 Steps (1-3-1) Step (1-3-1) is a step of forming a single crystal silicon thin film doped with carbon on a single crystal silicon substrate by a CVD method to produce a substrate. More specifically, the donor substrate can be produced as follows.
準備單晶矽基板,利用CVD成膜裝置將高碳濃度的單晶矽薄膜(層)成膜於單晶矽基板上。用於成膜的原料氣體,作為碳源使用單甲基矽烷和三甲基矽烷。作為矽源使用二氯矽烷和單矽烷。原料氣體不限於此。成膜溫度例如能夠設為600~1200℃,但是不限於此。對矽層進行摻雜的碳濃度,能夠藉由原料氣體的流量和成膜溫度來調整。A single crystal silicon substrate is prepared, and a single crystal silicon thin film (layer) with a high carbon concentration is formed on the single crystal silicon substrate using a CVD film forming device. As the raw material gas used for film formation, monomethylsilane and trimethylsilane are used as carbon sources. Dichlorosilane and monosilane are used as silicon sources. The raw material gas is not limited to this. The film forming temperature can be, for example, 600 to 1200°C, but is not limited thereto. The carbon concentration for doping the silicon layer can be adjusted by the flow rate of the raw material gas and the film-forming temperature.
進行成膜的單晶矽薄膜的厚度,能夠藉由成膜時間等來控制,並未對較厚者進行限定,但是必須要是被貼合於成長用基板的最表層的單晶矽層以上的厚度。The thickness of the single crystal silicon thin film to be formed can be controlled by the film formation time, etc., and is not limited to a thicker one. However, it must be at least the single crystal silicon layer bonded to the outermost surface layer of the growth substrate. thickness.
再者,作為本步驟中製作的施予基板,可以是未經摻雜、n型、p型中的任一種,但是較佳是n型單晶矽基板。Furthermore, the donor substrate produced in this step may be undoped, n-type, or p-type, but is preferably an n-type single crystal silicon substrate.
步驟(1-3-2) 步驟(1-3-2)是將施予基板的摻雜有碳之單晶矽薄膜與平坦化層貼合的步驟。 Steps (1-3-2) Step (1-3-2) is a step of bonding the carbon-doped single crystal silicon film applied to the substrate to the planarization layer.
在此處作為施予基板使用的基板,使用由上述步驟(1-3-1)製成的在表面成膜有單晶矽薄膜之單晶矽基板,以高碳濃度的單晶矽薄膜與複合基板上的平坦化層相接的方式來實行貼合。The substrate used here as the application substrate is a single crystal silicon substrate with a single crystal silicon thin film formed on the surface produced in the above step (1-3-1), and the single crystal silicon thin film with a high carbon concentration is combined with the single crystal silicon thin film. The lamination is performed by connecting the planarized layers on the composite substrate.
步驟(1-3-3) 步驟(1-3-3)是將施予基板的單晶矽基板去除,並進一步以使施予基板的摻雜有碳之單晶矽薄膜成為期望的厚度的方式進行加工,來形成碳濃度為5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的單晶矽層的步驟。 Step (1-3-3) Step (1-3-3) is to remove the single crystal silicon substrate applied to the substrate, and further to make the carbon-doped single crystal silicon thin film applied to the substrate a desired thickness. A step of processing in a manner to form a single crystal silicon layer with a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less.
本步驟中,在使施予基板與平坦化層貼合後,留下具有目標厚度且摻雜有碳之單晶矽薄膜,將單晶矽基板與不需要的單晶矽薄膜剝離,並研磨留下的單晶矽薄膜的表面來使平坦度提升。針對剝離,只要使用氫離子注入剝離法等習知的技術即可。在本步驟中形成於平坦化層上的成長用基板表層的高碳濃度的單晶矽層的厚度,較佳是設為100~500 nm。如以上的操作能夠製作成膜用基板。In this step, after the applied substrate and the planarization layer are bonded, a single crystal silicon film with a target thickness and doped with carbon is left. The single crystal silicon substrate and the unnecessary single crystal silicon film are peeled off and polished. The surface of the remaining single crystal silicon film is left to improve flatness. For peeling, a conventional technique such as a hydrogen ion implantation peeling method may be used. In this step, the thickness of the high carbon concentration single crystal silicon layer formed on the surface layer of the growth substrate on the planarization layer is preferably 100 to 500 nm. The film-forming substrate can be produced by performing the above operations.
第二態樣 步驟(1)的第二態樣,能夠設為包含如以下的步驟(1-1)~(1-3)之步驟。 second form The second aspect of step (1) can be a step including the following steps (1-1) to (1-3).
步驟(1-1) 步驟(1-1)是準備一複合基板作為複合基板的步驟,該複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於整個該第一黏著層的阻障層、被基層於該阻障層的背面的第二黏著層及被積層於該第二黏著層的背面的導電層。此處所準備的複合基板,只要是上述複合基板即可。 Steps (1-1) Step (1-1) is a step of preparing a composite substrate as a composite substrate. The composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, and a first adhesive layer laminated on the entire polycrystalline ceramic core. A barrier layer, a second adhesive layer laminated on the back side of the barrier layer, and a conductive layer laminated on the back side of the second adhesive layer. The composite substrate prepared here may be the above-mentioned composite substrate.
步驟(1-2) 步驟(1-2)是在複合基板的阻障層的正面將平坦化層進行積層的步驟。平坦化層只要藉由上述材料及方法進行積層即可。 Steps (1-2) Step (1-2) is a step of laminating a planarization layer on the front surface of the barrier layer of the composite substrate. The planarization layer only needs to be laminated using the above-mentioned materials and methods.
步驟(1-3) 步驟(1-3)是藉由將具備單晶矽層之施予基板貼合於平坦化層,來形成單晶矽層的步驟,該單晶矽層具有100~500 nm的厚度且以5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的濃度進行碳摻雜而成。步驟(1-3)可以與第一態樣同樣地操作來進行。 Step (1-3) Step (1-3) is a step of forming a single crystal silicon layer by bonding a substrate having a single crystal silicon layer to a planarization layer. The single crystal silicon layer has a thickness of 100 to 500 nm thickness and carbon doping at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less. Step (1-3) can be performed in the same manner as in the first aspect.
第三態樣 步驟(1)的第三態樣,能夠設為包含如以下的步驟(1-1)~(1-3)之步驟。 third aspect The third aspect of step (1) can be a step including the following steps (1-1) to (1-3).
步驟(1-1) 步驟(1-1)是準備一複合基板作為複合基板的步驟,該複合基板包含多晶陶瓷芯、被積層於整個該多晶陶瓷芯的第一黏著層、被積層於該第一黏著層的背面的導電層、被積層於該導電層的背面的第二黏著層及阻障層,該阻障層被積層於前述第一黏著層的正面及側面、前述導電層的側面以及前述第二黏著層的側面及背面。此處所準備的複合基板,只要是上述複合基板即可。 Steps (1-1) Step (1-1) is a step of preparing a composite substrate as a composite substrate. The composite substrate includes a polycrystalline ceramic core, a first adhesive layer laminated on the entire polycrystalline ceramic core, and a first adhesive layer laminated on the first adhesive layer. The conductive layer on the back side, the second adhesive layer and the barrier layer laminated on the back side of the conductive layer. The barrier layer is laminated on the front and side surfaces of the first adhesive layer, the side surfaces of the conductive layer and the second adhesive layer. sides and back of the layer. The composite substrate prepared here may be the above-mentioned composite substrate.
步驟(1-2) 步驟(1-2)是在複合基板的阻障層的正面將平坦化層進行積層的步驟。平坦化層只要藉由上述材料及方法進行積層即可。 Steps (1-2) Step (1-2) is a step of laminating a planarization layer on the front surface of the barrier layer of the composite substrate. The planarization layer only needs to be laminated using the above-mentioned materials and methods.
步驟(1-3) 步驟(1-3)是藉由將具備單晶矽層之施予基板貼合於平坦化層,來形成單晶矽層的步驟,該單晶矽層具有100~500 nm的厚度且以5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的濃度進行碳摻雜而成。步驟(1-3)可以與第一態樣同樣地操作來進行。 Step (1-3) Step (1-3) is a step of forming a single crystal silicon layer by bonding a substrate having a single crystal silicon layer to a planarization layer. The single crystal silicon layer has a thickness of 100 to 500 nm thickness and carbon doping at a concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less. Step (1-3) can be performed in the same manner as in the first aspect.
<步驟(2)> 步驟(2)是使氮化物半導體薄膜磊晶成長於成長用基板的單晶矽層上,來製造氮化物半導體基板的步驟。 <Step (2)> Step (2) is a step of manufacturing a nitride semiconductor substrate by epitaxially growing a nitride semiconductor thin film on the single crystal silicon layer of the growth substrate.
在MOCVD反應爐中,在由步驟(1)製成的成長用基板的碳濃度5E17 atoms/cm 3以上且1E22 atoms/cm 3以下的單晶矽層上,實行AlN、AlGaN及GaN等氮化物半導體薄膜的磊晶成長。本步驟中,能夠使上述那樣的氮化物半導體薄膜進行磊晶成長。 In the MOCVD reactor, nitrides such as AlN, AlGaN and GaN are carried out on the single crystal silicon layer with a carbon concentration of 5E17 atoms/cm 3 or more and 1E22 atoms/cm 3 or less on the growth substrate produced in step (1). Epitaxial growth of semiconductor thin films. In this step, the nitride semiconductor thin film as described above can be epitaxially grown.
在磊晶成長時,能夠使用TMAl作為Al源,使用TMGa作為Ga源,使用NH 3作為N源。此外,載體氣體可設為N 2及H 2或者兩者中的任一種氣體,製程溫度能夠設為900~1200℃左右。 During epitaxial growth, TMAl can be used as the Al source, TMGa can be used as the Ga source, and NH3 can be used as the N source. In addition, the carrier gas can be set to N 2 and H 2 or any one of the two gases, and the process temperature can be set to about 900 to 1200°C.
如以上的操作,能夠將氮化物半導體薄膜成膜來製造氮化物半導體基板。 [實施例] Through the above operation, a nitride semiconductor thin film can be formed to produce a nitride semiconductor substrate. [Example]
以下,使用實施例及比較例更具體地說明本發明,但是本發明不限於該等示例。Hereinafter, the present invention will be described in more detail using examples and comparative examples, but the present invention is not limited to these examples.
(實施例) 準備單晶矽基板,利用CVD成膜爐在單晶矽基板上將高碳濃度的單晶矽薄膜進行成膜。使用於成膜的原料氣體,使用三甲基矽烷作為碳源,使用二氯矽烷作為矽源。高碳濃度的單晶矽層的成膜溫度設為1130℃。 (Example) Prepare a single crystal silicon substrate, and use a CVD film forming furnace to form a high carbon concentration single crystal silicon thin film on the single crystal silicon substrate. As raw material gases used for film formation, trimethylsilane was used as the carbon source and dichlorosilane was used as the silicon source. The film formation temperature of the high carbon concentration single crystal silicon layer was set to 1130°C.
藉由成膜時間來控制膜厚,將2 μm的高碳濃度的單晶矽薄膜進行成膜。對高碳濃度的單晶矽薄膜摻雜的碳濃度,藉由原料氣體的流量和成膜溫度來調整,藉此作成以下8種水準。 ・5E17 atoms/cm 3・2E18 atoms/cm 3・7E18 atoms/cm 3・2E19 atoms/cm 3・2E20 atoms/cm 3・4E20 atoms/cm 3・2E21 atoms/cm 3・4E21 atoms/cm 3 The film thickness is controlled by the film formation time, and a 2 μm high carbon concentration single crystal silicon film is formed. The carbon concentration doped into a single crystal silicon thin film with a high carbon concentration can be adjusted to the following eight levels by adjusting the flow rate of the raw material gas and the film formation temperature. ・5E17 atoms/cm 3 ・2E18 atoms/cm 3 ・7E18 atoms/cm 3 ・2E19 atoms/cm 3 ・2E20 atoms/cm 3 ・4E20 atoms/cm 3 ・2E21 atoms/cm 3 ・4E21 atoms/cm 3
繼而,製作磊晶成長用的基板也就是成長用基板。成長用基板是由支撐結構與被積層於該支撐結構的僅其中一面的平坦化層(氧化矽層)構成,該支撐結構包含:多晶陶瓷芯(氮化鋁芯)、被積層於整個多晶陶瓷芯的第一黏著層(氧化矽層)、被積層於整個第一黏著層的導電層(多晶矽層)、被積層於整個導電層的第二黏著層(氧化矽層)及被積層於整個該第二黏著層的阻障層(氮化矽層)。Next, a substrate for epitaxial growth, that is, a growth substrate, is produced. The growth substrate is composed of a support structure including a polycrystalline ceramic core (aluminum nitride core) and a planarization layer (silicon oxide layer) laminated on only one side of the support structure. The first adhesive layer (silicon oxide layer) of the crystalline ceramic core, the conductive layer (polycrystalline silicon layer) laminated on the entire first adhesive layer, the second adhesive layer (silicon oxide layer) laminated on the entire conductive layer, and the The entire barrier layer (silicon nitride layer) of the second adhesive layer.
繼而,在上述平坦化層上,以將各個成膜有上述8種水準的高碳濃度的單晶矽薄膜之單晶矽基板作為施予基板的方式來進行貼合。此時,預先自單晶薄膜的表面先注入氫離子,之後以平坦化層與高碳濃度的單晶矽薄膜接觸的方式實行貼合。Next, on the above-described planarization layer, single-crystal silicon substrates on which single-crystal silicon thin films having the above-mentioned eight levels of high carbon concentrations were respectively formed were bonded together as a substrate. At this time, hydrogen ions are implanted from the surface of the single crystal film in advance, and then the planarization layer is in contact with the single crystal silicon film with a high carbon concentration and is bonded together.
之後,留下450 nm的高碳濃度的單晶矽薄膜,在離子注入層實行剝離。剝離後,以高碳濃度的單晶矽薄膜成為300 nm的方式實行研磨,形成成長用基板表層的單晶矽層。如以上的操作來製作成長用基板。After that, a 450 nm single-crystal silicon film with a high carbon concentration is left, and the ion implantation layer is peeled off. After peeling off, the single-crystal silicon thin film with a high carbon concentration is polished to a thickness of 300 nm to form a single-crystal silicon layer on the surface of the growth substrate. Follow the above steps to prepare a substrate for growth.
將該成長用基板載置於MOCVD反應爐中,在成長用基板上實行AlN、AlGaN及GaN等III族氮化物半導體薄膜的磊晶成長。成長用基板載置於被稱為衛星托盤的晶圓載盤(wafer pocket)中。當磊晶成長時,使用TMAl作為Al源,使用TMGa作為Ga源,使用NH 3作為N源。 This growth substrate is placed in a MOCVD reactor, and epitaxial growth of a Group III nitride semiconductor thin film such as AlN, AlGaN, and GaN is performed on the growth substrate. The growth substrate is placed in a wafer pocket called a satellite pallet. When epitaxially growing, TMAl is used as the Al source, TMGa is used as the Ga source, and NH3 is used as the N source.
載體氣體使用N 2及H 2中的任一種氣體。製程溫度設為900~1200℃左右。當將成長用基板載置於衛星托盤之上來實行磊晶成長時,磊晶層是自基板側起朝向成長方向依序地將AlN、AlGaN進行成膜,之後使GaN進行磊晶成長而成。 As the carrier gas, either N 2 or H 2 gas is used. The process temperature is set to about 900~1200℃. When the growth substrate is placed on the satellite tray to perform epitaxial growth, the epitaxial layer is formed by sequentially forming AlN and AlGaN films from the substrate side toward the growth direction, and then epitaxially growing GaN.
在磊晶層的表層側處設置有裝置層。裝置層作成下述結構,其設置有會產生二維電子氣體且晶性高的GaN層(通道層)約400 nm、會使二維電子氣體產生的層(阻障層)約20 nm,並在最表層設置3 nm左右的cap層。阻障層使用了Al組成設為20%的AlGaN。Cap層設為GaN層。此外,該等裝置層的厚度和阻障層的Al組成可配合裝置的設計來進行變更,因此不限於此。A device layer is provided on the surface side of the epitaxial layer. The device layer has a structure in which a GaN layer (channel layer) of about 400 nm that generates two-dimensional electron gas and has high crystallinity, a layer that generates two-dimensional electron gas (barrier layer) of about 20 nm is provided, and Set a cap layer of about 3 nm on the outermost layer. The barrier layer uses AlGaN whose Al composition is set to 20%. The Cap layer is set to a GaN layer. In addition, the thickness of the device layers and the Al composition of the barrier layer can be changed according to the design of the device, and are therefore not limited thereto.
包含裝置層之磊晶層的總膜厚設為3.5 μm。The total film thickness of the epitaxial layer including the device layer is set to 3.5 μm.
磊晶成長結束後,在磊晶層表面形成電極(CPW:共平面波導,Coplanar Waveguide),輸入頻率1GHz的高頻訊號,來評價二次諧波特性。二次諧波特性使用Pin=15dBm時的值。將結果顯示於第2圖。After the epitaxial growth is completed, an electrode (CPW: Coplanar Waveguide) is formed on the surface of the epitaxial layer, and a high-frequency signal with a frequency of 1 GHz is input to evaluate the second harmonic characteristics. The second harmonic characteristic uses the value when Pin=15dBm. The results are shown in Figure 2.
此外,針對對碳濃度2E19 atoms/cm 3的單晶矽層實行磊晶成長的樣品,藉由晶背SIMS調查在成長用基板表層的單晶矽層內擴散的Al的濃度。將結果顯示於第3圖。 In addition, for a sample in which epitaxial growth was performed on a single crystal silicon layer with a carbon concentration of 2E19 atoms/cm 3 , the concentration of Al diffused in the single crystal silicon layer on the surface of the growth substrate was investigated by back-crystal SIMS. The results are shown in Figure 3.
(比較例1) 針對實施例的成長用基板製作的製程中的最表層的單晶矽層的貼合步驟,除了使用未成膜有高碳濃度的單晶矽薄膜之單晶矽基板作為施予基板以外,與實施例同樣地將氮化物半導體薄膜進行磊晶成長來製作氮化物半導體基板。 (Comparative example 1) For the bonding step of the outermost single crystal silicon layer in the process of manufacturing the growth substrate of the embodiment, in addition to using a single crystal silicon substrate on which a single crystal silicon thin film with a high carbon concentration has not been formed as the application substrate, it is the same as the implementation. In the same manner, a nitride semiconductor thin film is epitaxially grown to produce a nitride semiconductor substrate.
藉由與實施例同樣的方法評價製成的氮化物半導體基板的二次諧波特性。此外,藉由與實施例同樣的方法來測定於成長用基板的單晶矽層內擴散的Al的濃度。將結果顯示於第2圖、第3圖。The second harmonic characteristics of the produced nitride semiconductor substrate were evaluated in the same manner as in the Examples. In addition, the concentration of Al diffused in the single crystal silicon layer of the growth substrate was measured by the same method as in the Example. The results are shown in Figure 2 and Figure 3.
(比較例2) 針對實施例的成長用基板製作的製程中的最表層的單晶矽層的貼合步驟,除了分別使用單晶矽薄膜的碳濃度為以下2種水準之單晶矽基板作為施予基板以外,與實施例同樣地將氮化物半導體薄膜進行磊晶成長來製作氮化物半導體基板。 ・4E16 atoms/cm 3・1E17 atoms/cm 3 (Comparative Example 2) For the bonding step of the outermost single crystal silicon layer in the process of manufacturing the growth substrate of the Example, in addition to using single crystal silicon substrates with the carbon concentration of the single crystal silicon thin film at the following two levels: Except for applying the substrate, the nitride semiconductor thin film is epitaxially grown in the same manner as in the Example to prepare a nitride semiconductor substrate. ・4E16 atoms/cm 3 ・1E17 atoms/cm 3
藉由與實施例同樣的方法評價製成的氮化物半導體基板的二次諧波特性。將結果顯示於第2圖。The second harmonic characteristics of the produced nitride semiconductor substrate were evaluated in the same manner as in the Examples. The results are shown in Figure 2.
如第2圖所示,在實施例中,藉由將氮化物半導體薄膜的成長面也就是單晶矽層的碳濃度設為5E17atoms/cm 3以上且1E22atoms/cm 3以下,二次諧波的特性變好。另一方面,在對氮化物半導體薄膜的成長面也就是單晶矽層未進行碳摻雜的比較例1、和將單晶矽層的碳濃度設為小於5E17atoms/cm 3的比較例2中,並未獲得良好的二次諧波特性。 As shown in Figure 2, in the embodiment, by setting the carbon concentration of the single crystal silicon layer, which is the growth surface of the nitride semiconductor thin film, to 5E17atoms/cm3 or more and 1E22atoms/ cm3 or less, the second harmonic Characteristics get better. On the other hand, in Comparative Example 1 in which the single crystal silicon layer, which is the growth surface of the nitride semiconductor thin film, was not doped with carbon, and in Comparative Example 2 in which the carbon concentration of the single crystal silicon layer was less than 5E17 atoms/cm 3 , good second harmonic characteristics are not obtained.
此外,如第3圖所示,在實施例的氮化物半導體基板中,在成長用基板的高碳濃度的單晶矽層內處,並未發現Al的擴散。另一方面,在比較例1的未進行碳摻雜之單晶矽層處,發現到Al的擴散。此外,實施例的氮化物半導體基板中,在高碳濃度的單晶矽層內處,也未發現Ga的擴散。Furthermore, as shown in FIG. 3 , in the nitride semiconductor substrate of the Example, diffusion of Al was not found in the high carbon concentration single crystal silicon layer of the growth substrate. On the other hand, in Comparative Example 1, the diffusion of Al was observed in the single crystal silicon layer without carbon doping. In addition, in the nitride semiconductor substrate of the Example, Ga diffusion was not found in the single crystal silicon layer with a high carbon concentration.
由以上可知,只要是本發明的氮化物半導體基板及其製造方法,在氮化物半導體的成長中Al會在單晶矽層內擴散進行低電阻化,並且能夠抑制高頻特性劣化的情況。From the above, it can be seen that the nitride semiconductor substrate and its manufacturing method of the present invention can suppress the deterioration of high-frequency characteristics by diffusing Al in the single crystal silicon layer during the growth of the nitride semiconductor to reduce the resistance.
再者,本發明不限於上述實施形態。上述實施形態為例示,與本發明的發明申請專利範圍所記載的技術思想具有實質性相同的構成並發揮相同的作用效果者,全部皆包含在本發明的技術範圍中。In addition, the present invention is not limited to the above-described embodiment. The above-mentioned embodiments are only examples, and any embodiments that have substantially the same configuration as the technical ideas described in the patent application scope of the present invention and exhibit the same functions and effects are all included in the technical scope of the present invention.
1:多晶陶瓷芯 2:第一黏著層 3:導電層 4:第二黏著層 5:阻障層 6:平坦化層 7:單晶矽層 8:氮化物半導體薄膜 100:成長用基板 200:複合基板 300:氮化物半導體基板 1: Polycrystalline ceramic core 2: First adhesive layer 3: Conductive layer 4: Second adhesive layer 5: Barrier layer 6: Planarization layer 7:Single crystal silicon layer 8:Nitride semiconductor film 100: Substrate for growth 200:Composite substrate 300:Nitride semiconductor substrate
第1圖是顯示本發明的氮化物半導體基板的一例的示意圖。 第2圖是顯示由實施例及比較例製成的氮化物半導體基板的成長用基板表層的單晶矽層的碳濃度與二次諧波特性的關係的圖表。 第3圖是顯示具備了實施例的氮化物半導體基板的高碳濃度的單晶矽層之成長用基板及具備了比較例1的氮化物半導體基板的一般的單晶矽層之成長用基板中的晶背SIMS的結果的圖表。 第4圖是顯示用於本發明的成長用基板的另一例的示意圖。 第5圖是顯示用於本發明的成長用基板的再另一例的示意圖。 FIG. 1 is a schematic diagram showing an example of the nitride semiconductor substrate of the present invention. FIG. 2 is a graph showing the relationship between the carbon concentration and the second harmonic characteristics of the single crystal silicon layer on the surface layer of the growth substrate of the nitride semiconductor substrate produced in Examples and Comparative Examples. FIG. 3 shows a growth substrate including a high carbon concentration single crystal silicon layer of the nitride semiconductor substrate of the Example and a growth substrate including a general single crystal silicon layer of the nitride semiconductor substrate of Comparative Example 1. Graph of crystal back SIMS results. FIG. 4 is a schematic diagram showing another example of the growth substrate used in the present invention. FIG. 5 is a schematic diagram showing yet another example of the growth substrate used in the present invention.
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in order of storage institution, date and number) without Overseas storage information (please note in order of storage country, institution, date, and number) without
1:多晶陶瓷芯 1: Polycrystalline ceramic core
2:第一黏著層 2: First adhesive layer
3:導電層 3: Conductive layer
4:第二黏著層 4: Second adhesive layer
5:阻障層 5: Barrier layer
6:平坦化層 6: Planarization layer
7:單晶矽層 7:Single crystal silicon layer
8:氮化物半導體薄膜 8:Nitride semiconductor film
100:成長用基板 100: Substrate for growth
200:複合基板 200:Composite substrate
300:氮化物半導體基板 300:Nitride semiconductor substrate
Claims (18)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021169808 | 2021-10-15 | ||
JP2021-169808 | 2021-10-15 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW202336831A true TW202336831A (en) | 2023-09-16 |
Family
ID=85987682
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW111136276A TW202336831A (en) | 2021-10-15 | 2022-09-26 | Nitride semiconductor substrate and manufacturing method therefor |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP7533793B2 (en) |
TW (1) | TW202336831A (en) |
WO (1) | WO2023063046A1 (en) |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0831419B2 (en) * | 1990-12-25 | 1996-03-27 | 名古屋大学長 | Method for producing compound semiconductor single crystal on single crystal silicon substrate |
JP2005203666A (en) * | 2004-01-19 | 2005-07-28 | Kansai Electric Power Co Inc:The | Method for manufacturing compound semiconductor device |
JP2006196713A (en) * | 2005-01-13 | 2006-07-27 | National Institute Of Advanced Industrial & Technology | Semiconductor device, manufacturing method thereof, and deuterium treatment apparatus |
JP5817127B2 (en) * | 2011-01-21 | 2015-11-18 | 株式会社Sumco | Semiconductor substrate and manufacturing method thereof |
JP5912383B2 (en) | 2011-10-03 | 2016-04-27 | クアーズテック株式会社 | Nitride semiconductor substrate |
JP6101565B2 (en) * | 2013-05-27 | 2017-03-22 | シャープ株式会社 | Nitride semiconductor epitaxial wafer |
JP6626607B2 (en) * | 2016-06-14 | 2019-12-25 | クロミス,インコーポレイテッド | Designed substrate structures for power and RF applications |
TWI692869B (en) * | 2019-05-03 | 2020-05-01 | 世界先進積體電路股份有限公司 | Substrate and its manufacturing method |
JP7549549B2 (en) * | 2021-02-26 | 2024-09-11 | 信越半導体株式会社 | Nitride semiconductor substrate and method for producing same |
-
2022
- 2022-09-22 JP JP2023532640A patent/JP7533793B2/en active Active
- 2022-09-22 WO PCT/JP2022/035314 patent/WO2023063046A1/en active Application Filing
- 2022-09-26 TW TW111136276A patent/TW202336831A/en unknown
Also Published As
Publication number | Publication date |
---|---|
WO2023063046A1 (en) | 2023-04-20 |
JP7533793B2 (en) | 2024-08-14 |
JPWO2023063046A1 (en) | 2023-04-20 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN110223918B (en) | Aperture type composite substrate gallium nitride device and preparation method thereof | |
CN109844184A (en) | Engineering substrat structure for power application and radio frequency applications | |
CN114582972B (en) | GAAFET device and preparation method thereof | |
CN107316805A (en) | The manufacture device of the manufacture method of silicon carbide epitaxy chip, the manufacture method of manufacturing silicon carbide semiconductor device and silicon carbide epitaxy chip | |
CN105810725A (en) | Silicon-based gallium nitride semiconductor wafer and manufacturing method thereof | |
EP4299802A1 (en) | Nitride semiconductor substrate and manufacturing method therefor | |
TWI762501B (en) | Growth of epitaxial gallium nitride material using a thermally matched substrate | |
CN109065682A (en) | A kind of LED epitaxial slice and its manufacturing method | |
CN112614880A (en) | Method for preparing gallium nitride device with diamond composite substrate and device thereof | |
CN105006427B (en) | A kind of method that high-quality gallium nitride epitaxial structure is grown using low temperature buffer layer | |
TW202336831A (en) | Nitride semiconductor substrate and manufacturing method therefor | |
JP7533794B2 (en) | Method for manufacturing nitride semiconductor substrate | |
JP7657530B2 (en) | High performance epitaxial growth substrate and manufacturing method thereof | |
TW202340551A (en) | Nitride semiconductor substrate and method for manufacturing the same | |
JP7652274B2 (en) | Nitride semiconductor substrate and method for producing same | |
CN114628523A (en) | A kind of CMOS field effect transistor based on gallium nitride and preparation method thereof | |
TW202249085A (en) | Nitride semiconductor substrate and method for producing same | |
US8026517B2 (en) | Semiconductor structures | |
CN113964179B (en) | Si-based AlGaN/GaN HEMT based on wrapping buried layer and diffusion barrier layer and preparation method | |
TW202331794A (en) | Nitride semiconductor substrate and method for manufacturing nitride semiconductor substrate | |
WO2025041458A1 (en) | Nitride semiconductor epitaxial wafer and method for manufacturing nitride semiconductor epitaxial wafer | |
TW202511553A (en) | Nitride semiconductor epitaxial wafer and method for manufacturing nitride semiconductor epitaxial wafer | |
JP2023092416A (en) | Nitride semiconductor substrate and method for manufacturing nitride semiconductor substrate | |
WO2022168572A1 (en) | Nitride semiconductor substrate and method for producing same | |
CN116207196A (en) | LED epitaxial wafer, preparation method thereof and LED chip |