TW202146998A - Display apparatus and manufacturing method thereof - Google Patents

Abstract

A display apparatus including a substrate and a light-emitting diode (LED) is procided. The substrate has a bottom surface. The substrate includes a first conductive pad, a second conductive pad, a first convex structure and a second convex structure on the bottom surface. The first convex structure has a first side. There is a first included angle between the bottom surface and the first side surface. The second convex structure has a second side. There is a second included angle between the bottom surface and the second side surface. The LED has a bottom side adjacent to the substrate and a top surface opposite to the bottom side. The LED includes a first conductive terminal and a second conductive terminal. The first conductive terminal is electrically connected to the first conductive pad and has a third side. There is a third included angle between the top surface and the third side surface. The second conductive terminal is electrically connected to the second conductive pad and has a fourth side. There is a fourth included angle between the top surface and the fourth side surface. The fourth included angle is greater than the third included angle. The second included angle is greater than the first included angle. The third included angle is greater than or equal to the first included angle. The fourth included angle is greater than or equal to the second included angle.

Description

Display device and method of manufacturing the same

The present invention relates to an electronic device and a manufacturing method thereof, and more particularly, to a display device and a manufacturing method thereof.

In the manufacturing process of a display device with light-emitting diodes (LEDs), the electrode anisotropy, landing offset, wafer rotation and/or others of the light-emitting diodes in the bonding process are the same or similar to the above Process defects often lead to reduced quality or yield of display devices.

The present invention provides a display device and a manufacturing method thereof, which have better quality.

The display device of the present invention includes a substrate and a light emitting diode. The substrate has a bottom surface. The substrate includes a first conductive pad, a second conductive pad, a first raised structure and a second raised structure. The first conductive pads are located on the bottom surface of the substrate. The second conductive pads are located on the bottom surface of the substrate. The first protruding structure is located on the bottom surface and has a first side surface. There is a first included angle between the bottom surface and the first side surface. The second protruding structure is located on the bottom surface and has a second side surface. There is a second included angle between the bottom surface and the second side surface. The light emitting diode has a bottom side adjacent to the substrate and a top surface opposite the bottom side. The light emitting diode includes a first conductive terminal and a second conductive terminal. The first conductive terminal is electrically connected to the first conductive pad and has a third side surface. A third included angle is formed between the top surface and the third side surface. The second conductive terminal is electrically connected to the second conductive pad and has a fourth side surface. A fourth included angle is formed between the top surface and the fourth side surface. The fourth included angle is greater than the third included angle. The second included angle is greater than the first included angle. The third included angle is greater than or equal to the first included angle. The fourth included angle is greater than or equal to the second included angle.

The manufacturing method of the display device of the present invention comprises the following steps: provide the substrate, It includes a first conductive pad, the second conductive pad, a first protruding structure and a second protruding structure, The first conductive pad is located on the bottom surface of the substrate, The second conductive pad is located on the bottom surface of the substrate, The first protruding structure is located on the bottom surface and has a first side surface, There is a first included angle between the bottom surface and the first side surface, The second protruding structure is located on the bottom surface and has a second side surface, There is a second included angle between the bottom surface and the second side surface; provide light-emitting diodes, It has a bottom side adjacent to the substrate and a top surface opposite the bottom side, The light emitting diode includes a first conductive terminal and a second conductive terminal, The first conductive terminal is electrically connected to the first conductive pad and has a third side surface, There is a third included angle between the top surface and the third side surface, The second conductive terminal is electrically connected to the second conductive pad and has a fourth side surface, There is a fourth included angle between the top surface and the fourth side surface; With the first conductive terminal and the second conductive terminal facing the substrate, the first conductive terminal and the second conductive terminal of the light-emitting diode are electrically connected to the first conductive pad and the second conductive pad, The fourth included angle is greater than the third included angle, The second included angle is greater than the first included angle, The third included angle is greater than or equal to the first included angle, And the fourth included angle is greater than or equal to the second included angle.

Based on the above, the display device and the manufacturing method thereof of the present invention can improve the quality of the display device.

In order to make the above-mentioned features and advantages of the present invention more obvious and easy to understand, the following specific embodiments are given and described in detail with the accompanying drawings as follows. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of each element and the like is exaggerated for clarity. The same reference numerals refer to the same elements throughout the specification. It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on," "connected to," "overlapping on" another element, it can be directly on the other element on or connected to another element, or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to a physical and/or electrical connection.

It will be understood that, although the terms "first", "second", "third", "third", etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components , regions, and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a "first element," "component," "region," "layer," or "section" discussed below could be termed a second element, component, region, layer or section without departing from the teachings herein.

The terminology used herein is for the purpose of describing particular embodiments only and is not limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms including "at least one" unless the content clearly dictates otherwise. "Or" means "and/or". As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. It will also be understood that the terms "comprising" and/or "comprising" when used in this specification designate the stated feature, region, integer, step, operation, presence of an element and/or part, but do not exclude one or more The presence or addition of other features, entireties of regions, steps, operations, elements, components, and/or combinations thereof.

Furthermore, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe one element's relationship to another element, as shown in the figures. It should be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation shown in the figures. For example, if the device in one of the figures is turned over, elements described as being on the "lower" side of other elements would then be oriented on "upper" sides of the other elements. Thus, the exemplary term "lower" may include an orientation of "lower" and "upper", depending on the particular orientation of the drawings. Similarly, if the device in one of the figures is turned over, elements described as "below" or "beneath" other elements would then be oriented "above" the other elements. Thus, the exemplary terms "below" or "below" can encompass both an orientation of above and below.

As used herein, "about" or "substantially" includes the stated value and the average value within an acceptable deviation of the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the error associated with the measurement. A specific quantity (that is, the limit of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%.

Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed as having meanings consistent with their meanings in the context of the related art and the present invention, and are not to be construed as idealized or excessive Formal meaning, unless expressly defined as such herein.

Exemplary embodiments are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments. Thus, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and/or tolerances, are to be expected. Accordingly, the embodiments described herein should not be construed as limited to the particular shapes of regions as shown herein, but rather include deviations in shapes resulting from, for example, manufacturing. For example, regions illustrated or described as flat may typically have rough and/or nonlinear features. Additionally, the acute angles shown may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and are not intended to limit the scope of the claims.

In the specification, the angle between two directions (ie, vectors) can be inferred by general mathematical methods (eg, Cosine Rule). Therefore, the description does not limit the angle formed by the two directions to be an angle having a cross point. For example, even though a straight line corresponding to one extending direction and another straight line corresponding to another extending direction are substantially skew lines that do not intersect with each other and are not parallel to each other, the aforementioned one extending direction and the aforementioned other The extension direction may also have an included angle derived according to a general mathematical method. In addition, an angle between a direction and a plane usually refers to the complementary angle of another angle formed by the normal vector of the direction and the plane in space. pushed. In addition, the numerical value expressed in the specification may include the numerical value and the deviation value within the range of deviation acceptable to those of ordinary knowledge in the art. The above deviation value can be one or more standard deviations in the manufacturing process or measurement process (Standard Deviation), or in the calculation or conversion process due to the number of digits, rounding, unit conversion or through error propagation (Error Propagation) calculation errors caused by other factors.

1A to FIG. 1E are partial cross-sectional schematic diagrams of a partial formation method of a light emitting diode according to the first embodiment of the present invention.

Referring to FIG. 1A , a semiconductor device 110 is provided. The semiconductor element 110 may be located on the carrier board. The carrier can be a gallium arsenide (GaAs) substrate, a gallium phosphide (GaP) substrate, an indium phosphide (InP) substrate, a sapphire (Sapphire) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, a silicon The substrate, glass substrate or other suitable carrier is not limited in the present invention.

The semiconductor element 110 may include a first electrode 111 , a first type semiconductor layer 112 , a light emitting region 113 , a second type semiconductor layer 114 , a second electrode 115 , and an insulating layer 116 . The light emitting region 113 is located between the first type semiconductor layer 112 and the second type semiconductor layer 114 . The insulating layer 116 may cover the first type semiconductor layer 112 , the light emitting region 113 and the second type semiconductor layer 114 . The material, composition, structure or impurity concentration of the light-emitting region 113 can be adjusted according to design requirements, which is not limited in the present invention.

In this embodiment, the semiconductor element 110 may further include a first electrode 111 and a second electrode 115 . The first electrode 111 is located on the first type semiconductor layer 112 (taking the direction of FIG. 1A as an example, the first electrode 111 is located above the first type semiconductor layer 112 ) and is electrically connected to the first type semiconductor layer 112 . The second electrode 115 is located on the second type semiconductor layer 114 (taking the direction of FIG. 1A as an example, the second electrode 115 is located above the second type semiconductor layer 114 ) and is electrically connected to the second type semiconductor layer 114 . The insulating layer 116 may further cover the first electrode 111 , and the insulating layer 116 may expose a part of the first electrode 111 .

Referring to FIG. 1A to FIG. 1B , a conductive material layer 129 is formed on the semiconductor device 110 .

In this embodiment, the conductive material layer 129 can be formed by, for example, sputtering, vapor deposition and/or electroplating, which is not limited in the present invention. In addition, the material of the conductive material layer 129 can be adjusted according to design requirements, which is not limited in the present invention.

Please continue to refer to FIG. 1B , a positive photoresist material layer 136 is formed on the conductive material layer 129 .

Referring to FIGS. 1B to 1D , a photoresist patterning step may be performed on the positive photoresist layer 136 (shown in FIG. 1B ) to form a patterned positive photoresist layer 138 (shown in FIG. 1D ). The photoresist patterning steps of this embodiment are described as follows.

Referring to FIGS. 1B to 1C , the first photomask M1 can be used as a mask to perform at least an exposure step on a portion of the positive photoresist layer 136 (shown in FIG. 1B ) with the first light L1 .

In the present embodiment, after a portion of the positive photoresist layer 136 is exposed and developed with the first light L1, a developing step may be performed to remove a portion of the positive photoresist layer 136 (shown in FIG. 1B ). , to form a patterned positive photoresist layer 137 (shown in FIG. 1C ).

Referring to FIGS. 1C to 1D , the second photomask M2 can be used as a mask, and a portion of the positive photoresist layer 137 (shown in FIG. 1C ) can be exposed and developed with the second light L2 , to remove part of the positive photoresist layer 137 .

Referring to FIG. 1D , a patterned positive photoresist layer 138 can be formed by at least the above steps.

In a not-shown embodiment, part of the positive photoresist layer 136 may be exposed by the first light L1 by using the first mask M1 as a mask, and the second mask M2 may be used as a mask to expose a portion of the positive photoresist layer 136. Part of the positive photoresist material layer 136 irradiated by the first light L1 or the second light L2 is developed to form a patterned positive photoresist material layer 138 after the two light beams L2 expose at least a portion of the positive photoresist material layer 136 .

In this embodiment, the patterned positive photoresist layer 138 can be formed by multiple exposures and development methods, and different sidewalls of the patterned positive photoresist layer 138 can have different morphologies. For example, the patterned positive photoresist layer 138 may have a first sidewall 138c and a second sidewall 138d that are different from each other, and the slope of the second sidewall 138d may be greater than that of the first sidewall 138c. In addition, the corresponding slopes of the different sidewalls of the patterned positive photoresist layer 138 can also be adjusted according to the above steps.

In this embodiment, the pattern of the first mask M1 and the pattern of the second mask M2 can be adjusted according to design requirements, and/or the exposure amount (including the light intensity and/or the amount of exposure performed by the first light L1) or exposure time) and the exposure amount (including light intensity and/or exposure time) performed by the second light L2 can be adjusted according to design requirements. For example, the pattern of the first mask M1 may be different from the pattern of the second mask M2, and the exposure amount by the first light L1 may be different from the exposure amount by the second light L2, but the present invention Not limited to this.

Referring to FIGS. 1D to 1E , after the aforementioned photoresist patterning step, the patterned positive photoresist material layer 138 (shown in FIG. 1D ) can be used as a mask to remove part of the conductive material layer 129 (shown in FIG. shown in Figure 1D).

In this embodiment, ion beam etching (Ion Beam Etching; IBE), reactive ion etching (Reactive Ion Etching; RIE) or other suitable anisotropic etching (anisotropic etching) can be used to remove part of the The conductive material layer 129 forms corresponding first conductive terminals 161 and second conductive terminals 162 .

In this embodiment, by patterning the topography of the positive photoresist material layer 138 , the side surfaces of the first conductive terminals 161 and the side surfaces of the second conductive terminals 162 can have corresponding slopes.

After the above steps, the light emitting diode 100 of the present embodiment can be roughly formed.

Referring to FIG. 1E , the light emitting diode 100 may include a semiconductor element 110 , a first conductive terminal 161 and a second conductive terminal 162 . The first conductive terminal 161 may be located on the first type semiconductor layer 112 of the semiconductor element 110 , and the first conductive terminal 161 is electrically connected to the first type semiconductor layer 112 . The second conductive terminal 162 may be located on the second type semiconductor layer 114 of the semiconductor element 110 , and the second conductive terminal 162 is electrically connected to the second type semiconductor layer 114 .

The light emitting diode 100 has a bottom side 110a and a top side 110b opposite to the bottom side 110a. The first conductive terminal 161 has a third side surface S3 and a fifth side surface S5 opposite to the third side surface S3, wherein a third included angle θ3 is formed between the top surface 110b (or a virtual surface parallel thereto) and the third side surface S3 , and there is a fifth included angle θ5 between the top surface 110b (or a virtual surface parallel thereto) and the fifth side surface S5 . The second conductive terminal 162 has a fourth side surface S4 and a sixth side surface S6 opposite to the fourth side surface S4, wherein a fourth included angle θ4 is formed between the top surface 110b (or a virtual surface parallel thereto) and the fourth side surface S4 , and there is a sixth angle θ6 between the top surface 110b (or a virtual surface parallel to it) and the sixth side surface S6 . The third included angle θ3 and the fourth included angle θ4 face the outside of the light-emitting diode 100 , and the fifth included angle θ5 and the sixth included angle θ6 face the inside of the light-emitting diode 100 .

In this embodiment, the angle of the fifth included angle θ5 may be different from the angle of the third included angle θ3, but the present invention is not limited thereto.

In this embodiment, the angle of the sixth included angle θ6 may be different from the angle of the fourth included angle θ4, but the present invention is not limited thereto.

In this embodiment, the first conductive terminal 161 or the second conductive terminal 162 includes a block conductor. For example, the entire structure of the first conductive terminal 161 or the second conductive terminal 162 may be a block conductor.

FIG. 2 is a partial cross-sectional schematic diagram of a partial formation method of a light emitting diode according to a second embodiment of the present invention. The formation method of the light-emitting diode (not shown or marked) of this embodiment is similar to that of the light-emitting diode 100 of the first embodiment, and the similar components are denoted by the same reference numerals and have similar functions, material or forming method, and the description is omitted. For example, FIG. 2 may be a partial cross-sectional schematic diagram of a method of forming a light emitting diode following the steps of FIG. 1B .

Referring to FIGS. 1B and 2 , a photoresist patterning step may be performed on the positive photoresist layer 136 (shown in FIG. 1B ) to form a patterned positive photoresist layer 238 (shown in FIG. 2 ). The photoresist patterning steps of this embodiment are described as follows.

In this embodiment, the third photomask M3 can be used as a mask, and the third light L3 can be used to perform a photolithography process on part of the positive photoresist layer 136 to remove part of the positive photoresist layer 136 . to form a patterned positive photoresist layer 238 .

In this embodiment, the third mask M3 may be a half-tone mask or a gray-scale mask (gray-scale mask/gray-tone mask). For example, the third mask M3 has a first light-shielding region M3a and a second light-shielding region M3b, and the light-shielding rate per unit area of the first light-shielding region M3a may be greater than the light-shielding rate per unit area of the second light-shielding region M3b. For another example, the first light shielding region M3a can completely shield the third light beam L3, and the second light shielding region M3b can shield a part of the third light beam L3 and allow another part of the third light beam L3 to penetrate.

Referring to FIG. 2 and FIG. 1E , after the aforementioned photoresist patterning step, part of the conductive material layer 129 may be removed by patterning the positive photoresist material layer 238 as a mask.

After the above steps, the light emitting diode (not shown or marked) of the present embodiment can be generally formed. The light-emitting diodes (not shown or labeled) of this embodiment may be the same or similar to the light-emitting diodes 100 of the foregoing embodiments, and thus will not be repeatedly described or shown here.

3A to 3D are partial cross-sectional schematic views of a partial formation method of a light emitting diode according to a third embodiment of the present invention. The formation method of the light-emitting diode (not shown or marked) of this embodiment is similar to that of the light-emitting diode 100 of the first embodiment, and similar components are denoted by the same reference numerals and have similar functions, material or forming method, and the description is omitted. For example, FIG. 3A may be a partial cross-sectional schematic diagram of a method of forming a light emitting diode following the steps of FIG. 1A .

Referring to FIGS. 1A and 3A to 3C , a negative photoresist material layer and corresponding photoresist patterning steps may be formed on the semiconductor device 110 multiple times to form a patterned negative photoresist material layer. The photoresist patterning steps of this embodiment are described as follows.

Referring to FIG. 1A and FIG. 3A , a first negative photoresist material layer 346 is formed on the semiconductor device 110 .

Referring to FIGS. 3A to 3B , the fourth photomask M4 can be used as a mask to expose and develop a portion of the first negative photoresist material layer 346 (shown in FIG. 3A ) with the fourth light L4 developing) step to remove a portion of the first negative photoresist layer 346 . And, by at least the above steps, a patterned first negative photoresist material layer 347 (shown in FIG. 3B ) can be formed.

Referring to FIGS. 3B to 3C , the patterned second negative photoresist material layer 348 may be formed in a manner similar to that of the patterned first negative photoresist material layer 347 .

For example, a second negative photoresist material layer (not shown) may be formed on the semiconductor device 110 . Then, by using the fifth mask M5 as a mask, a part of the second negative photoresist material layer can be exposed and developed with the fifth light L5 to remove part of the second negative photoresist material layer. And, by at least the above steps, the patterned second negative photoresist material layer 348 can be formed.

In this embodiment, the pattern of the fourth mask M4 and the pattern of the fifth mask M5 can be adjusted according to design requirements, and/or the exposure amount (including light intensity and /or exposure time) and the exposure amount (including light intensity and/or exposure time) performed by the fifth light L5 can be adjusted according to design requirements. For example, the pattern of the fourth mask M4 may be different from the pattern of the fifth mask M5, and the exposure amount by the fourth light L4 may be different from the exposure amount by the fifth light L5, but the present The invention is not limited to this.

In this embodiment, the material of the first negative photoresist material layer 346 may be the same or different from that of the second negative photoresist material layer.

In this embodiment, the patterned negative photoresist layer 349 can be formed by the above steps. That is, the patterned negative photoresist material layer 349 may include a patterned first negative photoresist material layer 347 and a patterned second negative photoresist material layer 348 .

Referring to FIGS. 3C to 3D , after the patterned negative photoresist material layer 349 is formed, a conductive material layer 329 may be formed on the semiconductor device 110 . Part of the conductive material layer 329 a may cover and be electrically connected to the semiconductor element 110 , and part of the conductive material layer 329 b may cover the patterned negative photoresist material layer 349 .

In this embodiment, the conductive material layer 329 can be formed by, for example, sputtering, evaporation and/or other suitable isotropic deposition methods.

Referring to FIGS. 3D and 1E, after the conductive material layer 329 is formed (shown in FIG. 3D ), the patterned negative photoresist material layer 349 (shown in FIG. 3D ) may be removed to correspondingly remove the overlying layer of the pattern Part of the conductive material layer 329b (shown in FIG. 3D ) on the negative photoresist material layer 349 is removed. In addition, a portion of the conductive material layer 329a (shown in FIG. 3D ) covering and electrically connected to the semiconductor element 110 may constitute the first conductive terminal 161 (shown in FIG. 1E ) or the second conductive terminal 162 (shown in FIG. 1E ) of the light-emitting diode. shown in Figure 1E).

After the above steps, the light emitting diode (not shown or marked) of the present embodiment can be generally formed. The light-emitting diodes (not shown or labeled) of this embodiment may be the same or similar to the light-emitting diodes 100 of the foregoing embodiments, and thus will not be repeatedly described or shown here.

FIG. 4 is a partial cross-sectional schematic diagram of a partial formation method of a light emitting diode according to a fourth embodiment of the present invention. The formation method of the light-emitting diode (not shown or marked) of this embodiment is similar to that of the light-emitting diode (not shown or marked) of the third embodiment, and the similar components are denoted by the same reference numerals. and have similar functions, materials or forming methods, and the description is omitted. For example, FIG. 4 may be a partial cross-sectional schematic diagram of a method of forming a light emitting diode following the steps of FIG. 3A .

Referring to FIGS. 3A and 4 , a photoresist patterning step may be performed on the negative photoresist layer 346 (shown in FIG. 1E ) to form a patterned negative photoresist layer 449 (shown in FIG. 4 ). The photoresist patterning steps of this embodiment are described as follows.

In this embodiment, the sixth photomask M6 can be used as a mask, and the sixth light L6 can be used to perform a photolithography process on part of the negative photoresist material layer to remove part of the negative photoresist material layer 346 . (shown in FIG. 1E ) to form a patterned negative photoresist layer 449 (shown in FIG. 4 ).

In this embodiment, the sixth mask M6 may be a half-dimming mask or a gray-scale mask. For example, the sixth mask M6 has a first light-shielding region M6a and a second light-shielding region M6b, and the light-shielding ratio per unit area of the first light-shielding region M6a may be greater than the light-shielding ratio per unit area of the second light-shielding region M6b. For another example, the first light shielding region M6a can completely shield the sixth light ray L6, and the second light shielding region M6b can shield a part of the sixth light ray L6 and allow another part of the sixth light ray L6 to penetrate.

Referring to FIGS. 4 and 3D , after the patterned negative photoresist material layer 449 (shown in FIG. 4 ) is formed, a conductive material layer 329 (shown in FIG. 3D ) may be formed on the semiconductor device 110 . Afterwards, the first conductive terminal 161 (shown in FIG. 1E ) or the second conductive terminal 162 (shown in FIG. 1E ) of the light emitting diode can be formed by the same or similar steps as those shown in FIG. 3D and FIG. 1E ).

After the above steps, the light emitting diode (not shown or marked) of the present embodiment can be generally formed. The light-emitting diodes (not shown or labeled) of this embodiment may be the same or similar to the light-emitting diodes 100 of the foregoing embodiments, and thus will not be repeatedly described or shown here.

5A to 5D are partial cross-sectional schematic views of a partial formation method of a light emitting diode according to a fifth embodiment of the present invention. The formation method of the light-emitting diode of this embodiment is similar to that of the light-emitting diode of the first embodiment, and the similar components are denoted by the same reference numerals and have similar functions, materials or formation methods, and the description is omitted. . For example, FIG. 5A may be a partial cross-sectional schematic diagram of a method of forming a light emitting diode following the steps of FIG. 1A .

Referring to FIG. 1A and FIG. 5A , a photosensitive dielectric material layer 556 is formed on the semiconductor device 110 .

Referring to FIGS. 5A to 5C , a patterning step may be performed on the photosensitive dielectric material layer 556 (shown in FIG. 5A ) to form a patterned photosensitive dielectric material layer 559 (shown in FIG. 5C ). The patterning steps of this embodiment are described as follows.

Referring to FIGS. 5A to 5B , the seventh photomask M7 can be used as a mask to perform at least an exposure step on a part of the photosensitive dielectric material layer 556 (shown in FIG. 5A ) with the seventh light L7 .

In this embodiment, after part of the photosensitive dielectric material layer 556 (shown in FIG. 5A ) is exposed and developed with the seventh light L7 , part of the photosensitive dielectric material may be removed by a developing step layer 556 to form a patterned photosensitive dielectric material layer 557 (shown in FIG. 5B ).

Referring to FIGS. 5B to 5C , a part of the photosensitive dielectric material layer 557 (shown in FIG. 5B ) can be exposed and developed with the eighth light L8 by using the eighth mask M8 as a mask. step to remove part of the photosensitive dielectric material layer 557 .

Referring to FIG. 5C, a patterned photosensitive dielectric material layer 559 can be formed by at least the above steps.

In a not-shown embodiment, the seventh photomask M7 may be used as a mask to expose a part of the photosensitive dielectric material layer with a seventh light L7, and the eighth photomask M8 may be used as a mask to expose a part of the photosensitive dielectric material layer. Part of the photosensitive dielectric material layer 556 irradiated by the seventh light L7 or the eighth light L8 is developed to form a patterned photosensitive dielectric material layer after the eighth light L8 exposes at least part of the photosensitive dielectric material layer. 559.

In this embodiment, the patterned photosensitive dielectric material layer 559 can be formed by multiple exposures and development methods, and different sidewalls of the patterned photosensitive dielectric material layer 559 can have different morphologies. For example, different portions of the patterned photosensitive dielectric material layer 559 may have different first sidewalls 559c and second sidewalls 559d from each other. The slope of the second sidewall 559d of the patterned photosensitive dielectric material layer 559b may be greater than the slope of the first sidewall 559c of the patterned photosensitive dielectric material layer 559a. In addition, the corresponding slopes of different sidewalls of the patterned photosensitive dielectric material layer 559 can also be adjusted according to the above steps.

In this embodiment, the pattern of the seventh mask M7 and the pattern of the eighth mask M8 can be adjusted according to design requirements, and/or the exposure amount (including the light intensity and/or the amount of exposure performed by the seventh light L7) or exposure time) and the exposure amount (including light intensity and/or exposure time) performed by the eighth light L8 can be adjusted according to design requirements. For example, the pattern of the seventh mask M7 may be different from the pattern of the eighth mask M8, and the exposure amount by the seventh light L7 may be different from the exposure amount by the eighth light L8, but the present invention Not limited to this.

5C to 5D, after the aforementioned patterning step, patterned conductive layers 560a, 590b may be formed on the patterned photosensitive dielectric material layers 559a, 559b. The patterned conductive layers 560a and 590b can be formed by, for example, plating, photolithography and etching, but the invention is not limited thereto.

In this embodiment, the patterned photosensitive dielectric material layer 559a and the corresponding patterned conductive layer 560a may constitute the first conductive terminal 561, and the patterned photosensitive dielectric material layer 559b and the corresponding patterned conductive layer 560b may constitute the second conductive terminal 561. Conductive terminals 562 .

After the above steps, the light emitting diode 500 of the present embodiment can be generally formed.

Referring to FIG. 5D , the light emitting diode 500 may include the semiconductor element 110 , the first conductive terminal 561 and the second conductive terminal 562 . The first conductive terminal 561 may be located on the first type semiconductor layer 112 of the semiconductor element 110 , and the conductive layer 560 a of the first conductive terminal 561 is electrically connected to the first type semiconductor layer 112 . The second conductive terminal 562 may be located on the second type semiconductor layer 114 of the semiconductor element 110 , and the conductive layer 560 b of the second conductive terminal 562 is electrically connected to the second type semiconductor layer 114 .

The light emitting diode 500 has a bottom side 500a and a top side 500b opposite to the bottom side 500a. The first conductive terminal 561 has a third side surface S3 and a fifth side surface S5 opposite to the third side surface S3, wherein a third included angle θ3 is formed between the top surface 500b (or a virtual surface parallel thereto) and the third side surface S3 , and there is a fifth included angle θ5 between the top surface 500b (or a virtual surface parallel thereto) and the fifth side surface S5. The second conductive terminal 562 has a fourth side surface S4 and a sixth side surface S6 opposite to the fourth side surface S4, wherein a fourth included angle θ4 is formed between the top surface 500b (or a virtual surface parallel thereto) and the fourth side surface S4 , and there is a sixth angle θ6 between the top surface 500b (or a virtual surface parallel to it) and the sixth side surface S6 . The third included angle θ3 and the fourth included angle θ4 face the outside of the light-emitting diode 500 , and the fifth included angle θ5 and the sixth included angle θ6 face the inside of the light-emitting diode 500 .

The light emitting diode 500 of this embodiment may be the same as or similar to the light emitting diode 100 of the previous embodiment, except that the first conductive terminal 561 or the second conductive terminal 562 includes a dielectric layer (ie, a patterned photosensitive dielectric material layers 559a, 559b) and corresponding conductive layers (ie, patterned conductive layers 560a, 560b) overlying the dielectric layers.

FIG. 6 is a partial cross-sectional schematic diagram of a partial formation method of a light emitting diode according to a sixth embodiment of the present invention. The formation method of the light emitting diode (not shown or marked) of this embodiment is similar to that of the light emitting diode 500 of the fifth embodiment, and the similar components are denoted by the same reference numerals and have similar functions, material or forming method, and the description is omitted. For example, FIG. 6 may be a partial cross-sectional schematic diagram of a method of forming a light emitting diode following the steps of FIG. 5A .

Referring to FIGS. 5A and 6 , a patterning step may be performed on the photosensitive dielectric material layer 556 (shown in FIG. 5A ) to form a patterned photosensitive dielectric material layer 659 (shown in FIG. 6 ). The photoresist patterning steps of this embodiment are described as follows.

In this embodiment, the ninth mask M9 can be used as a mask, and a photolithography process can be performed on part of the photosensitive dielectric material layer with ninth light to remove part of the photosensitive dielectric material layer, so as to A patterned photosensitive dielectric material layer is formed.

In this embodiment, the ninth mask M9 may be a half-dimming mask or a gray-scale mask. For example, the ninth mask M9 has a first light-shielding region M9a and a second light-shielding region M9b, and the light-shielding ratio per unit area of the first light-shielding region M9a may be greater than the light-shielding ratio per unit area of the second light-shielding region M9b. For another example, the first light shielding region M9a can completely shield the ninth light ray L9, and the second light shielding region M9b can shield a part of the ninth light ray L9 and allow another part of the ninth light ray L9 to penetrate.

Referring to FIGS. 6 and 5D, similar to the manner in which the patterned conductive layers 560a and 590b are formed on the patterned photosensitive dielectric material layer 559, after the patterned photosensitive dielectric material layer 659 (shown in FIG. 5D) is formed, Patterned conductive layers 560a , 590b may be formed on the patterned photosensitive dielectric material layer 659 . After that, the same or similar steps as shown in FIG. 5D can be used to form the first conductive terminal 561 or the second conductive terminal 562 of the light emitting diode.

After the above steps, the light emitting diode (not shown or marked) of the present embodiment can be generally formed. The light-emitting diodes (not shown or labeled) of this embodiment may be the same or similar to the light-emitting diodes 500 of the foregoing embodiments, and thus will not be repeatedly described or shown here.

7A to 7B are partial cross-sectional schematic views of a partial formation method of a substrate according to a seventh embodiment of the present invention.

Referring to FIG. 7A, a substrate structure 770 is provided. The substrate structure 770 may include a carrier board 771 and an element layer 772, but the present invention is not limited thereto. The material of the carrier plate 771 can be glass, quartz, organic polymer or other suitable materials, but the invention is not limited thereto. The component layer 772 may include conductive lines and/or other electronic components (eg, thin film transistors and other similar active components, capacitors and other similar passive components, or other suitable electronic components).

Please continue to refer to FIG. 7A , a first conductive pad 781 and a second conductive pad 782 are formed on the bottom surface 770 a (ie, a surface) of the substrate structure 770 . In this embodiment, the surface on which the element layer 772 (if any) is located may be referred to as the bottom surface 770a.

In this embodiment, the first conductive pads 781 or the second conductive pads 782 can be electrically connected to corresponding conductive lines and/or other electronic components in the device layer 772 . The first conductive pad 781 or the second conductive pad 782 can be formed by, for example, plating, photolithography and etching, but the invention is not limited thereto.

Please continue to refer to FIG. 7A to FIG. 7B , a first protruding structure 791 and a second protruding structure 792 are formed on the bottom surface 770a.

In one embodiment, the first protruding structure 791 or the second protruding structure 792 may be formed by patterning, but the invention is not limited thereto. For example, the first protruding structure 791 or the second protruding structure 792 can be formed in the same or similar manner as the patterned photosensitive dielectric material layer 559 or the patterned photosensitive dielectric material layer 659 in the foregoing embodiment, but the present invention Not limited to this.

In one embodiment, the first protruding structure 791 or the second protruding structure 792 may be a pre-formed structure directly placed on the bottom surface 770a, but the invention is not limited thereto.

In this embodiment, the first raised structures 791 may cover part of the first conductive pads 781 . That is, a portion of the first conductive pads 781 may be located between the first raised structures 791 and the substrate structure 770 . However, the present invention is not limited to this.

In this embodiment, the second raised structures 792 may cover part of the second conductive pads 782 . That is, a portion of the second conductive pads 782 may be located between the second raised structures 792 and the substrate structure 770 . However, the present invention is not limited to this.

After the above steps, the substrate 700 of the present embodiment can be generally formed.

Referring to FIG. 7B, the substrate 700 has a bottom surface 770a. The substrate 700 includes a first conductive pad 781 , a second conductive pad 782 , a first raised structure 791 and a second raised structure 792 . The first conductive pads 781 are located on the bottom surface 770 a of the substrate 700 . The second conductive pads 782 are located on the bottom surface 770 a of the substrate 700 . The first protruding structure 791 is located on the bottom surface 770a and has a first side surface S1, wherein there is a first included angle θ1 between the bottom surface 770a and the first side surface S1. The second protruding structure 792 is located on the bottom surface 770a and has a second side surface S2, wherein a second included angle θ2 is formed between the bottom surface 770a and the second side surface S2.

In this embodiment, the first protruding structure 791 or the second protruding structure 792 includes a bulk insulator. For example, the entire structure of the first protruding structure 791 or the second protruding structure 792 may be a bulk insulator.

8A to 8B are partial cross-sectional schematic views of a partial formation method of a substrate according to an eighth embodiment of the present invention. The formation method of the substrate 800 of the present embodiment is similar to that of the substrate 700 of the seventh embodiment.

Referring to FIG. 8A , a first protruding structure 891 and a second protruding structure 892 are formed on the bottom surface 770 a of the substrate structure 770 . The first protruding structure 891 or the second protruding structure 892 can be formed in the same manner as or similar to the first protruding structure 791 or the second protruding structure 792 in the foregoing embodiment, and thus will not be repeated here.

Referring to FIGS. 8A to 8B , a first conductive pad 881 and a second conductive pad 882 are formed on the bottom surface 770 a of the substrate structure 770 . The first conductive pads 881 or the second conductive pads 882 can be formed in the same or similar manner as the first conductive pads 781 or the second conductive pads 782 in the foregoing embodiments, and thus will not be repeated here.

In this embodiment, the first conductive pads 881 may cover part of the first raised structures 891 . That is, a portion of the first raised structure 891 may be located between the first conductive pad 881 and the substrate structure 770 . However, the present invention is not limited to this.

In this embodiment, the second conductive pads 882 may cover part of the second raised structures 892 . That is, a portion of the second raised structure 892 may be located between the second conductive pad 882 and the substrate structure 770 . However, the present invention is not limited to this.

After the above steps, the substrate 800 of the present embodiment can be generally formed.

Referring to FIG. 8B, the substrate 800 has a bottom surface 770a. The substrate 800 includes a first conductive pad 881 , a second conductive pad 882 , a first raised structure 891 and a second raised structure 892 . The first conductive pads 881 are located on the bottom surface 770 a of the substrate 700 . The second conductive pads 882 are located on the bottom surface 770 a of the substrate 700 . The first protruding structure 891 is located on the bottom surface 770a and has a first side surface S1, wherein there is a first included angle θ1 between the bottom surface 770a and the first side surface S1. The second protruding structure 892 is located on the bottom surface 770a and has a second side surface S2, wherein there is a second included angle θ2 between the bottom surface 770a and the second side surface S2.

In this embodiment, a portion of the first conductive pad 881 covering the first side surface S1 may be referred to as a one-side conductive pad. In one embodiment, a part of the first conductive pad 881 covering the first side S1 may cover part of the first side S1, but the invention is not limited thereto.

In this embodiment, a portion of the second conductive pad 882 covering the second side S2 may be referred to as the other-side conductive pad. In one embodiment, a portion of the second conductive pad 882 covering the second side S2 may cover a portion of the second side S2, but the invention is not limited thereto.

9A to 9B are partial cross-sectional schematic views of a part of a manufacturing method of a display device according to a ninth embodiment of the present invention.

Referring to FIG. 9A , a substrate 700 and a light emitting diode 100 are provided.

It should be noted that, in this embodiment, the provided light-emitting diode 100 is the light-emitting diode 100 of the foregoing embodiment as an example, but the present invention is not limited thereto. In other not-shown embodiments, the provided light-emitting diode may be a light-emitting diode similar to the light-emitting diode 100 (eg, the light-emitting diode 500 ).

Referring to FIGS. 9A to 9B , the light emitting diode 100 is placed on the substrate 700 with the first conductive terminal 161 and the second conductive terminal 162 of the light emitting diode 100 facing the substrate 700 . In addition, the first conductive terminal 161 of the light-emitting diode 100 is electrically connected to the first conductive pad 781 of the substrate 700 , and the second conductive terminal 162 of the light-emitting diode 100 is electrically connected to the second conductive pad 700 of the substrate 700 . Conductive pads 782 .

In this embodiment, the first conductive terminals 161 may directly contact the first conductive pads 781 , and/or the second conductive terminals 162 may directly contact the second conductive pads 782 , but the invention is not limited thereto.

In one embodiment, the first conductive terminal 161 may indirectly contact the first conductive pad 781 , and/or the second conductive terminal 162 may directly contact the second conductive pad 782 . For example, a conductive adhesive material may be provided between the first conductive terminal 161 and the first conductive pad 781 , and/or a conductive adhesive material may be provided between the second conductive terminal 162 and the second conductive pad 782 . The conductive adhesive material may include solder or conductive glue, but the present invention is not limited thereto.

After the above steps, the display device 900 of the present embodiment can be basically constituted. The display device 900 includes a substrate 700 and a light emitting diode 100 .

In the substrate 700, the second included angle θ2 is greater than the first included angle θ1. In the light emitting diode 100, the fourth included angle θ4 is greater than the third included angle θ3. Furthermore, the third angle θ3 of the light emitting diode 100 is greater than or approximately equal to the first angle θ1 of the substrate 700 , and the fourth angle θ4 of the light emitting diode 100 is greater than or approximately equal to the second angle θ2 of the substrate 700 . In this way, when the light emitting diode 100 is placed on the substrate 700, the electrode anisotropy may be reduced (eg, the first conductive terminal 161 is misconnected to the second conductive pad 782, and/or the second conductive terminal is 162 is misconnected to the first conductive pad 781), landing shift/landing offset, wafer rotation, and/or other process defects that are the same or similar to the above; or, when placing the light-emitting diode 100 When the substrate 700 is used, the accuracy of self-alignment is improved. Therefore, better electrical connection can be provided between the first conductive terminal 161 and the first conductive pad 781 and/or between the second conductive terminal 162 and the second conductive pad 782 . In turn, the quality of the display device 900 can be improved.

In this embodiment, the difference between the fourth angle θ4 and the third angle θ3 is greater than or approximately equal to 15∘ (ie, θ4−θ3 ≧ 15∘). In this way, the possibility of process defects (such as electrode anomaly, landing offset and/or wafer rotation) can be further reduced; or, the accuracy of self-alignment can be further improved.

In this embodiment, the difference between the third angle θ3 and the first angle θ1 is less than or approximately equal to 15∘ and greater than or approximately equal to 0∘ (ie, 15∘≧θ3-θ1≧0∘), and the fourth angle θ4 The difference from the second included angle θ2 is less than or approximately equal to 15∘ and greater than or approximately equal to 0∘ (ie, 15∘≧θ4−θ2≧0∘). In this way, the light emitting diode 100 can be easily placed on the substrate 700 . Also, process defects can still be reduced and/or good self-alignment accuracy can still be achieved.

In this embodiment, the volume of the second conductive terminal 162 may be larger than that of the first conductive terminal 161 . For example, the height 162H of the second conductive terminal 162 may be greater than the height 161H of the first conductive terminal 161 , and/or the surface area of the top surface 162T of the second conductive terminal 162 may be greater than the surface area of the top surface 161T of the first conductive terminal 161 . In this way, when the light-emitting diode 100 is placed on the substrate 700 , it may be possible to make the light-emitting diode 100 on the opposite sides (ie, the two sides where the first conductive terminal 161 and the second conductive terminal 162 are respectively located). There is not much difference in weight, and the process of placing the light emitting diode 100 can be made easier.

In this embodiment, the height 161H of the first conductive terminal 161 or the height 162H of the second conductive terminal 162 may be greater than or approximately equal to 2 micrometers (µm). In this way, the taper of the first conductive terminal 161 or the second conductive terminal 162 can be more obvious, which can reduce process defects or have good self-alignment accuracy.

In a not-shown embodiment, the height 161H of the first conductive terminal 161 and/or the height 162H of the second conductive terminal 162 may be greater than or approximately equal to the thickness of the first protrusion structure (eg, similar to the thickness of the first protrusion) The thickness 791H) of the structure 791 and/or the thickness of the second raised structure (eg, similar to the thickness 792H of the second raised structure 792). In this way, the influence of the first protruding structure or the second protruding structure on the light-emitting body of the light-emitting diode (eg, the aforementioned semiconductor element 110 ) may be reduced.

10 is a schematic partial cross-sectional view of a display device according to a tenth embodiment of the present invention. The display device 1000 of this embodiment is similar to the display device 900 of the ninth embodiment, and similar components are denoted by the same reference numerals, and have similar functions, materials, forming methods or manufacturing methods, and descriptions thereof are omitted. In addition, the manufacturing method of the display device 1000 of the present embodiment is similar to the manufacturing method of the display device 900 of the previous embodiment, and thus will not be repeated here.

Referring to FIG. 10 , the display device includes a substrate 800 and a light emitting diode 100 . The first conductive terminal 161 of the light-emitting diode 100 is electrically connected to the first conductive pad 881 of the substrate 800 , and the second conductive terminal 162 of the light-emitting diode 100 is electrically connected to the second conductive pad of the substrate 800 882. It should be noted that, in this embodiment, the provided light-emitting diode 100 is the light-emitting diode 100 of the foregoing embodiment as an example, but the present invention is not limited thereto. In other not-shown embodiments, the provided light-emitting diode may be a light-emitting diode similar to the light-emitting diode 100 (eg, the light-emitting diode 500).

In the display device of the embodiment of the present invention, the first conductive terminal (eg, the first conductive terminal 161 , the first conductive terminal 561 , the first conductive terminal of the following embodiments or other similar first conductive terminals) is vertically projected on the substrate (eg: substrate 700, substrate 800, or other similar substrates) may have a different geometry or size than the second conductive terminal (eg: second conductive terminal 162, second conductive terminal 562, second conductive terminal in the following embodiments, or Other similar second conductive terminals) are vertically projected on the geometric shape or size of the substrate (eg, the substrate 700 , the substrate 800 or other similar substrates). In this way, in the process of bonding the light-emitting diode to the substrate, the possibility of process defects (such as electrode anisotropy, landing offset and/or wafer rotation) can be further reduced; or, the self-alignment can be improved. Accuracy.

In the embodiments to be described later, the provided substrate 700 is the substrate 700 of the foregoing embodiment as an example, but the present invention is not limited thereto. In other not-shown embodiments, the provided substrate may be a substrate similar to the substrate 700 (eg, the substrate 800).

For example, in the display device 1100 of FIG. 11 , the geometric shape of the first conductive terminal 1161 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 1162 projected vertically on the substrate 700 , and the first conductive terminal 1161 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1162 vertically projected on the substrate 700 .

For example, in the display device 1200 of FIG. 12 , the geometric shape of the first conductive terminal 1261 projected vertically on the substrate 700 is different from the geometric shape of the second conductive terminal 1262 projected vertically on the substrate 700 , and the first conductive terminal 1261 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1262 vertically projected on the substrate 700 .

For example, in the display device 1300 of FIG. 13 , the geometric shape of the first conductive terminal 1361 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 1362 projected vertically on the substrate 700 , and the first conductive terminal 1361 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1362 vertically projected on the substrate 700 .

For example, in the display device 1400 of FIG. 14 , the geometric shape of the first conductive terminal 1461 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 1462 projected vertically on the substrate 700 , and the first conductive terminal 1461 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1462 vertically projected on the substrate 700 .

For example, in the display device 1500 of FIG. 15 , the geometric shape of the first conductive terminal 1561 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 1562 projected vertically on the substrate 700 , and the first conductive terminal 1561 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1562 vertically projected on the substrate 700 .

For example, in the display device 1600 of FIG. 16 , the geometric shape of the first conductive terminal 1661 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 162 projected vertically on the substrate 700 , and the first conductive terminal 1661 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1662 vertically projected on the substrate 700 .

For example, in the display device 1700 of FIG. 17 , the geometric shape of the first conductive terminal 1761 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 162 projected vertically on the substrate 700 , and the first conductive terminal 1761 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1762 vertically projected on the substrate 700 .

For example, in the display device 1800 of FIG. 18 , the geometric shape of the first conductive terminal 1861 projected vertically on the substrate 700 is similar to the geometric shape of the second conductive terminal 162 projected vertically on the substrate 700 , and the first conductive terminal 1861 The projected size of the vertical projection on the substrate 700 is different from the projected size of the second conductive terminal 1862 vertically projected on the substrate 700 .

In conclusion, the display device and the manufacturing method thereof of the present invention can improve the quality of the display device.

100, 500: light-emitting diode 700, 800: substrate 900, 1000, 1100, 1200, 1300, 1400, 1500, 1600, 1700, 1800: Display device 110a, 500a: Bottom side 110b, 500b: top surface 110: Semiconductor Components 111: The first electrode 112: first type semiconductor layer 113: Luminous area 114: The second type semiconductor layer 115: Second electrode 116: Insulation layer 129, 329, 329a, 329b: conductive material layer 136, 137: positive photoresist layer 138: Patterned positive photoresist layer 138c: First side wall 138d: Second side wall 346, 347, 348: negative photoresist layer 349, 449: Patterned negative photoresist layer 556: Photosensitive Dielectric Material Layer 559, 559a, 559b, 659: Patterned photosensitive dielectric material layers 559c: First side wall 559d: Second side wall 560a, 560b: patterned conductive layers M1: first mask L1: first ray M2: Second mask L2: second ray M3: Third mask M3a: first shading area M3b: Second shading area L3: third ray M4: Fourth mask L4: Fourth Ray M5: Fifth mask L5: Fifth Ray M6: Sixth mask M6a: first shading area M6b: Second shading area M7: Seventh mask L7: Seventh Ray M8: Eighth mask L8: Eighth Ray M9: ninth mask M9a: first shading area M9b: Second shading area L9: Ninth Ray 161, 561, 1161, 1261, 1361, 1461, 1561, 1661, 1761, 1861: the first conductive terminal S3: third side θ3: the third angle S5: Fifth side θ5: Fifth included angle 161H: height 161T: Top surface 162, 562, 1162, 1262, 1362, 1462, 1562, 1662, 1762, 1862: the second conductive terminal S4: Fourth side θ4: Fourth included angle S6: Sixth side θ6: sixth angle 162H: height 162T: Top surface 770: Substrate structure 771: Carrier Board 770a: Underside 772: Component layer 781, 881: The first conductive pad 782, 881: Second conductive pad 791, 891: The first raised structure 791H: Thickness 792, 892: The second raised structure 792H: Thickness S1: first side S2: Second side θ1: The first included angle θ2: Second included angle

1A to FIG. 1E are partial cross-sectional schematic views of a partial formation method of a light emitting diode according to the first embodiment of the present invention. FIG. 2 is a partial cross-sectional schematic diagram of a partial formation method of a light emitting diode according to a second embodiment of the present invention. 3A to 3D are partial cross-sectional schematic views of a partial formation method of a light emitting diode according to a third embodiment of the present invention. FIG. 4 is a partial cross-sectional schematic diagram of a partial formation method of a light emitting diode according to a fourth embodiment of the present invention. 5A to 5D are partial cross-sectional schematic views of a partial formation method of a light emitting diode according to a fifth embodiment of the present invention. FIG. 6 is a partial cross-sectional schematic diagram of a partial formation method of a light emitting diode according to a sixth embodiment of the present invention. 7A to 7B are partial cross-sectional schematic views of a partial formation method of a substrate according to a seventh embodiment of the present invention. 8A to 8B are partial cross-sectional schematic views of a partial formation method of a substrate according to an eighth embodiment of the present invention. 9A to 9B are partial cross-sectional schematic views of a part of a manufacturing method of a display device according to a ninth embodiment of the present invention. 10 is a schematic partial cross-sectional view of a display device according to a tenth embodiment of the present invention. FIG. 11 is a schematic partial top view of a display device according to an eleventh embodiment of the present invention. FIG. 12 is a schematic partial top view of a display device according to a twelfth embodiment of the present invention. FIG. 13 is a schematic partial top view of a display device according to a thirteenth embodiment of the present invention. FIG. 14 is a schematic partial top view of a display device according to a fourteenth embodiment of the present invention. FIG. 15 is a schematic partial top view of a display device according to a fifteenth embodiment of the present invention. FIG. 16 is a schematic partial top view of a display device according to a sixteenth embodiment of the present invention. FIG. 17 is a schematic partial top view of a display device according to a seventeenth embodiment of the present invention. FIG. 18 is a schematic partial top view of a display device according to an eighteenth embodiment of the present invention.

900: Display device

100: Light Emitting Diode

700: Substrate

110a: Bottom side

110b: Top surface

110: Semiconductor Components

161: The first conductive terminal

θ3: the third angle

162: Second conductive terminal

θ4: Fourth included angle

770: Substrate structure

771: Carrier Board

770a: Underside

772: Component layer

781: First conductive pad

782: Second conductive pad

791: The first raised structure

792: Second raised structure

θ1: The first included angle

θ2: Second included angle

Claims (18)

A display device, comprising: A substrate having a bottom surface, and the substrate includes: a first conductive pad, located on the bottom surface of the substrate; a second conductive pad, located on the bottom surface of the substrate; a first protruding structure located on the bottom surface and having a first side surface, wherein a first included angle is formed between the bottom surface and the first side surface; and a second protruding structure located on the bottom surface and having a second side surface, wherein a second included angle is formed between the bottom surface and the second side surface; and A light emitting diode having a bottom side adjacent to the substrate and a top surface opposite to the bottom side, and the light emitting diode includes: a first conductive terminal electrically connected to the first conductive pad and having a third side surface, wherein a third included angle is formed between the top surface and the third side surface; and The second conductive terminal is electrically connected to the second conductive pad and has a fourth side surface, wherein a fourth angle is formed between the top surface and the fourth side surface, wherein: the fourth included angle is greater than the third included angle; the second included angle is greater than the first included angle; the third included angle is greater than or equal to the first included angle; and The fourth included angle is greater than or equal to the second included angle. The display device according to claim 1, wherein a difference between the fourth included angle and the third included angle is greater than or equal to 15∘. The display device of claim 1, wherein: The difference between the third included angle and the first included angle is less than or equal to 15∘ and greater than or equal to 0∘; and The difference between the fourth included angle and the second included angle is less than or equal to 15∘ and greater than or equal to 0∘. The display device of claim 1, wherein the second conductive terminal is larger than the first conductive terminal. The display device of claim 1, wherein the second conductive terminal is electrically connected to the second-type semiconductor layer of the light-emitting diode, and the first conductive terminal is electrically connected to the light-emitting diode the first type semiconductor layer. The display device of claim 1, wherein the first conductive terminal further has a fifth side surface opposite to the third side surface, wherein a fifth included angle is formed between the top surface and the fifth side surface, and The angle of the fifth included angle is different from the angle of the third included angle. The display device according to claim 1, wherein the second conductive terminal further has a sixth side surface opposite to the fourth side surface, wherein a sixth included angle is formed between the top surface and the sixth side surface, and The angle of the sixth included angle is different from the angle of the fourth included angle. The display device of claim 1, wherein the first conductive terminal or the second conductive terminal comprises a bulk conductor. The display device of claim 1, wherein the first conductive terminal or the second conductive terminal comprises a dielectric layer and a conductive layer covering the dielectric layer. The display device according to claim 1, further comprising: At least one side of the conductive pad covers the first side surface of the first protrusion or the second side surface of the second protrusion. The display device of claim 1, wherein a height of the first conductive terminal or the second conductive terminal is greater than or equal to 2 microns. The display device of claim 1, wherein the geometric shape or size of the first conductive terminal projected vertically on the substrate is different from the geometric shape or size of the second conductive terminal projected vertically on the substrate. A method of manufacturing a display device, comprising: A substrate is provided, having a bottom surface, and the substrate includes: a first conductive pad, located on the bottom surface of the substrate; a second conductive pad, located on the bottom surface of the substrate; a first protruding structure located on the bottom surface and having a first side surface, wherein a first included angle is formed between the bottom surface and the first side surface; and a second protruding structure located on the bottom surface and having a second side surface, wherein a second included angle is formed between the bottom surface and the second side surface; A light emitting diode is provided having a bottom side and a top surface opposite the bottom side, and the light emitting diode includes: a first conductive terminal having a third side surface, wherein a third included angle is formed between the top surface and the third side surface; and a second conductive terminal having a fourth side surface, wherein a fourth included angle is formed between the top surface and the fourth side surface; and The first conductive terminal and the second conductive terminal of the light-emitting diode are electrically connected to the first conductive terminal in such a manner that the first conductive terminal and the second conductive terminal face the substrate The conductive pad and the second conductive pad, wherein: the fourth included angle is greater than the third included angle; the second included angle is greater than the first included angle; the third included angle is greater than or equal to the first included angle; and The fourth included angle is greater than or equal to the second included angle. The manufacturing method of the display device according to claim 13, wherein the formation method of the light-emitting diode comprises: provide semiconductor components; forming a conductive material layer on the semiconductor element; forming a positive photoresist material layer on the conductive material layer; performing a patterning step on the positive photoresist layer to form a patterned positive photoresist layer; and A portion of the conductive material layer is removed by the patterned positive photoresist material layer to form the first conductive terminal and the second conductive terminal. The manufacturing method of the display device according to claim 13, wherein the formation method of the light-emitting diode comprises: provide semiconductor components; forming a negative photoresist material layer on the semiconductor element; performing a patterning step on the negative photoresist material layer to form a patterned negative photoresist material layer; forming a conductive material layer on the semiconductor element, and part of the conductive material layer covers the patterned negative photoresist material layer; and Part of the conductive material layer covering the patterned negative photoresist material layer is removed to form the first conductive terminal and the second conductive terminal. The manufacturing method of the display device according to claim 13, wherein the formation method of the light-emitting diode comprises: provide semiconductor components; forming an insulating material layer on the semiconductor element; performing a patterning step on all of the layers of insulating material to form a dielectric layer; and A conductive layer is formed on the dielectric layer to form the first conductive terminal or the second conductive terminal including the dielectric layer and the conductive layer. The method for manufacturing a display device according to any one of claims 14 to 16, wherein the patterning step comprises: performing a first exposure step under a first light by a first mask; and A second exposure step is performed under a second light through a second mask, wherein the pattern of the first mask is different from the pattern of the second mask, and/or the exposure amount of the first exposure step is different exposure amount in the second exposure step. The method for manufacturing a display device according to any one of claims 14 to 16, wherein the patterning step comprises: The exposure step is performed under a third light by a third mask, wherein the third mask has a first light-shielding area and a second light-shielding area, and the light-shielding rate per unit area of the first light-shielding area is different from that of the first light-shielding area. The shading rate per unit area of the second shading area.

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