CN107689383B

CN107689383B - Display device and method for manufacturing the same

Info

Publication number: CN107689383B
Application number: CN201710159698.5A
Authority: CN
Inventors: 李冠锋; 洪挺凯; 吴昱娴; 张嘉雄
Original assignee: Innolux Display Corp
Current assignee: Innolux Corp
Priority date: 2016-08-05
Filing date: 2017-03-17
Publication date: 2021-06-22
Anticipated expiration: 2037-03-17
Also published as: CN107689383A

Abstract

The invention provides a display device and a manufacturing method thereof. The transistor is arranged on the substrate. The metal layer is disposed on the transistor and electrically connected to the transistor, wherein a first distance is formed between an upper surface of the metal layer and the substrate in a direction perpendicular to the substrate. The light emitting diode is arranged on the metal layer, wherein the light emitting diode comprises a light emitting diode main body and an electrode, the light emitting diode main body is electrically connected with the metal layer through the electrode, the light emitting diode main body is provided with a first surface and a second surface opposite to the first surface, the first surface and the second surface are parallel to the substrate, in the direction, a second distance is arranged between the first surface and the second surface, and the ratio of the second distance to the first distance is more than or equal to 0.25 and less than or equal to 6.

Description

Display device and method for manufacturing the same

Technical Field

The present invention relates to a display device and a method of manufacturing the same, and more particularly, to a display device and a method of manufacturing the same.

Background

Light Emitting Diode (LED) display devices have advantages of active light emission, high brightness, high contrast, and low power consumption, and thus have become one of the technologies for the rapid development of new displays in recent years. To meet the requirement of high resolution, the led display device is being developed to include an active device array substrate and micron-sized leds arranged in an array.

Disclosure of Invention

The present invention provides a display device which can have good luminous efficiency or good structural strength.

The invention provides a method for manufacturing a display device, which can manufacture a display device with good luminous efficiency.

The display device comprises a substrate, a transistor, a metal layer and a light emitting diode. The transistor is arranged on the substrate. The metal layer is disposed on the transistor and electrically connected to the transistor, wherein a first distance is formed between an upper surface of the metal layer and the substrate in a direction perpendicular to the substrate. The light emitting diode is arranged on the metal layer, wherein the light emitting diode comprises a light emitting diode main body and an electrode, the light emitting diode main body is electrically connected with the metal layer through the electrode, the light emitting diode main body is provided with a first surface and a second surface opposite to the first surface, the first surface and the second surface are parallel to the substrate, in the direction, a second distance is arranged between the first surface and the second surface, and the ratio of the second distance to the first distance is more than or equal to 0.25 and less than or equal to 6.

The method for manufacturing a display device of the present invention includes the following steps. A light emitting diode body is formed on a substrate. A reflective structure is formed on the sidewalls of the light emitting diode body.

In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 is a schematic cross-sectional view of a display device according to an embodiment of the present invention.

Fig. 2 is a schematic cross-sectional view of a display device according to another embodiment of the present invention.

Fig. 3 is a schematic cross-sectional view of a light emitting diode according to another embodiment of the present invention.

Fig. 4 is a schematic cross-sectional view of a light emitting diode according to another embodiment of the present invention.

Fig. 5A to 5M are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention.

Fig. 6A to 6B are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention.

Fig. 7A to 7C are cross-sectional views illustrating a method of manufacturing a display device according to another embodiment of the present invention.

Fig. 8A to 8J are cross-sectional flow diagrams illustrating a method of manufacturing a display device according to another embodiment of the present invention.

Fig. 9A to 9E are cross-sectional views illustrating a method of manufacturing a display device according to another embodiment of the present invention.

Fig. 10A to 10E are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention.

Fig. 11A to 11G are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention.

Description of the reference numerals

10. 20, 70: display device

100. 142, 500, 800: substrate

110: metal layer

110 a: a first metal layer

110 b: second metal layer

120. 220, 320, 420, 529, 730, 827, 928, 1027, 1127: light emitting diode

122a, 222a, 515, 816, 1116: semiconductor layer of first conductivity type

122b, 222b, 517, 818, 1118: semiconductor layer of second conductivity type

124. 224, 516, 817, 1117: active layer

126a, 126b, 226a, 226b, 525, 528, 728, 813, 820, 927, 1023, 1120: electrode for electrochemical cell

130: conductive adhesive layer

140. 729: opposite substrate

144: adhesive layer

250: electrode pattern

360. 460: buffer layer

510. 810: layer of semiconductor material of a first conductivity type

511. 811: bulk material layer

512. 812: layer of semiconductor material of the second conductivity type

513. 520, 620, 814, 1021, 1122: patterned photoresist layer

514. 815: patterned photoresist layer with heated flow

519a, 519b, 619a, 619 b: material layer

521: reflective metal layer

523. 623, 824, 924, 1025, 1125: reflection structure

524. 1024, 1124: conductive layer

526. 826, 926, 1026, 1126: bearing substrate

527. 727, 825, 925: bonding layer

530: gripping device

726: array substrate

821a, 821b, 1020, 1121: layer of insulating material

822. 922: patterning organic layers

A1, a2, 2a2, La, Lb: distance between two adjacent plates

BK: light-shielding pattern layer

CF: color filter layer

CH: channel region

D: direction of rotation

G: grid electrode

GI: gate insulating layer

IL1, IL2, IL3, IL4, 522, 621, 622, 823a, 823b, 923a, 923b, 1022, 1123: insulating layer

LB, 2LB, 518, 819, 1119: light emitting diode body

M, 3M: groove

O, P, Q, R, U: opening of the container

PL: planarization layer

S1, S2, 2S1, 2S 2: surface of

S3, S4: the top surface

S/D: source/drain region

SC: semiconductor layer

T: transistor with a metal gate electrode

TS: upper surface of

Va, Vb: contact window opening

WT: wavelength conversion layer

θ: angle of rotation

Detailed Description

Wherever possible, the same reference numbers will be used throughout the drawings and the description to refer to the same or like parts.

In this document, the description of forming another structure over or on a structure may include embodiments in which the structure and the another structure are formed in direct contact, and may also include embodiments in which additional structures may be formed between the structure and the another structure such that the structure and the another structure may not be in direct contact.

The display device of the present invention will be described in detail below with reference to various embodiments, which are examples of the present invention and are not intended to limit the present invention.

Fig. 1 is a schematic cross-sectional view of a display device according to an embodiment of the present invention. For convenience of explanation, only one pixel unit is shown in fig. 1, however, it should be understood by those skilled in the art that the display device generally includes a plurality of pixel units arranged in an array.

Referring to fig. 1, in the present embodiment, a display device 10 includes a substrate 100, a transistor T, a metal layer 110, and a light emitting diode 120. In addition, in this embodiment mode, the display device 10 may further include an insulating layer IL1, a gate insulating layer GI, an insulating layer IL2, an insulating layer IL3, a planarization layer PL, a conductive adhesive layer 130, an insulating layer IL4, and an opposing substrate 140.

The material of the substrate 100 may be glass, quartz, organic polymer, or metal material, wherein the organic polymer is, for example (but not limited to): polyimide (PI), polyethylene terephthalate (PET), Polycarbonate (PC), and the like.

The transistor T is disposed on the substrate 100. In this embodiment, the transistor T includes a semiconductor layer SC and a gate electrode G over the semiconductor layer SC. In detail, the semiconductor layer SC includes a channel region CH and source/drain regions S/D, wherein the gate G is located above the channel region CH, and the source/drain regions S/D are located at two sides of the channel region CH. In this embodiment, the material of the semiconductor layer SC is low temperature polysilicon, that is, the transistor T is a low temperature polysilicon thin film transistor. In addition, the gate electrode G is typically made of a metal material, such as aluminum, molybdenum, titanium, gold, indium, tin, or a combination thereof, for example, in consideration of conductivity. However, the present invention is not limited thereto, and in other embodiments, for example (but not limited to): an alloy, a nitride of a metal material, an oxide of a metal material, an oxynitride of a metal material, or the like, or a stacked layer of a metal material and the aforementioned other conductive materials.

In addition, a gate insulating layer GI is disposed between the gate electrode G and the semiconductor layer SC, wherein the gate insulating layer GI is conformally (conformally) formed on the substrate 100 and covers the semiconductor layer SC. The material of the gate insulating layer GI may be (but is not limited to): inorganic materials, organic materials, or combinations thereof, wherein the inorganic materials are, for example (but not limited to): a stacked layer of silicon oxide, silicon nitride, silicon oxynitride, or at least two of the above materials; organic materials are for example (but not limited to): polyimide resin, epoxy resin, acrylic resin, or the like.

In addition, an insulating layer IL1 is disposed between the substrate 100 and the semiconductor layer SC, wherein the insulating layer IL1 is conformally formed on the substrate 100. The insulating layer IL1 may be made of (but not limited to): silicon oxide, silicon nitride, silicon oxynitride, or a stack of at least two of the foregoing materials.

In addition, the gate G is covered with insulating layers IL2 and IL3 to protect the gate G. The insulating layer IL3 is located on the insulating layer IL2, and the insulating layers IL2 and IL3 are conformally formed on the substrate 100. The insulating layers IL2 and IL3 may be made of (but not limited to): inorganic materials, organic materials, or combinations thereof, wherein the inorganic materials are, for example (but not limited to): a stacked layer of silicon oxide, silicon nitride, silicon oxynitride, or at least two of the above materials; organic materials are for example (but not limited to): polyimide resin, epoxy resin, acrylic resin, or the like.

The metal layer 110 is disposed on the transistor T and electrically connected to the transistor T. In detail, in the present embodiment, the metal layer 110 includes a first metal layer 110a and a second metal layer 110b located above the first metal layer 110 a. That is, in the present embodiment, the metal layer 110 includes two film layers stacked one on another. However, the present invention is not limited thereto. In other embodiments, the metal layer 110 may include only a single film layer. For example, the metal layer 110 may include only the first metal layer 110a as a source/drain electrode, and not the second metal layer 110 b.

In the present embodiment, the distance a1 is provided between the upper surface TS of the metal layer 110 and the substrate 100 in the direction D perpendicular to the substrate 100. In one embodiment, the distance a1 may be greater than or equal to 2um and less than or equal to 8 um. In another embodiment, the distance a1 may be greater than or equal to 2um and less than or equal to 5 um. In another embodiment, the distance a1 may be greater than or equal to 3um and less than or equal to 8 um. In another embodiment, the distance a1 may be greater than or equal to 4um and less than or equal to 8 um. Particularly, since the metal layer 110 includes the first metal layer 110a and the second metal layer 110b, the upper surface TS is the top surface of the second metal layer 110 b. In addition, as described above, since the metal layer 110 may only include the first metal layer 110a, the upper surface TS is the top surface of the first metal layer 110 a.

The first metal layer 110a is electrically connected to the source/drain regions S/D through the contact openings Va formed in the gate insulating layer GI, the insulating layer IL2, and the insulating layer IL 3. That is, in the present embodiment, the first metal layer 110a functions as a source/drain electrode. In addition, the material of the first metal layer 110a includes (but is not limited to): aluminum, molybdenum, titanium, gold, indium, tin, or combinations thereof.

In addition, a planarization layer PL is further covered on the first metal layer 110a to improve the planarization. The material of the planarization layer PL may be (but is not limited to): inorganic materials, organic materials, or combinations thereof, wherein the inorganic materials are, for example (but not limited to): a stacked layer of silicon oxide, silicon nitride, silicon oxynitride, or at least two of the above materials; organic materials are for example (but not limited to): polyimide resin, epoxy resin, acrylic resin, or the like.

The second metal layer 110b is electrically connected to the first metal layer 110a through a contact opening Vb formed in the planarization layer PL. The material of the second metal layer 110b includes (but is not limited to): aluminum, molybdenum, titanium, gold, indium, tin, or combinations thereof. In addition, in the present embodiment, the light emitting diode 120 is electrically connected to the first metal layer 110a serving as the source/drain electrode through the second metal layer 110 b. That is, in the present embodiment, the light emitting diode 120 is electrically connected to the second metal layer 110b, and the second metal layer 110b is used as a connection electrode.

The light emitting diode 120 is disposed on the metal layer 110. In this embodiment, the light emitting diode 120 includes a light emitting diode body LB and an electrode 126 a. In detail, in the present embodiment, the led body LB of the led 120 is electrically connected to the second metal layer 110b of the metal layer 110 through the electrode 126 a. However, similarly, since the metal layer 110 may only include the first metal layer 110a, the led body LB is electrically connected to the first metal layer 110a through the electrode 126 a. In addition, in this embodiment, the light emitting diode 120 further includes an electrode 126 b. In addition, in the present embodiment, the light emitting diode 120 is a vertical micro light emitting diode.

In this embodiment, the led body LB has a surface S1 and a surface S2 opposite to the surface S1, the surface S1 and the surface S2 are both parallel to the substrate 100, and a distance a2 is between the surface S1 and the surface S2 in the direction D. In one embodiment, the distance a2 may be greater than or equal to 2um and less than or equal to 12 um. In another embodiment, the distance a2 may be greater than or equal to 3um and less than or equal to 10 um. In another embodiment, the distance a2 may be greater than or equal to 4um and less than or equal to 8 um.

Specifically, in one embodiment, the ratio of the distance a2 to the distance a1 may be greater than or equal to 0.25 and less than or equal to 6. In another embodiment, the ratio of the distance a2 to the distance a1 may be greater than or equal to 0.6 and less than or equal to 5. In another embodiment, the ratio of the distance a2 to the distance a1 may be greater than or equal to 1 and less than or equal to 4. If the ratio of the distance a2 to the distance a1 is less than 0.25, the structural strength of the display device 10 may be weakened; if the ratio of the distance a2 to the distance a1 is greater than 6, the light emitting efficiency of the display device 10 or the heat dissipation efficiency thereof may be reduced.

In addition, in the present embodiment, in order to improve the light emitting efficiency of the display device 10, the surface S2 may have a plurality of grooves M, that is, the surface S2 has a height difference and is an uneven surface. Based on this, in the present embodiment, the distance a2 is actually a length from the highest of the surface S2 to the surface S1. Specifically, in the present embodiment, the depth of the trench M is about 0.25um to 1 um. However, the present invention is not limited thereto. In other embodiments, the surface S2 may also be a flat surface. For example, the surface S2 may not have the plurality of grooves M, and the distance a2 may be directly measured from the surface S2 to the surface S1. For another example, the surface S2 may have grooves M with a depth less than 0.2um, and the distance a2 is from the highest of the surfaces S2 to the length of the surface S1.

In this embodiment, the light emitting diode body LB includes a first conductive type semiconductor layer 122a, an active layer 124, and a second conductive type semiconductor layer 122 b. The active layer 124 is disposed on the first conductive type semiconductor layer 122 a. The second conductive type semiconductor layer 122b is disposed on the active layer 124. The material of the first conductive type semiconductor layer 122a is, for example (but not limited to): GaN doped with dopants of the first conductivity type or other suitable material, such as GaN doped with magnesium. The material of the active layer 124 is, for example (but not limited to): the material of the multiple quantum well is, for example, InGaN/GaN or other suitable material. The material of the second conductive type semiconductor layer 122b is, for example (but not limited to): GaN doped with a second conductivity type dopant or other suitable material, such as GaN doped with silicon. In this embodiment, the first conductive type semiconductor layer 122a is, for example, a P-type semiconductor layer, the second conductive type semiconductor layer 122b is, for example, an N-type semiconductor layer, and based on this, the electrode 126a in contact with the first conductive type semiconductor layer 122a is, for example, a P-type electrode, and the electrode 126b in contact with the second conductive type semiconductor layer 122b is, for example, an N-type electrode. However, the present invention is not limited thereto. In another embodiment, the first conductive type semiconductor layer 122a is, for example, an N-type semiconductor layer, the second conductive type semiconductor layer 122b is, for example, a P-type semiconductor layer, and based on this, the electrode 126a in contact with the first conductive type semiconductor layer 122a is, for example, an N-type electrode, and the electrode 126b in contact with the second conductive type semiconductor layer 122b is, for example, a P-type electrode.

In particular, in the present embodiment, the surface S1 is the bottom surface of the first conductive type semiconductor layer 122a, and the surface S2 is the top surface of the second conductive type semiconductor layer 122 b. That is, in the present embodiment, the distance a2 is a length between the bottom surface of the first conductive type semiconductor layer 122a and the top surface of the second conductive type semiconductor layer 122 b. In addition, as described above, in order to improve the light emitting efficiency of the display device 10, the surface S2 of the light emitting diode body LB may have a plurality of grooves M, and thus the second conductive type semiconductor layer 122b has a plurality of grooves M in this embodiment.

In the present embodiment, the conductive adhesive layer 130 is used to electrically connect the electrode 126a of the light emitting diode 120 and the second metal layer 110b of the metal layer 110. The material of the conductive adhesive layer 130 is, for example (but not limited to): anisotropic Conductive Adhesive (ACA for short). The Anisotropic Conductive Film includes two types, i.e., Anisotropic Conductive Paste (ACP) and Anisotropic Conductive Film (ACF), which are distinguished according to the storage appearance. However, the invention is not limited thereto, and any person skilled in the art can electrically connect the electrode 126a of the led 120 and the second metal layer 110b of the metal layer 110 by any conventional bonding method. For example, the electrode 126a of the led 120 and the second metal layer 110b of the metal layer 110 may be electrically connected to each other by eutectic (eutectic) bonding. On the other hand, as mentioned above, since the metal layer 110 may also include only the first metal layer 110a, the conductive adhesive layer 130 is used to electrically connect the electrode 126a of the light emitting diode 120 and the first metal layer 110 a.

In addition, an insulating layer IL4 covers the conductive adhesive layer 130. The insulating layer IL4 may be made of (but not limited to): inorganic materials, organic materials, or combinations thereof, wherein the inorganic materials are, for example (but not limited to): a stacked layer of silicon oxide, silicon nitride, silicon oxynitride, or at least two of the above materials; organic materials are for example (but not limited to): polyimide resin, epoxy resin, acrylic resin, or the like.

In this embodiment, the opposite substrate 140 includes a substrate 142, a color filter layer CF disposed on the substrate 142, a wavelength conversion layer WT, a light blocking pattern layer BK, and an adhesive layer 144. However, the present invention is not limited thereto. In other embodiments, only the color filter layer CF or only the wavelength conversion layer WT may be disposed on the substrate 142.

The substrate 142 may be made of glass, quartz, organic polymer, metal material, or the like, wherein the organic polymer is, for example (but not limited to): polyimide, polyethylene terephthalate, polycarbonate, and the like.

The color filter layer CF may be realized by any color filter layer known to a person skilled in the art. For example, the color filter layer CF may include red, green, and blue filter patterns.

The wavelength conversion layer WT is provided corresponding to the light emitting diode 120. The wavelength converting layer WT may be implemented by any wavelength converting layer known to those skilled in the art. For example, the materials of the wavelength conversion layer WT may include (but are not limited to): quantum dot material, phosphor powder material, or a combination thereof.

The light shielding pattern layer BK is provided corresponding to the wavelength conversion layer WT. In detail, in the present embodiment, the light shielding pattern layer BK can be used to shield elements and traces in the display device 10, such as scan lines (not shown), data lines (not shown), transistors T, etc., which are not desired to be viewed by a user. The light-shielding pattern layer BK is, for example, a Black Matrix (BM). The material of the light-shielding pattern layer BK includes, for example (but is not limited to): black resin, other colored resin, black photoresist, other colored photoresist, metal, or a single layer or multi-layer structure of the above composition.

The adhesive layer 144 is disposed between the color filter layer CF and the wavelength conversion layer WT and the light shielding pattern layer BK, and is used for adhering the color filter layer CF and the wavelength conversion layer WT and the light shielding pattern layer BK. The material of the adhesive layer 144 includes (but is not limited to): organic insulating material, inorganic insulating material, organic-inorganic hybrid insulating material, or a stacked architecture of the above materials.

Particularly, the opposite substrate 140 of the present embodiment includes a color filter layer CF, a wavelength conversion layer WT, a light shielding pattern layer BK and an adhesive layer 144 disposed on a substrate 142, but the invention is not limited thereto. In other embodiments, the opposite substrate 140 may be any opposite substrate known to those skilled in the art. In addition, in the present embodiment, the display device 10 includes the opposite substrate 140, but the present invention is not limited thereto. In other embodiments, the display device 10 may not include the counter substrate.

In addition, in this embodiment, the adhesive layer 144 is located between the color filter layer CF and the wavelength conversion layer WT, but the invention is not limited thereto. In other embodiments, the color filter layer CF may also be located between the adhesive layer 144 and the wavelength conversion layer WT, i.e., the adhesive layer 144 may be in direct contact with the substrate 142.

It is to be noted that, as described above, in the present embodiment, the ratio of the distance a2 between the surface S1 and the surface S2 of the light emitting diode 120 and the distance a1 between the upper surface TS of the metal layer 110 and the substrate 100 in the direction D is greater than or equal to 0.25 and less than or equal to 6, so that the display device 10 has good light emitting efficiency or good structural strength.

In addition, although the light emitting diode 120 is a vertical micro light emitting diode in the embodiment of fig. 1, the invention is not limited thereto. In other embodiments, the light emitting diode may be a flip-chip micro light emitting diode. Hereinafter, description will be made with reference to fig. 2. It should be noted that the following embodiments follow the reference numerals and some contents of the foregoing embodiments, wherein the same or similar reference numerals are used to indicate the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.

Fig. 2 is a schematic cross-sectional view of a display device according to another embodiment of the present invention. Referring to fig. 2 and fig. 1, in the display device 20, the light emitting diode 220 is a flip-chip micro light emitting diode; in the display device 10, the light emitting diode 120 is a vertical micro light emitting diode. In the following, the differences between the embodiment of fig. 2 and the embodiment of fig. 1 will be explained.

Referring to fig. 2, the light emitting diode 220 includes a light emitting diode body 2LB, an electrode 226a and an electrode 226b, wherein the light emitting diode body 2LB includes a first conductive type semiconductor layer 222a, an active layer 224 and a second conductive type semiconductor layer 222 b. In detail, in the present embodiment, the second conductive type semiconductor layer 222b is disposed on the

electrodes

226a and 226b, the first conductive type semiconductor layer 222a is disposed between the second conductive type semiconductor layer 222b and the electrodes 226b, and the light emitting diode body 2LB of the light emitting diode 220 is electrically connected to the second metal layer 110b of the metal layer 110 through the electrodes 226 a.

In this embodiment, the material of the first conductive type semiconductor layer 222a is, for example (but not limited to): GaN doped with dopants of the first conductivity type or other suitable material, such as GaN doped with magnesium. The material of the active layer 224 is, for example (but not limited to): the material of the multiple quantum well is, for example, InGaN/GaN or other suitable material. The material of the second conductive type semiconductor layer 222b is, for example (but not limited to): GaN doped with a second conductivity type dopant or other suitable material, such as GaN doped with silicon. In this embodiment, the first conductive type semiconductor layer 222a is, for example, a P-type semiconductor layer, the second conductive type semiconductor layer 222b is, for example, an N-type semiconductor layer, and based on this, the electrode 226b in contact with the first conductive type semiconductor layer 222a is, for example, a P-type electrode, and the electrode 226a in contact with the second conductive type semiconductor layer 222b is, for example, an N-type electrode. However, the present invention is not limited thereto. In another embodiment, the first conductive type semiconductor layer 222a is, for example, an N-type semiconductor layer, the second conductive type semiconductor layer 222b is, for example, a P-type semiconductor layer, and based on this, the electrode 226b in contact with the first conductive type semiconductor layer 222a is, for example, an N-type electrode, and the electrode 226a in contact with the second conductive type semiconductor layer 222b is, for example, a P-type electrode.

In this embodiment, the led body 2LB has a surface 2S1 and a surface 2S2 opposite to the surface 2S1, the surface 2S1 and the surface 2S2 are both parallel to the substrate 100, and a distance 2a2 exists between the surface 2S1 and the surface 2S2 in the direction D. In one embodiment, the distance 2a2 may be greater than or equal to 2um and less than or equal to 12 um. In another embodiment, the distance 2a2 may be greater than or equal to 3um and less than or equal to 10 um. In another embodiment, the distance 2a2 may be greater than or equal to 4um and less than or equal to 8 um.

Specifically, in one embodiment, the ratio of the distance 2a2 to the distance a1 may be greater than or equal to 0.25 and less than or equal to 6. In another embodiment, the ratio of the distance 2a2 to the distance a1 may be greater than or equal to 0.6 and less than or equal to 5. In another embodiment, the ratio of the distance 2a2 to the distance a1 may be greater than or equal to 1 and less than or equal to 4. If the ratio of the distance 2a2 to the distance a1 is less than 0.35, the structural strength of the display device 20 may be weakened; if the ratio of the distance 2a2 to the distance a1 is greater than 6, the light emitting efficiency of the display device 20 or the heat dissipation efficiency thereof may be reduced.

In particular, in the present embodiment, the surface 2S1 is the bottom surface of the first conductive type semiconductor layer 222a, and the surface 2S2 is the top surface of the second conductive type semiconductor layer 222 b. That is, in the present embodiment, the distance 2a2 is a length between the bottom surface of the first conductive type semiconductor layer 222a and the top surface of the second conductive type semiconductor layer 222 b. In addition, in fig. 2, although the surface 2S2 is a flat surface, according to the above description related to fig. 1, any person skilled in the art can understand that the surface 2S2 may also have a plurality of grooves for improving the light emitting efficiency of the display device 20. This means that, at this time, the distance 2a2 is actually a length from the highest of the surface 2S2 to the surface 2S1, and the second conductive type semiconductor layer 222b has a plurality of trenches.

In the present embodiment, the display device 20 further includes an electrode pattern 250 disposed on the planarization layer PL. In detail, in the present embodiment, the electrode pattern 250 and the second metal layer 110b belong to the same film layer and have the same material. That is, in the present embodiment, the electrode pattern 250 and the second metal layer 110b are formed together in the same photolithography process. In this embodiment, the material of the electrode pattern 250 and the second metal layer 110b is, for example (but not limited to): aluminum, molybdenum, titanium, gold, indium, tin, or combinations thereof.

In addition, in the present embodiment, the light emitting diode body 2LB is electrically connected to the second metal layer 110b through the electrode 226a and electrically connected to the electrode pattern 250 through the electrode 226 b. Further, in the present embodiment, the electrode 226a and the electrode 226b are electrically connected to the second metal layer 110b and the electrode pattern 250 through the conductive adhesive layer 130, respectively. Similarly, the invention is not limited thereto, and any person skilled in the art can electrically connect the electrode 226a and the second metal layer 110b and the electrode 226b and the electrode pattern 250 by any conventional bonding method. For example, the electrode 226a and the electrode 226b may be electrically connected to the second metal layer 110b and the electrode pattern 250 by eutectic bonding.

It is to be noted that, as described above, in the present embodiment, the ratio of the distance 2a2 between the surface 2S1 and the surface 2S2 of the light emitting diode 220 and the distance a1 between the upper surface TS of the metal layer 110 and the substrate 100 in the direction D is greater than or equal to 0.25 and less than or equal to 6, so that the display device 20 has good light emitting efficiency or good structural strength.

In the embodiment of fig. 1, the light emitting diode 120 includes a light emitting diode body LB, an electrode 126a, and an electrode 126b, and in the embodiment of fig. 2, the light emitting diode 220 includes a light emitting diode body 2LB, an electrode 226a, and an electrode 226b, but the present invention is not limited thereto. In other embodiments, the light emitting diode may further include a buffer layer disposed on the light emitting diode body. Hereinafter, the detailed description will be made with reference to fig. 3 and 4.

Fig. 3 is a schematic cross-sectional view of a light emitting diode according to another embodiment of the present invention. Referring to fig. 3 and fig. 1, the light emitting diode 320 of fig. 3 is similar to the light emitting diode 120 of fig. 1, and therefore the same or similar elements are denoted by the same or similar symbols, and the description thereof is omitted. Hereinafter, the difference between the two will be explained.

Referring to fig. 3, the buffer layer 360 is disposed on the led main LB, and a top surface S3 of the buffer layer 360 has a plurality of trenches 3M. In detail, in this embodiment, the buffer layer 360 is located between the second conductive type semiconductor layer 122b and the electrode 126b of the light emitting diode main LB. In this embodiment, the material of the buffer layer 360 includes (but is not limited to): alumina (Al)₂O₃) Undoped gallium nitride (GaN), silicon nitride, silicon oxide or a stacked structure of the foregoing materials. In addition, in the present embodiment, the depth of the trench 3M is about 0.25um to 1 um.

It should be noted that, in the present embodiment, the light emitting diode 320 includes the buffer layer 360 disposed on the light emitting diode body LB, and the top surface S3 of the buffer layer 360 has a plurality of grooves 3M, so that the surface S2 of the light emitting diode body LB can improve the light emitting efficiency of the display device 10 without providing the grooves M. In this embodiment, the surface S2 of the led body LB is a flat surface, and the distance a2 can be directly measured from the surface S2 to the surface S1.

Fig. 4 is a schematic cross-sectional view of a light emitting diode according to another embodiment of the present invention. Referring to fig. 4 and fig. 2, the light emitting diode 420 of fig. 4 is similar to the light emitting diode 220 of fig. 2, and therefore the same or similar elements are denoted by the same or similar symbols, and the description thereof is omitted. Hereinafter, the difference between the two will be explained.

Referring to fig. 4, the buffer layer 460 is disposed on the led body 2LB, and the top surface S4 of the buffer layer 460 has a plurality of trenches 4M. In detail, in the present embodiment, the buffer layer 460 is positioned on the second conductive type semiconductor layer 222b of the light emitting diode body 2 LB. In thatIn this embodiment, the material of the buffer layer 460 includes (but is not limited to): al (Al)₂O₃Undoped GaN, silicon nitride, silicon oxide or a stacked structure of the above materials. In addition, in the present embodiment, the depth of the trench 4M is about 0.25um to 1 um.

It should be noted that, in the present embodiment, the light emitting diode 420 includes the buffer layer 460 disposed on the light emitting diode body 2LB, and the top surface S4 of the buffer layer 460 has a plurality of grooves 4M, so that the light emitting efficiency of the display device 20 can be improved. In this embodiment, the surface 2S2 of the led body 2LB is a flat surface without grooves, and the distance 2a2 can be directly measured from the surface 2S2 to the surface 2S 1.

In addition, although the embodiment of fig. 1 to 2 discloses that the transistor T is a low temperature polysilicon thin film transistor, and the embodiment of fig. 1 to 4 discloses the

light emitting diodes

120, 220, 320, and 420, the invention is not limited thereto. In detail, the display device of the present invention may include any type of transistor known to those skilled in the art, such as a metal oxide thin film transistor, an amorphous silicon thin film transistor, a silicon-based thin film transistor, a micro silicon thin film transistor, a transparent thin film transistor, or the like; and the display device of the present invention may include any light emitting diode of any architecture known to those skilled in the art, as long as the ratio of the distance between the bottom surface of the first conductive type semiconductor layer in the light emitting diode body and the top surface of the second conductive type semiconductor layer to the distance between the substrate and the upper surface of the metal layer electrically connected to the transistor and the light emitting diode, respectively, is 0.25 or more and 6 or less. That is, the present invention is not limited to the kind of the transistor and the structure of the light emitting diode. For example, in the display device of an embodiment, the light emitting diode may further include a reflective structure disposed on a sidewall of the light emitting diode body, so as to improve the light emitting efficiency of the display device. Hereinafter, a method for manufacturing a display device according to several embodiments will be described in detail with reference to fig. 5A to 5M, fig. 6A to 6B, fig. 7A to 7C, fig. 8A to 8J, fig. 9A to 9E, fig. 10A to 10E, and fig. 11A to 11G.

First, referring to fig. 5A, a first conductive type semiconductor material layer 510, a body material layer 511, and a second conductive type semiconductor material layer 512 are sequentially formed on a substrate 500. The substrate 500 is, for example, a sapphire substrate, and has a thickness of, for example, 450 μm or more. The material of the first conductive type semiconductor material layer 510 is, for example (but not limited to): GaN doped with dopants of the first conductivity type or other suitable material, such as GaN doped with silicon. The material of the main material layer 511 is, for example (but not limited to): the material of the multiple quantum well is, for example, InGaN/GaN or other suitable material. The material of the second conductive type semiconductor material layer 512 is, for example (but not limited to): GaN doped with a second conductivity type dopant or other suitable material, such as GaN doped with magnesium. On the other hand, the first conductive type semiconductor material layer 510 is, for example, an N-type semiconductor material layer, and the second conductive type semiconductor material layer 512 is, for example, a P-type semiconductor material layer. The first conductive type semiconductor material layer 510, the body material layer 511, and the second conductive type semiconductor material layer 512 are formed by, for example (but not limited to): metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), or other suitable epitaxial growth methods.

Next, referring to fig. 5B, a patterned photoresist layer 513 is formed on the second conductive type semiconductor material layer 512. In detail, in the present embodiment, the patterned photoresist layer 513 is formed by any half tone (half tone) process known to those skilled in the art.

Next, referring to fig. 5C, a thermal flow process is performed on the patterned photoresist layer 513 to form a thermally flowed patterned photoresist layer 514. In detail, in the present embodiment, the patterned photoresist layer 514 having a curved profile is heated. In addition, in the present embodiment, any thermal flow process known to those skilled in the art may be performed on the patterned photoresist layer 513.

Next, referring to fig. 5D, using the patterned photoresist layer 514 after heat flow as a mask, a portion of the first conductive type semiconductor material layer 510, a portion of the body material layer 511, and a portion of the second conductive type semiconductor material layer 512 are removed to form a first conductive type semiconductor layer 515, an active layer 516, and a second conductive type semiconductor layer 517. In detail, in the present embodiment, the first conductive type semiconductor layer 515, the active layer 516 and the second conductive type semiconductor layer 517 together form the light emitting diode body 518, wherein the light emitting diode body 518 has a trapezoid structure and has an included angle θ, and the included angle θ is about 30 degrees to 85 degrees, and preferably about 60 degrees. In addition, in this embodiment, the methods of removing part of the first conductive type semiconductor material layer 510, part of the body material layer 511, and part of the second conductive type semiconductor material layer 512 are, for example (but not limited to): dry etching method. In this embodiment, the first conductive type semiconductor layer 515 is an N-type semiconductor layer, for example, and the second conductive type semiconductor layer 517 is a P-type semiconductor layer, for example.

Subsequently, after the first conductive type semiconductor layer 515, the active layer 516, and the second conductive type semiconductor layer 517 are formed, the heat-flowed patterned photoresist layer 514 is removed. In this embodiment, the method of removing the heated patterned photoresist layer 514 is, for example (but not limited to): a wet method using a stripping (stripper) solution or a dry method using plasma ashing (plasma ashing).

Next, referring to fig. 5E, a material layer 519a and a material layer 519b are sequentially formed on the led body 518. In detail, in this embodiment, the material layer 519a and the material layer 519b are conformally formed on the light emitting diode body 518. In this embodiment, the material layer 519a is an insulating material, and examples thereof include (but are not limited to): silicon oxide or silicon nitride; the method of forming the material layer 519a is, for example (but not limited to): chemical Vapor Deposition (CVD) or Physical Vapor Deposition (PVD); the material of the material layer 519b is a metal material, such as (but not limited to): aluminum or silver; the method of forming the material layer 519b is, for example (but not limited to): electrochemical plating (ECP) or Physical Vapor Deposition (PVD).

Next, a patterned photoresist layer 520 is formed on the material layer 519 b. In detail, in this embodiment, the method of forming the patterned photoresist layer 520 is, for example (but not limited to): and (5) performing a photolithography process.

Next, referring to fig. 5F, a first etching process is performed on the material layer 519b by using the patterned photoresist layer 520 as a mask to form a reflective metal layer 521 on the sidewall of the led body 518. In detail, in the present embodiment, the first etching process is preferably a wet etching process, so that the reflective metal layer 521 under the patterned photoresist layer 520 exhibits an undercut phenomenon. That is, the edge of the patterned photoresist layer 520 protrudes beyond the edge of the reflective metal layer 521. In addition, in the present embodiment, the reflective metal layer 521 includes two patterns separated from each other with a distance Lb therebetween.

Next, referring to fig. 5G, a second etching process is performed on the material layer 519a by using the patterned photoresist layer 520 as a mask to form an insulating layer 522 on sidewalls of the led body 518. In detail, in the present embodiment, the insulating layer 522 and the reflective metal layer 521 disposed on the insulating layer 522 together form a reflective structure 523 for reflecting light emitted from the light emitting diode body 518. However, the invention is not limited thereto. In other embodiments, the reflective structure 523 may include only the reflective metal layer 521.

In the present embodiment, the reflective metal layer 521 and the insulating layer 522 are defined by using the same mask (i.e., the patterned photoresist layer 520), so the reflective structure 523 is formed in the same mask process. In addition, in the present embodiment, the second etching process is preferably a dry etching process, so that the insulating layer 522 under the patterned photoresist layer 520 does not have an undercut phenomenon. Thus, the edge of the insulating layer 522 protrudes beyond the edge of the reflective metal layer 521. On the other hand, in the present embodiment, the insulating layer 522 also includes two patterns separated from each other with a distance La therebetween. As described above, since the edge of the insulating layer 522 protrudes beyond the edge of the reflective metal layer 521, the distance Lb is greater than the distance La.

It should be noted that, as mentioned above, since the led body 518 has the included angle θ of about 30 to 85 degrees, the reflective structure 523 disposed on the sidewall of the led body 518 can control the light emitted from the led body 518 to emit toward the same side of the led body 518.

Next, referring to fig. 5H, a conductive layer 524 is formed on the substrate 500, wherein the conductive layer 524 covers the patterned photoresist layer 520 and the second conductive type semiconductor layer 517. In detail, in the present embodiment, the conductive layer 524 is a discontinuous film layer. That is, in this embodiment, the conductive layer 524 covering the patterned photoresist layer 520, the conductive layer 524 covering the substrate 500 not shielded by the patterned photoresist layer 520, and the conductive layer 524 covering the second conductive type semiconductor layer 517 not shielded by the patterned photoresist layer 520 are separated from each other. It should be noted that, as described above, the edge of the patterned photoresist layer 520 and the edge of the insulating layer 522 both protrude from the edge of the reflective metal layer 521, so the conductive layer 524 can be a discontinuous layer. In the present embodiment, the conductive layer 524 is made of, for example, but not limited to, a nickel/gold (Ni/Au) stacked structure, a titanium/aluminum (Ti/Al) stacked structure, or other metal materials meeting the requirement of contact resistance; methods of forming the conductive layer 524 are, for example (but not limited to): electrochemical plating, physical vapor deposition or evaporation.

On the other hand, in this embodiment mode, the conductive layer 524 covering the second conductive type semiconductor layer 517 not shielded by the patterned photoresist layer 520 serves as an electrode 525. That is, in the present embodiment, the electrode 525 is also defined by the patterned photoresist layer 520 defining the reflective structure 523, which means that the electrode 525 and the reflective structure 523 are formed in the same mask process. In this embodiment, the electrode 525 is, for example, a P-type electrode.

Next, referring to fig. 5I, the patterned photoresist layer 520 and the conductive layer 524 covering the patterned photoresist layer 520 are removed, and the conductive layer 524 (i.e., the electrode 525) covering the second conductive type semiconductor layer 517 and the conductive layer 524 covering the substrate 500 are left. In detail, in the present embodiment, the method of removing the patterned photoresist layer 520 is, for example (but not limited to): a wet method using a stripping solution or a dry method using plasma ashing. It should be noted that, as described above, since the conductive layer 524 is a discontinuous layer, the problem that the patterned photoresist layer 520 cannot be removed due to the continuous layer formed thereon can be avoided.

Next, referring to fig. 5J, a carrier substrate 526 having a bonding layer 527 formed thereon is provided. In this embodiment, the material of the carrier substrate 526 is, for example (but not limited to): glass, plastic or polyimide, polyethylene terephthalate, polycarbonate and other chemical materials. In the present embodiment, the bonding layer 527 is made of, for example (but not limited to): indium tin (Sn/In) alloy, gold (Au), copper (Cu), or an alloy material thereof; methods of forming the bonding layer 527 are, for example (but not limited to): electroplating, evaporation or physical vapor deposition.

Subsequently, the carrier substrate 526 and the substrate 500 are bonded and paired together to form the structure shown in fig. 5J. In detail, in the present embodiment, the bonding layer 527 is in contact with the reflective structure 523, and the bonding layer 527 is in contact with the electrode 525.

Next, referring to fig. 5K, the substrate 500 is removed. In detail, in the present embodiment, the method for removing the substrate 500 is, for example (but not limited to): laser lift-off (laser lift-off). In addition, when the substrate 500 is removed, the conductive layer 524 covering the substrate 500 is also removed, and the first conductive type semiconductor layer 515 is exposed.

Next, referring to fig. 5L, an electrode 528 is formed on the first conductive type semiconductor layer 515. In this embodiment, the material of the electrode 528 is, for example (but not limited to): a nickel/gold (Ni/Au) stack architecture, a titanium/aluminum (Ti/Al) stack architecture, or other metallic materials. In this embodiment, the electrode 528 is, for example, an N-type electrode.

In one embodiment, the method of forming electrode 528 includes (but is not limited to) the following steps: first, a patterned hard mask layer (not shown) is formed on the first conductive type semiconductor layer 515; next, forming an electrode paste composition (not shown) on the patterned hard mask layer; thereafter, the electrodes 528 are defined by stamping. In another embodiment, a method of forming electrode 528 includes (but is not limited to) the following steps: after a patterned hard mask layer (not shown) is formed on the first conductive type semiconductor layer 515, an electrode 528 is defined by evaporation. In addition, although the electrode 528 includes a plurality of electrode patterns each separated in this embodiment, the present invention is not limited thereto. In other embodiments, the electrode 528 may also be a patch electrode.

Thus, the light emitting diode 529 is substantially completed. In detail, in the present embodiment, the light emitting diode 529 includes the light emitting diode body 518, the reflective structure 523, the electrode 525 and the electrode 528, wherein the reflective structure 523 is disposed on a sidewall of the light emitting diode body 518 and includes the insulating layer 522 and the reflective metal layer 521 on the insulating layer 522, so that the display device including the light emitting diode 529 has a good light emitting efficiency. In this embodiment, the light emitting diode 529 is a vertical micro light emitting diode.

Next, referring to fig. 5M, after the carrier substrate 526 is heated, the light emitting diode 529 temporarily stored on the carrier substrate 526 is captured by the capturing device 530, wherein a portion of the bonding layer 527 is attached to the light emitting diode 529 and contacts the reflective structure 523 and the electrode 525. In detail, in the present embodiment, the process temperature of the heating process is, for example, 200 ℃ to 700 ℃, and the process time of the heating process is, for example, 0.5 minutes to 5 minutes.

It is noted that after the operation of capturing the light emitting diode 529 is completed, any skilled person will understand that any well-known process steps may be adopted to assemble the light emitting diode 529 in the display device according to different applications.

In addition, in the embodiment of fig. 5A to 5M, the reflective structure 523 has a double-layer structure including the insulating layer 522 and the reflective metal layer 521 stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 523 may have three or more layers. For example, in an embodiment, the reflective structure 523 may further include another insulating layer between the insulating layer 522 and the reflective metal layer 521, the refractive index of the another insulating layer being different from the refractive index of the insulating layer 522.

In addition, in the embodiment of fig. 5A to 5M, the reflective structure 523 includes an insulating layer 522 and a reflective metal layer 521 stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 523 may also include two insulating layers stacked in sequence and having different refractive indexes. Hereinafter, a detailed description will be made based on fig. 6A to 6B.

Fig. 6A to 6B are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention. Fig. 6A is a sequence of steps performed after fig. 5D. In addition, the same materials or methods are used for the same or similar components in the embodiments of fig. 6A to 6B and the embodiments of fig. 5A to 5M, so the description about the same components as the embodiments of fig. 5A to 5M will not be repeated, and the differences between the two will be mainly described.

First, referring to fig. 6A, a material layer 619a and a material layer 619b are sequentially formed on the led body 518. In detail, in this embodiment, the material layer 619a and the material layer 619b are conformally formed on the substrate 500. In this embodiment, the

material layers

619a and 619b are insulating materials, and the refractive index of the material layer 619a is different from the refractive index of the material layer 619 b. In this embodiment mode, the refractive index of the material layer 619b is, for example, larger than the refractive index of the material layer 619 a. Specifically, in the present embodiment, the difference between the refractive index of the material layer 619b and the refractive index of the material layer 619a is, for example, 0.4 to 0.9. In another aspect, in this embodiment, the material of the material layer 619a is, for example, silicon oxide, and the material of the material layer 619b is, for example, silicon nitride, but the invention is not limited thereto. In this embodiment mode, the

material layers

619a and 619b are formed, for example (but not limited to): chemical vapor deposition or physical vapor deposition.

Next, a patterned photoresist layer 620 is formed on the material layer 619 b. In detail, in this embodiment, the method of forming the patterned photoresist layer 620 is, for example (but not limited to): and (5) performing a photolithography process.

Next, referring to fig. 6B, a first etching process is performed on the material layer 619B using the patterned photoresist layer 620 as a mask to form an insulating layer 621 on the sidewalls of the led body 518, and then a second etching process is performed on the material layer 619a using the patterned photoresist layer 620 as a mask to form an insulating layer 622 on the sidewalls of the led body 518. In detail, in the present embodiment, the first etching process and the second etching process are preferably dry etching processes with the same process conditions. It should be noted that, in the present embodiment, in the dry etching process, the etching rate of the material layer 619a is smaller than that of the material layer 619 b. As a result, the insulating layer 621 under the patterned photoresist layer 620 exhibits an undercut phenomenon, such that the edge of the patterned photoresist layer 620 and the edge of the insulating layer 622 protrude from the edge of the insulating layer 621. In addition, in this embodiment, the insulating layer 621 and the insulating layer 622 each include two patterns separated from each other, wherein a distance Lb is provided between the two patterns of the insulating layer 621, and a distance La is provided between the two patterns of the insulating layer 622. As described above, since the edge of the insulating layer 622 protrudes beyond the edge of the insulating layer 621, the distance Lb is greater than the distance La.

More specifically, in the present embodiment, the insulating layer 622 and the insulating layer 621 disposed on the insulating layer 622 together form a reflection structure 623 for reflecting light emitted from the led body 518. It should be noted that, in the present embodiment, since the insulating layer 621 and the insulating layer 622 are defined by using the same mask (i.e., the patterned photoresist layer 620), the reflective structure 623 is formed in the same mask process. Further, as mentioned above, since the led body 518 has the included angle θ of about 30 to 85 degrees, the reflective structure 623 disposed on the sidewall of the led body 518 can control the light emitted from the led body 518 to emit toward the same side of the led body 518.

It should be noted that, based on the contents of the embodiments in fig. 5A to 5M and the embodiments in fig. 6A to 6B, it should be understood by those skilled in the art that after the reflection structure 623 disposed on the sidewall of the led body 518 is formed, the fabrication of the led can be completed by the same technical means according to the descriptions in fig. 5H to 5M.

In addition, in the embodiment of fig. 6A to 6B, the reflective structure 623 has a dual-layer structure including the insulating layer 622 and the insulating layer 621 stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 623 may have three or more layers. For example, in one embodiment, the reflective structure 623 may further include another insulating layer, and the refractive index of the another insulating layer may be different from the refractive index of the insulating layer 622 and the refractive index of the insulating layer 621. For example, in one embodiment, the reflective structure 623 may also include the insulating layers 622 and 621 stacked repeatedly and alternately.

In the embodiment of fig. 5A to 5M, the electrode 528 is directly formed on the first conductive type semiconductor layer 515, but the present invention is not limited thereto. In other embodiments, the electrode 528 may also be formed on the first conductive type semiconductor layer 515 by being formed on the opposite substrate and by being paired. Hereinafter, a detailed description will be made based on fig. 7A to 7C.

Fig. 7A to 7C are cross-sectional views illustrating a method of manufacturing a display device according to another embodiment of the present invention. Fig. 7A is a sequence of steps performed subsequent to fig. 5I. In addition, the same materials or methods are used for the same or similar components in the embodiment of fig. 7A to 7C and the embodiment of fig. 5A to 5M, so the description about the same components as the embodiment of fig. 5A to 5M will not be repeated, and the differences between the two will be mainly described.

First, referring to fig. 7A, an array substrate 726 having a bonding layer 727 formed thereon is provided. In detail, in the present embodiment, the array substrate 726 may be any array substrate known to those skilled in the art. For example, in one embodiment, the array substrate 726 may include a device layer formed of at least one insulating layer or at least one conductive layer or a combination thereof on the substrate. Specifically, in one embodiment, the element layer may include, for example, a plurality of scan lines, a plurality of data lines, a plurality of transistors, a plurality of electrodes, and a plurality of capacitors. From another perspective, in one embodiment, the array substrate 726 is an active device array substrate, for example. In another embodiment, the array substrate 726 is, for example, a Thin Film Transistor (TFT) array substrate.

In this embodiment, the bonding layer 727 is made of, for example (but not limited to): an indium tin (Sn/In) alloy, Cu, Au, or an alloy material thereof, and a method of forming the bonding layer 727 is, for example (but not limited to): electroplating, physical vapor deposition or evaporation.

Then, the array substrate 726 and the substrate 500 are bonded and paired together to form the structure shown in fig. 7A. In detail, in the present embodiment, the bonding layer 727 is in contact with the reflective structure 523, and the bonding layer 727 is in contact with the electrode 525

Next, referring to fig. 7B, the substrate 500 is removed. Since the method for removing the substrate 500 and the related description of this step have been described in detail in the embodiments of fig. 5A to 5M, they are not repeated herein.

Next, referring to fig. 7C, an opposite substrate 729 on which an electrode 728 is formed is provided. In detail, in the present embodiment, the counter substrate 729 may be any counter substrate known to those skilled in the art. For example, in one embodiment, the opposite substrate 729 can be implemented as the opposite substrate 140 in the embodiment of fig. 1.

In this embodiment, the material of the electrode 728 is, for example, a transparent electrode material, which includes (but is not limited to): indium Tin Oxide (ITO), Indium Zinc Oxide (IZO); methods of forming electrode 728 are, for example (but not limited to): physical vapor deposition, evaporation, or electroplating. In this embodiment, the electrode 728 is an N-type electrode, for example. In this embodiment, the electrode 728 is, for example, a common electrode.

Subsequently, the array substrate 726 and the opposite substrate 729 are combined to form a structure as shown in fig. 7C, thereby completing the fabrication of the display device 70 including the light emitting diodes 730. In detail, in this embodiment, after the array substrate 726 and the counter substrate 729 are combined into a pair, the electrode 728 is formed on the first conductive type semiconductor layer 515 in contact with the first conductive type semiconductor layer 515 of the light emitting diode body 518.

It should be noted that, in the present embodiment, the light emitting diode 730 includes the light emitting diode body 518, the reflective structure 523, the electrode 525 and the electrode 728, wherein the reflective structure 523 is disposed on a sidewall of the light emitting diode body 518 and includes the insulating layer 522 and the reflective metal layer 521 stacked in sequence, so that the display device 70 has good light emitting efficiency. In another embodiment, the reflective structure 523 may also include only the reflective metal layer 521.

In addition, in the embodiments of fig. 7A to 7C, in order to improve the contact effect between the electrode 728 and the first conductive type semiconductor layer 515, it can be understood by one skilled in the art from the disclosure of fig. 5L that the electrode 528 can be directly formed on the first conductive type semiconductor layer 515 after the substrate 500 is removed and before the array substrate 726 and the opposite substrate 729 are combined.

In the above-mentioned embodiment of fig. 5A to 5M, the light emitting diode 529 is a vertical micro light emitting diode, but the invention is not limited thereto. In other embodiments, the light emitting diode may be a flip-chip micro light emitting diode. Hereinafter, description will be made with reference to fig. 8A to 8J, fig. 9A to 9E, fig. 10A to 10E, and fig. 11A to 11G.

First, referring to fig. 8A, a first conductive type semiconductor material layer 810, a body material layer 811, and a second conductive type semiconductor material layer 812 are sequentially formed on a substrate 800. The substrate 800 is, for example, a sapphire substrate, and has a thickness of, for example, 450 μm or more. The material of the first conductive type semiconductor material layer 810 is, for example (but not limited to): GaN doped with dopants of the first conductivity type or other suitable material, such as GaN doped with silicon. The material of the body material layer 811 is, for example (but not limited to): the material of the multiple quantum well is, for example, InGaN/GaN or other suitable material. The material of the second conductive type semiconductor material layer 812 is, for example (but not limited to): GaN doped with a second conductivity type dopant or other suitable material, such as GaN doped with magnesium. On the other hand, the first conductive type semiconductor material layer 810 is, for example, an N-type semiconductor material layer, and the second conductive type semiconductor material layer 812 is, for example, a P-type semiconductor material layer. The first conductive type semiconductor material layer 810, the body material layer 811, and the second conductive type semiconductor material layer 812 are formed by, for example (but not limited to): metal organic chemical vapor deposition, molecular beam epitaxy, or other suitable epitaxial growth methods.

Next, an electrode 813 is formed on the second conductivity type semiconductor material layer 812. In detail, in the present embodiment, the material of the electrode 813 is, for example but not limited to, a nickel-gold (Ni/Au) alloy, Ni/ITO, or other materials meeting the requirement of contact resistance, and the method for forming the electrode 813 is, for example (but not limited to): a photolithography etching process. In this embodiment, the electrode 813 is, for example, a P-type electrode.

Next, referring to fig. 8B, a patterned photoresist layer 814 is formed on the second conductive type semiconductor material layer 812. In detail, in this embodiment, the patterned photoresist layer 814 covers the electrode 813. In addition, the patterned photoresist layer 814 is formed by any half-tone (half tone) process known to those skilled in the art. In addition, in the present embodiment, the patterned photoresist layer 814 has a stepped profile.

Next, referring to fig. 8C, a thermal flow process is performed on the patterned photoresist layer 814 to form a thermally flowed patterned photoresist layer 815. In detail, in the present embodiment, the patterned photoresist layer 815 having undergone heat flow has an arc-shaped stepped profile. In addition, in the present embodiment, any thermal flow process known to those skilled in the art may be performed on the patterned photoresist layer 814.

Next, referring to fig. 8D, using the heated patterned photoresist layer 815 as a mask, a portion of the first conductive type semiconductor material layer 810, a portion of the body material layer 811, and a portion of the second conductive type semiconductor material layer 812 are removed to form a first conductive type semiconductor layer 816, an active layer 817, and a second conductive type semiconductor layer 818. In detail, in the present embodiment, the first conductive type semiconductor layer 816, the active layer 817, and the second conductive type semiconductor layer 818 together form a light emitting diode body 819, wherein the light emitting diode body 819 has an included angle θ, and the included angle θ is about 30 degrees to 85 degrees, and preferably about 60 degrees. In this embodiment, the method of removing part of the first conductive type semiconductor material layer 810, part of the body material layer 811, and part of the second conductive type semiconductor material layer 812 is, for example (but not limited to): dry etching method. In this embodiment, the first conductive type semiconductor layer 816 is an N-type semiconductor layer, for example, and the second conductive type semiconductor layer 818 is a P-type semiconductor layer, for example.

Next, after the first conductive type semiconductor layer 816, the active layer 817, and the second conductive type semiconductor layer 818 are formed, the patterned photoresist layer 815 having the heated flow is removed. In this embodiment, the method of removing the heated patterned photoresist layer 815 is, for example (but not limited to): wet methods using a stripping solution or ashing with plasma).

Next, referring to fig. 8E, an electrode 820 is formed on the substrate 800. In detail, in this embodiment, the electrode 820 is in contact with the first conductive type semiconductor layer 816. In this embodiment, the material of the electrode 820 is, for example (but not limited to): a titanium aluminum (Ti/Al) alloy, a titanium gold (Ti/Au) alloy, or other metallic material, and a method of forming the electrode 820 is, for example (but not limited to): a photolithography etching process. In this embodiment, the electrode 820 is an N-type electrode, for example.

Next, referring to fig. 8F, an insulating material layer 821a and an insulating material layer 821b are sequentially formed on the substrate 800. In detail, in this embodiment, the insulating material layer 821a and the insulating material layer 821b are conformally formed on the substrate 800. In this embodiment, the insulating material layer 821a and the insulating material layer 821b are formed, for example (but not limited to): chemical vapor deposition or physical vapor deposition.

On the other hand, the refractive index of the insulating-material layer 821a is different from that of the insulating-material layer 821 b. In this embodiment, the refractive index of the insulating material layer 821b is, for example, larger than the refractive index of the insulating material layer 821 a. Specifically, in the present embodiment, the difference between the refractive index of the insulating material layer 821b and the refractive index of the insulating material layer 821a is, for example, between 0.4 and 0.9. In another aspect, in this embodiment, the insulating material layer 821a is made of silicon oxide, for example, and the insulating material layer 821b is made of silicon nitride, for example, but the invention is not limited thereto.

Next, referring to fig. 8G, using the patterned organic layer 822 as a mask, a portion of the insulating material layer 821a and a portion of the insulating material layer 821b are removed to form an insulating layer 823a, an insulating layer 823b, an opening O exposing the electrode 813, and an opening P exposing the electrode 820. In this embodiment, the method for forming the patterned organic layer 822 includes (but is not limited to) the following steps: first, an organic material layer (not shown) is conformally formed on a substrate 800; then, forming a patterned photoresist layer (not shown) on the organic material layer, and performing an etching process to remove the organic material layer uncovered by the patterned photoresist layer by using the patterned photoresist layer as a mask; thereafter, the patterned photoresist layer is removed. In this embodiment, the material of the patterned organic layer 822 is, for example (but not limited to): an organic insulating material, an inorganic insulating material, or an organic-inorganic hybrid insulating material. In this embodiment, the method of removing part of the insulating material layer 821a and part of the insulating material layer 821b is, for example (but not limited to): dry etching method.

In this embodiment, the insulating layer 823b is provided on the insulating layer 823a, and the insulating layer 823a and the insulating layer 823b are provided on the sidewall of the light emitting diode main body 819. In addition, in this embodiment, the insulating layer 823a and the insulating layer 823b together form a reflective structure 824 for reflecting light emitted from the light emitting diode main body 819. It is worth mentioning that, as described above, since the led main body 819 has the included angle θ of about 30 to 85 degrees, the reflective structure 824 disposed on the sidewall of the led main body 819 can control the light emitted from the led main body 819 to emit toward the same side of the led main body 819.

Next, referring to fig. 8H, a bonding layer 825 is formed in the opening O and the opening P. In this embodiment, the bonding layer 825 is made of, for example (but not limited to): copper, tin (Sn), or an alloy material thereof. The formation method of the bonding layer 825 includes (but is not limited to) the following steps. First, a bonding material layer (not shown) filling the openings O and P is formed on the substrate 800 by, for example (but not limited to): electrochemical plating or evaporation. Next, the bonding material layer outside the opening O and the opening P is removed to form a bonding layer 825 in the opening O and the opening P, wherein the method of removing the bonding material layer outside the opening O and the opening P is, for example (but not limited to): chemical mechanical polishing, chemical etching, or physical etching.

Next, referring to fig. 8I, a carrier substrate 826 is provided. In this embodiment, the material of the carrier substrate 826 is, for example (but not limited to): glass, plastic or other substrate materials as required. Then, the carrier substrate 826 and the substrate 800 are bonded and paired together to form the structure shown in fig. 8I. In detail, in the present embodiment, the bonding layer 825 is in contact with the carrier substrate 826, and the patterned organic layer 822 is in contact with the carrier substrate 826.

Next, referring to fig. 8J, the substrate 800 is removed. In this embodiment, the method of removing the substrate 800 is, for example (but not limited to): laser lift-off method. Thus, the light emitting diode 827 is substantially completed. In detail, in the present embodiment, the light emitting diode 827 includes a light emitting diode main body 819, a reflective structure 824, an electrode 813, an electrode 820 and a bonding layer 825, wherein the reflective structure 824 is disposed on a sidewall of the light emitting diode main body 819 and includes an insulating layer 823a and an insulating layer 823b, which are sequentially stacked, so that a display device including the light emitting diode 827 may have good light emitting efficiency. In addition, in the present embodiment, the light emitting diode 827 is a flip-chip micro light emitting diode.

It is noted that after the substrate 800 is removed, any person skilled in the art will understand that any well-known process steps may be adopted to assemble the led 827 into the display device according to different applications.

In addition, in the embodiment of fig. 8A to 8J, the reflective structure 824 has a double-layer structure including the insulating layer 823a and the insulating layer 823b stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 824 may have three or more layers. For example, in one embodiment, the reflective structure 824 may further include another insulating layer, which may have a refractive index different from the refractive index of the insulating layer 823a and the refractive index of the insulating layer 823 b. For example, in one embodiment, the reflective structure 824 may also include the insulating

layers

823a and 823b stacked alternately and repeatedly.

Fig. 9A to 9E are cross-sectional views illustrating a method of manufacturing a display device according to another embodiment of the present invention. Fig. 9A is a step performed after the step of fig. 8F. In addition, the same materials or methods are used for the same or similar components in the embodiments of fig. 9A to 9E and the embodiments of fig. 8A to 8J, so the descriptions about the same components as those in the embodiments of fig. 8A to 8J will not be repeated, and the differences between the two will be mainly described.

Referring to fig. 9A, using the patterned organic layer 922 as a mask, a portion of the insulating material layer 821a, a portion of the insulating material layer 821b, and a portion of the first conductive type semiconductor layer 816 are removed to form an insulating layer 923a, an insulating layer 923b, an opening O exposing the electrode 813, and an opening Q exposing the electrode 820 and the substrate 800. In this embodiment, the method for forming the patterned organic layer 922 includes (but is not limited to) the following steps: first, an organic material layer (not shown) is conformally formed on a substrate 800; then, forming a patterned photoresist layer (not shown) on the organic material layer, and performing an etching process to remove the organic material layer uncovered by the patterned photoresist layer by using the patterned photoresist layer as a mask; thereafter, the patterned photoresist layer is removed. In this embodiment, the material of the patterned organic layer 922 is, for example (but not limited to): an organic insulating material, an inorganic insulating material, or an organic-inorganic hybrid insulating material. In this embodiment, the method of removing the portions of the insulating material layer 821a, the insulating material layer 821b, and the first conductive type semiconductor layer 816 is, for example (but not limited to): dry etching method.

In this embodiment, the insulating layer 923b is disposed on the insulating layer 923a, and the insulating layer 923a and the insulating layer 923b are disposed on a sidewall of the light emitting diode body 819. In addition, in the present embodiment, the insulating layer 923a and the insulating layer 923b together form the reflective structure 924 for reflecting light emitted from the led main body 819. It is worth mentioning that, as described above, since the led main body 819 has the included angle θ of about 30 to 85 degrees, the reflective structure 924 disposed on the sidewall of the led main body 819 can control the light emitted from the led main body 819 to emit toward the same side of the led main body 819.

Next, referring to fig. 9B, a bonding layer 925 is formed in the opening O and the opening Q. In this embodiment, the material of the bonding layer 925 is, for example (but not limited to): copper, tin or alloy materials thereof. The formation method of the bonding layer 925 includes (but is not limited to) the following steps. First, a bonding material layer (not shown) filling the opening O and the opening Q is formed on the substrate 900 by, for example (but not limited to): electrochemical plating or evaporation. Next, the bonding material layer outside the opening O and the opening Q is removed to form a bonding layer 925 in the opening O and the opening Q, wherein the method for removing the bonding material layer outside the opening O and the opening Q is, for example (but not limited to): chemical mechanical polishing, chemical etching or physical etching.

Next, referring to fig. 9C, a carrier substrate 926 is provided. In this embodiment, the material of the carrier substrate 926 is, for example (but not limited to): glass, plastic or a substrate material meeting the requirement. Next, the carrier substrate 926 and the substrate 800 are bonded and paired together to form a structure as shown in fig. 9C. In detail, in the present embodiment, the bonding layer 925 is in contact with the carrier substrate 926, and the patterned organic layer 922 is in contact with the carrier substrate 926.

Next, referring to fig. 9D, the substrate 800 is removed. Since the related description of the method for removing the substrate 800 has been described in detail in the embodiments of fig. 8A to 8J, it is not repeated herein. It is to be noted that, in this embodiment, by removing the substrate 800, a part of the bonding layer 925 can be exposed.

Next, referring to fig. 9E, an electrode 927 is formed over the exposed bonding layer 925. In detail, in this embodiment, the electrode 927 and the electrode 820 are disposed on opposite sides of the first conductive type semiconductor layer 816 and connected to each other by the bonding layer 925. In this embodiment, the material of the electrode 927 is, for example (but not limited to), titanium, aluminum, or an alloy thereof, and the method for forming the electrode 927 is, for example (but not limited to): a photolithography etching process. It should be noted that in this embodiment, the electrode 927 and the electrode 820 are both N-type electrodes, for example, wherein the electrode 820 and the first conductive type semiconductor layer 816 have good ohmic contact and function as an ohmic contact electrode, and the electrode 927 is used to be connected with an external circuit and function as a connection electrode.

Thus, the led 928 is substantially completed. In detail, in the present embodiment, the light emitting diode 928 includes a light emitting diode body 819, a reflective structure 924, an electrode 813, an electrode 820, an electrode 927 and a bonding layer 925, wherein the reflective structure 924 is disposed on a sidewall of the light emitting diode body 819 and includes an insulating layer 923a and an insulating layer 923b stacked in sequence, so that a display device including the light emitting diode 928 has good light emitting efficiency. In the present embodiment, the light emitting diode 928 is a flip chip micro light emitting diode.

It is noted that after the electrode 927 is formed, any person skilled in the art will understand that any well-known process steps may be used to assemble the led 928 into the display device according to different applications.

In addition, in the embodiment of fig. 9A to 9E, the reflective structure 924 is a dual-layer structure including the insulating layer 923a and the insulating layer 923b stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 924 may have three or more layers. For example, in one embodiment, the reflective structure 924 may further include another insulating layer, and the refractive index of the another insulating layer may be different from the refractive index of the insulating layer 923a and the refractive index of the insulating layer 923 b. For example, in one embodiment, the reflective structure 924 may also include the insulating

layers

923a and 923b stacked repeatedly in an alternating manner.

In the embodiments of fig. 8A to 8J and 9A to 9E, the reflective structure is formed by two insulating layers (i.e., the reflective structure 824 in the embodiments of fig. 8A to 8J is formed by the insulating layer 823a and the insulating layer 823b, and the reflective structure 924 in the embodiments of fig. 9A to 9E is formed by the insulating layer 923a and the insulating layer 923 b), but the present invention is not limited thereto. In other embodiments, the reflective structure may be composed of an insulating layer and a reflective metal layer. In other embodiments, the reflective structure may be formed by a reflective metal layer. Hereinafter, the detailed description will be made based on fig. 10A to 10E and fig. 11A to 11G.

Fig. 10A to 10E are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention. Fig. 10A is a sequence of steps performed after fig. 8D. In addition, the same materials or methods are used for the same or similar components in the embodiments of fig. 10A to 10E and the embodiments of fig. 8A to 8J, so the descriptions about the same components as those in the embodiments of fig. 8A to 8J will not be repeated, and the differences between the two will be mainly described.

Referring to fig. 10A, first, an insulating material layer 1020 is formed on a substrate 800. In detail, in the present embodiment, the insulating material layer 1020 is conformally formed on the substrate 800. In the present embodiment, the material of the insulating material layer 1020 is, for example (but not limited to): silicon oxide or silicon nitride; methods of forming the insulating material layer 1020 are, for example (but not limited to): chemical vapor deposition or physical vapor deposition.

Next, referring to fig. 10B, using the patterned photoresist layer 1021 as a mask, a portion of the insulating material layer 1020 is removed to form an insulating layer 1022 and an opening R exposing the electrode 813. In detail, in this embodiment, the insulating layer 1022 is disposed on a sidewall of the light emitting diode main body 819. In this embodiment, the method of forming the patterned photoresist layer 1021 is, for example (but not limited to): and (5) performing a photolithography process. In this embodiment, the method for removing the portion of the insulating material layer 1020 is, for example (but not limited to): dry etching method.

Next, referring to fig. 10C, the patterned photoresist layer 1021 is removed. In this embodiment, the method of removing the patterned photoresist layer 1021 is, for example (but not limited to): a wet method using a stripping solution or a dry method using plasma ashing.

Next, an electrode 1023 and a conductive layer 1024 are formed, wherein the electrode 1023 covers the insulating layer 1022 and contacts the first conductive type semiconductor layer 816, and the conductive layer 1024 fills the opening R and contacts the electrode 813. In detail, in the present embodiment, the electrode 1023 and the conductive layer 1024 are, for example, the same film layer and have the same material. That is, in the present embodiment, the electrode 1023 and the conductive layer 1024 are formed together in the same photolithography process. In this embodiment, the material of the electrode 1023 and the conductive layer 1024 is a metal material, such as (but not limited to): aluminum, silver or alloy materials thereof. In this embodiment, electrode 1023 is an N-type electrode, for example.

It should be noted that, in the present embodiment, the insulating layer 1022 and the electrode 1023 disposed on the insulating layer 1022 together form a reflection structure 1025 for reflecting light emitted from the light emitting diode main body 819. That is, in the present embodiment, the electrode 1023 has the functions of transmitting signals and reflecting light, so the electrode 1023 can also be regarded as a reflective metal layer. In addition, as described above, since the led body 819 has the included angle θ of about 30 to 85 degrees, the reflective structure 1025 disposed on the sidewall of the led body 819 can control the light emitted from the led body 819 to the same side of the led body 819. In the present embodiment, insulating layer 1022 and electrode 1023 together form reflection structure 1025, but the present invention is not limited thereto. In other embodiments, reflective structure 1025 may include only electrode 1023.

Next, referring to fig. 10D, a carrier substrate 1026 is provided. In this embodiment, the material of the carrier substrate 1026 is, for example (but not limited to): glass, plastic or other substrate materials as required. Next, the carrier substrate 1026 and the substrate 800 are bonded and paired together to form a structure as shown in fig. 10E. In detail, in the present embodiment, the electrode 1023 is in contact with the carrier substrate 1026, and the conductor layer 1024 is in contact with the carrier substrate 1026.

Next, referring to fig. 10E, the substrate 800 is removed. Since the related description of the method for removing the substrate 800 has been described in detail in the embodiments of fig. 8A to 8J, it is not repeated herein. Thus, the fabrication of the light emitting diode 1027 is substantially completed. In detail, in this embodiment, the light emitting diode 1027 includes a light emitting diode main body 819, a reflective structure 1025, an electrode 813 and a conductive layer 1024, wherein the reflective structure 1025 is disposed on a sidewall of the light emitting diode main body 819 and includes an insulating layer 1022 and an electrode 1023 stacked in sequence, so that a display device including the light emitting diode 1027 has good light emitting efficiency. In this embodiment, the light emitting diode 1027 is a flip-chip micro light emitting diode.

It is noted that after the substrate 800 is removed, any skilled person will understand that any well-known process steps may be used to assemble the light emitting diodes 1027 in the display device according to different applications.

In addition, in the embodiment of fig. 10A to 10E, the reflective structure 1025 is a dual-layer structure including the insulating layer 1022 and the electrode 1023 stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 1025 may have three or more layers. For example, in one embodiment, reflective structure 1025 may further comprise another insulating layer between insulating layer 1022 and electrode 1023, which has a refractive index different from that of insulating layer 1022.

Fig. 11A to 11G are cross-sectional flow diagrams illustrating a method for manufacturing a display device according to another embodiment of the present invention. Fig. 11A is a step performed after the step of fig. 8C. In addition, the same materials or methods are used for the same or similar components in the embodiments of fig. 11A to 11G and the embodiments of fig. 8A to 8J, so the descriptions about the same components as those in the embodiments of fig. 8A to 8J will not be repeated, and the differences between the two will be mainly described.

Referring to fig. 11A, first, a portion of the first conductive type semiconductor material layer 810, a portion of the body material layer 811, and a portion of the second conductive type semiconductor material layer 812 are removed using the heated patterned photoresist layer 815 as a mask to form a first conductive type semiconductor layer 1116, an active layer 1117, and a second conductive type semiconductor layer 1118. In detail, in the present embodiment, the first conductive type semiconductor layer 1116, the active layer 1117 and the second conductive type semiconductor layer 1118 form an led body 1119, wherein the led body 1119 has an included angle θ, and the included angle θ is about 30 degrees to 85 degrees, preferably about 60 degrees. In this embodiment, the method of removing part of the first conductive type semiconductor material layer 810, part of the body material layer 811, and part of the second conductive type semiconductor material layer 812 is, for example (but not limited to): dry etching method. In this embodiment mode, the first conductive type semiconductor layer 1116 is an N-type semiconductor layer, for example, and the second conductive type semiconductor layer 1118 is a P-type semiconductor layer, for example.

Next, after the first conductive type semiconductor layer 1116, the active layer 1117, and the second conductive type semiconductor layer 1118 are formed, the patterned photoresist layer 815 having the heated flow is removed. In this embodiment, the method of removing the heated patterned photoresist layer 815 is, for example (but not limited to): wet methods using a stripping solution or ashing with plasma).

Next, referring to fig. 11B, an electrode 1120 is formed on the substrate 800. In detail, in this embodiment mode, the electrode 1120 is in contact with the first conductive type semiconductor layer 1116. In this embodiment, the electrode 1120 is in contact with the substrate 800. In this embodiment, the material of the electrode 1120 is, for example (but not limited to): a titanium aluminum (Ti/Al) alloy, Ti, or Al, and a method of forming the electrode 1120 is, for example (but not limited to): a photolithography etching process. In this embodiment, the electrode 1120 is an N-type electrode, for example.

Next, referring to fig. 11C, an insulating material layer 1121 is formed on the substrate 800. In detail, in the present embodiment, the insulating material layer 1121 is conformally formed on the substrate 800. In this embodiment, the material of the insulating material layer 1121 is, for example (but not limited to): silicon oxide or silicon nitride; the method of forming the insulating material layer 1121 is, for example (but not limited to): chemical vapor deposition or physical vapor deposition.

Next, referring to fig. 11D, the patterned photoresist layer 1122 is used as a mask to remove a portion of the insulating material layer 1121, so as to form an insulating layer 1123 and an opening U exposing the electrode 813. In detail, in this embodiment mode, the insulating layer 1123 is disposed on the sidewall of the light emitting diode body 1119. In this embodiment, the patterned photoresist layer 1122 can be formed, for example (but not limited to): and (5) performing a photolithography process. In this embodiment, the method for removing the portion of the insulating material layer 1121 is, for example (but not limited to): dry etching method.

Next, referring to fig. 11E, the patterned photoresist layer 1122 is removed. In this embodiment, the method of removing the patterned photoresist layer 1122 is, for example (but not limited to): a wet method using a stripping solution or a dry method using plasma ashing.

Next, a conductive layer 1124 is formed, wherein the conductive layer 1124 covers the insulating layer 1123 and fills the opening U to contact the electrode 813. In this embodiment, the material of the conductive layer 1124 is a metal material, such as (but not limited to): aluminum, silver or alloy materials thereof. In this embodiment, the conductive layer 1124 is formed, for example (but not limited to): a photolithography etching process.

It should be noted that in the present embodiment, the electrode 813 and the conductive layer 1124 are both P-type electrodes, wherein the electrode 813 and the second conductive type semiconductor layer 1118 have good ohmic contact and function as ohmic contact electrodes, and the conductive layer 1124 is used to connect with an external circuit and function as a connection electrode. On the other hand, in the present embodiment, the insulating layer 1123 and the conductive layer 1124 disposed on the insulating layer 1123 together form a reflective structure 1125 for reflecting the light emitted from the led body 1119. That is, in the present embodiment, the conductive layer 1124 has the function of transmitting signals and reflecting light, so the conductive layer 1124 can also be regarded as a reflective metal layer. In addition, as mentioned above, since the led body 1119 has the included angle θ of about 30 to 85 degrees, the reflective structure 1125 disposed on the sidewall of the led body 1119 can control the light emitted from the led body 1119 to emit toward the same side of the led body 1119.

Next, referring to fig. 11F, a carrier substrate 1126 is provided. In this embodiment, the carrier substrate 1126 is made of, for example (but not limited to): glass, plastic or a substrate material meeting the requirement. Next, the carrier substrate 1126 and the substrate 800 are bonded and paired together, thereby forming a structure shown in fig. 11F. In detail, in this embodiment, the conductor layer 1124 is in contact with the carrier substrate 1126.

Next, referring to fig. 11G, the substrate 800 is removed. Since the related description of the method for removing the substrate 800 has been described in detail in the embodiments of fig. 8A to 8J, it is not repeated herein. Thus, the fabrication of the led 1127 is substantially completed. In detail, in the present embodiment, the light emitting diode 1127 includes a light emitting diode body 1119, a reflective structure 1125, an electrode 813 and an electrode 1120, wherein the reflective structure 1125 is disposed on a sidewall of the light emitting diode body 1119 and includes an insulating layer 1123 and a conductive layer 1124 sequentially stacked, whereby a display device including the light emitting diode 1127 may have good light emitting efficiency. In addition, in the present embodiment, the light emitting diode 1127 is a flip chip type micro light emitting diode.

It is noted that after the substrate 800 is removed, any skilled person will understand that any well-known process steps may be used to assemble the led 1127 in the display device according to different applications.

In addition, in the embodiment of fig. 11A to 11G, the reflective structure 1125 is a double-layer structure including the insulating layer 1123 and the conductive layer 1124 stacked in sequence, but the invention is not limited thereto. In other embodiments, the reflective structure 1125 may have three or more layers. For example, in one embodiment, the reflective structure 1125 may further include another insulating layer between the insulating layer 1123 and the conductive layer 1124 having a refractive index different from that of the insulating layer 1123.

In summary, in the display device of the present invention, in the direction perpendicular to the substrate, a ratio of a distance between two surfaces of the light emitting diodes, which are oppositely disposed and parallel to the substrate, to a distance between an upper surface of the metal layer electrically connected to the transistor and the light emitting diode and the substrate is greater than or equal to 0.25 and less than or equal to 6, so that the display device has good light emitting efficiency or good structural strength. In addition, the display device manufactured by the manufacturing method of the display device comprises the reflecting structure arranged on the side wall of the light emitting diode main body, so that the display device has good luminous efficiency.

Although the present invention has been described with reference to the above embodiments, it should be understood that various changes and modifications can be made therein by those skilled in the art without departing from the spirit and scope of the invention.

Claims

1. A display device, comprising:

a substrate;

a transistor disposed on the substrate;

a metal layer disposed on the transistor and electrically connected to the transistor, wherein a first distance is formed between an upper surface of the metal layer and the substrate in a direction perpendicular to the substrate;

a light emitting diode disposed on the metal layer, wherein the light emitting diode includes a light emitting diode body and an electrode, the light emitting diode body is electrically connected to the metal layer through the electrode, the light emitting diode body has a first surface and a second surface opposite to the first surface, the first surface and the second surface are parallel to the substrate, and a second distance is formed between the first surface and the second surface in the direction;

a wavelength conversion layer disposed on the light emitting diode; and

a light-shielding pattern layer disposed corresponding to the wavelength conversion layer,

wherein a ratio of the second distance to the first distance is greater than or equal to 0.25 and less than or equal to 6.

2. The display device according to claim 1, wherein a ratio of the second distance to the first distance is 0.6 or more and 5 or less.

3. The display device of claim 1, wherein the light emitting diode further comprises a buffer layer disposed on the light emitting diode body, wherein a top surface of the buffer layer has a plurality of grooves.

4. The display device of claim 1, wherein the light emitting diode body comprises:

a first conductive type semiconductor layer;

an active layer disposed on the first conductive type semiconductor layer; and

and the second conductive type semiconductor layer is configured on the active layer.

5. The display device according to claim 4, wherein the second conductivity type semiconductor layer has the second surface, and the second surface has a plurality of grooves.

6. The display device of claim 1, wherein the light emitting diode further comprises a reflective structure disposed on a sidewall of the light emitting diode body, and the reflective structure comprises:

a first insulating layer; and

a second insulating layer disposed on the first insulating layer, wherein a refractive index of the first insulating layer is different from a refractive index of the second insulating layer.

7. The display device of claim 1, wherein the light emitting diode further comprises a reflective structure disposed on a sidewall of the light emitting diode body, and the reflective structure comprises a reflective metal layer.

8. A method of manufacturing a display device, comprising:

forming a light emitting diode body on a substrate, wherein a method of forming the light emitting diode body comprises:

sequentially forming a first conductive type semiconductor material layer, an active material layer and a second conductive type semiconductor material layer on the substrate;

forming a first patterned photoresist layer on the second conductive type semiconductor material layer, wherein the first patterned photoresist layer is formed by a half tone (half tone) process;

performing a thermal flow (reflow) process on the first patterned photoresist layer; and

removing a portion of the first conductive type semiconductor material layer, a portion of the active material layer, and a portion of the second conductive type semiconductor material layer using the heated first patterned photoresist layer as a mask to form a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer; and

forming a reflective structure on a sidewall of the light emitting diode body, wherein a method of forming the reflective structure comprises:

sequentially forming a first material layer and a second material layer on the light emitting diode main body;

using the second patterned photoresist layer as a mask to perform a first etching process on the second material layer; and

and performing a second etching process on the first material layer by using the second patterned photoresist layer as a mask, wherein the same mask is used for the first etching process and the second etching process, and the edge of the etched first material layer protrudes out of the edge of the etched second material layer.

9. The method for manufacturing a display device according to claim 8, wherein the first material layer is made of an insulating material, the second material layer is made of a metal material, the first etching process is a wet etching process, and the second etching process is a dry etching process.

10. The method for manufacturing a display device according to claim 8, wherein the first material layer and the second material layer are made of an insulating material, a refractive index of the first material layer is different from a refractive index of the second material layer, and the first etching process and the second etching process are dry etching processes in which an etching rate of the first material layer is smaller than an etching rate of the second material layer.

11. The method for manufacturing a display device according to claim 8, further comprising, after forming the reflective structure:

forming a conductor layer on the substrate, the conductor layer covering the second patterned photoresist layer and the second conductive type semiconductor layer; and

removing the second patterned photoresist layer and the conductor layer covering the second patterned photoresist layer, while leaving the conductor layer covering the second conductive type semiconductor layer, wherein the conductor layer covering the second conductive type semiconductor layer serves as a first electrode.

12. The method for manufacturing a display device according to claim 11, further comprising forming a second electrode over the first conductive type semiconductor layer after forming the first electrode.