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TW202015104A - Method for manufacturing semipolar free-standing substrate - Google Patents

Method for manufacturing semipolar free-standing substrate Download PDF

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TW202015104A
TW202015104A TW108129956A TW108129956A TW202015104A TW 202015104 A TW202015104 A TW 202015104A TW 108129956 A TW108129956 A TW 108129956A TW 108129956 A TW108129956 A TW 108129956A TW 202015104 A TW202015104 A TW 202015104A
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substrate
semi
polar
nitride semiconductor
group iii
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TW108129956A
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後藤裕輝
石原裕次郎
布田将一
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日商古河機械金屬股份有限公司
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/34Nitrides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • C30B25/18Epitaxial-layer growth characterised by the substrate
    • C30B25/20Epitaxial-layer growth characterised by the substrate the substrate being of the same materials as the epitaxial layer
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/38Nitrides

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  • Crystallography & Structural Chemistry (AREA)
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  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
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Abstract

The present invention provides a method for producing a semi-polar self-supporting substrate, in which a preparation step (S10) wherein a semi-polar seed substrate that is composed of a group III nitride semiconductor is prepared, said seed substrate having a semi-polar surface as a main surface, a group III nitride semiconductor layer formation step (S20) wherein a group III nitride semiconductor layer is formed by epitaxially growing a group III nitride semiconductor on the semi-polar seed substrate, a cut-out step (S30) wherein a semi-polar self-supporting substrate, which has the semi-polar surface as a main surface, is cut out from the group III nitride semiconductor layer, and a processing step (S40) wherein all the remaining group III nitride semiconductor layer is removed from the semi-polar seed substrate on which a part of the group III nitride semiconductor layer remains are performed, and subsequently the group III nitride semiconductor layer formation step and the cut-out step are performed, while reusing the semi-polar seed substrate.

Description

半極性獨立基板之製造方法Method for manufacturing semi-polar independent substrate

本發明係關於一種半極性獨立基板之製造方法。The invention relates to a method for manufacturing a semi-polar independent substrate.

於專利文獻1中,揭示有一種技術,該技術係於具有藍寶石基板、及高密度地產生有孔隙之GaN結晶薄膜之基底基板上使GaN結晶厚膜生長,其後,將GaN結晶厚膜剝離,去除GaN結晶薄膜後,再利用藍寶石基板進行該步驟。Patent Document 1 discloses a technique for growing a thick GaN crystal film on a base substrate having a sapphire substrate and a GaN crystal thin film with high density of pores, and then peeling off the thick GaN crystal film After removing the GaN crystal film, this step is performed using a sapphire substrate.

於專利文獻2中,揭示有一種技術,該技術係於氮化物半導體基板上使氮化物半導體磊晶層生長後,將氮化物半導體磊晶層自氮化物半導體基板分離,其後,對氮化物半導體基板進行表面處理,再利用經表面處理之氮化物半導體基板進行該步驟。Patent Literature 2 discloses a technique for growing a nitride semiconductor epitaxial layer on a nitride semiconductor substrate, separating the nitride semiconductor epitaxial layer from the nitride semiconductor substrate, and thereafter, the nitride The semiconductor substrate is subjected to surface treatment, and then the surface-treated nitride semiconductor substrate is used to perform this step.

於專利文獻3中,揭示有一種技術,該技術係於接合包含氮化物半導體之矩形之結晶片而得之基底基板上形成氮化物半導體層後,將氮化物半導體層自基底基板分離,其後,再利用基底基板進行該步驟。In Patent Document 3, there is disclosed a technique in which a nitride semiconductor layer is formed on a base substrate obtained by joining rectangular crystal sheets containing a nitride semiconductor, and the nitride semiconductor layer is separated from the base substrate, and thereafter , And then use the base substrate to perform this step.

於專利文獻4中,揭示有一種技術,該技術係於氮化物半導體基板之表面附近注入離子後,藉由熱處理於氮化物半導體基板上貼合矽基板,以經離子注入之層為分界將氮化物半導體基板之大部分自矽基板剝離,其後,再利用去除經離子注入之層而得之氮化物半導體基板進行該步驟。Patent Document 4 discloses a technique in which after implanting ions near the surface of a nitride semiconductor substrate, a silicon substrate is bonded to the nitride semiconductor substrate by heat treatment, and nitrogen is implanted with the ion-implanted layer as a boundary Most of the compound semiconductor substrate is peeled off from the silicon substrate, and then, this step is performed using the nitride semiconductor substrate obtained by removing the ion-implanted layer.

於專利文獻5中,揭示有一種技術,該技術係於氮化物半導體基板之上積層用於構成元件之複數個氮化物半導體層而形成上層部後,將上層部自氮化物半導體基板分離,其後,再利用氮化物半導體基板進行該步驟。Patent Literature 5 discloses a technique in which a plurality of nitride semiconductor layers constituting an element are stacked on a nitride semiconductor substrate to form an upper layer portion, and then the upper layer portion is separated from the nitride semiconductor substrate. After that, this step is performed again using a nitride semiconductor substrate.

於專利文獻6及7中,揭示有一種於藍寶石基板上形成以半極性面為主面之III族氮化物半導體層之方法。 先前技術文獻 專利文獻Patent Documents 6 and 7 disclose a method of forming a group III nitride semiconductor layer with a semipolar surface as a main surface on a sapphire substrate. Prior technical literature Patent Literature

專利文獻1:日本專利特開2012-158497號公報 專利文獻2:日本專利特開2014-166953號公報 專利文獻3:日本專利特開2015-187043號公報 專利文獻4:日本專利特開2006-210660號公報 專利文獻5:日本專利特開2007-73569號公報 專利文獻6:日本專利第6266742號 專利文獻7:日本專利第6232150號Patent Literature 1: Japanese Patent Laid-Open No. 2012-158497 Patent Document 2: Japanese Patent Laid-Open No. 2014-166953 Patent Document 3: Japanese Patent Laid-Open No. 2015-187043 Patent Document 4: Japanese Patent Laid-Open No. 2006-210660 Patent Literature 5: Japanese Patent Laid-Open No. 2007-73569 Patent Literature 6: Japanese Patent No. 6266742 Patent Document 7: Japanese Patent No. 6232150

[發明所欲解決之問題][Problems to be solved by the invention]

本發明人等對以下技術進行研究,即,於包含III族氮化物半導體之晶種基板上形成III族氮化物半導體層,繼而將III族氮化物半導體層自晶種基板分離而獲得獨立基板,之後再利用已將III族氮化物半導體層分離之晶種基板進行該步驟,結果發現如下問題。The inventors of the present invention have studied the technique of forming a group III nitride semiconductor layer on a seed substrate including a group III nitride semiconductor, and then separating the group III nitride semiconductor layer from the seed substrate to obtain an independent substrate, Afterwards, this step was performed using the seed substrate on which the group III nitride semiconductor layer was separated, and as a result, the following problems were found.

詳細內容係藉由以下之實施例示出,於上述技術中當在晶種基板上藉由c面生長而形成有III族氮化物半導體層時,III族氮化物半導體層之表面容易產生孔或裂痕。結果,所獲得之獨立基板之表面亦容易產生孔或裂痕。專利文獻1至7均未對該問題及其解決方法予以揭示。The details are shown by the following examples. In the above technique, when a group III nitride semiconductor layer is formed on the seed substrate by c-plane growth, holes or cracks are easily generated on the surface of the group III nitride semiconductor layer . As a result, holes or cracks are easily generated on the surface of the obtained independent substrate. Patent documents 1 to 7 do not disclose the problem and its solution.

本發明之課題在於,於以下技術中改善所獲得之獨立基板之表面狀態,該技術係於包含III族氮化物半導體之晶種基板上形成III族氮化物半導體層,繼而將III族氮化物半導體層自晶種基板分離而獲得獨立基板,之後再利用已將III族氮化物半導體層分離之晶種基板進行該步驟。 [解決問題之技術手段]The object of the present invention is to improve the surface condition of the obtained independent substrate by forming a group III nitride semiconductor layer on a seed substrate containing a group III nitride semiconductor and then applying a group III nitride semiconductor The layers are separated from the seed substrate to obtain an independent substrate, and then this step is performed using the seed substrate that has separated the group III nitride semiconductor layer. [Technical means to solve the problem]

根據本發明, 提供一種半極性獨立基板之製造方法,其執行:準備步驟,其係準備以半極性面為主面且包含III族氮化物半導體之半極性晶種基板; III族氮化物半導體層形成步驟,其係於上述半極性晶種基板之上使III族氮化物半導體磊晶生長,而形成III族氮化物半導體層; 切下步驟,其係自上述III族氮化物半導體層切下以半極性面為主面之半極性獨立基板;及 加工步驟,其係於上述切下步驟之後,自殘存有上述III族氮化物半導體層之一部分之上述半極性晶種基板去除所有上述III族氮化物半導體層;之後再利用去除上述III族氮化物半導體層後之上述半極性晶種基板,進行上述III族氮化物半導體層形成步驟及上述切下步驟。 [發明之效果]According to the invention, Provided is a manufacturing method of a semipolar independent substrate, which performs: a preparation step, which is to prepare a semipolar seed substrate with a semipolar surface as a main surface and containing a group III nitride semiconductor; A step of forming a group III nitride semiconductor layer, which is to epitaxially grow a group III nitride semiconductor on the above semi-polar seed substrate to form a group III nitride semiconductor layer; A cutting step, which is to cut a semipolar independent substrate with a semipolar plane as its main surface from the above-mentioned group III nitride semiconductor layer; and The processing step is to remove all the group III nitride semiconductor layer from the semi-polar seed substrate remaining a part of the group III nitride semiconductor layer after the cutting step; and then use the group III nitride to remove The semi-polar seed crystal substrate after the semiconductor layer is subjected to the group III nitride semiconductor layer forming step and the cutting step. [Effect of invention]

根據本發明,於以下技術中所獲得之獨立基板之表面狀態變得良好,該技術係於包含III族氮化物半導體之晶種基板上形成III族氮化物半導體層,繼而將III族氮化物半導體層自晶種基板分離而獲得獨立基板,之後再利用已將III族氮化物半導體層分離之晶種基板進行該步驟。According to the present invention, the surface state of the independent substrate obtained in the following technique is formed by forming a group III nitride semiconductor layer on a seed substrate including a group III nitride semiconductor and then applying the group III nitride semiconductor The layers are separated from the seed substrate to obtain an independent substrate, and then this step is performed using the seed substrate that has separated the group III nitride semiconductor layer.

以下,使用圖式對本發明之半極性獨立基板之製造方法之實施形態進行說明。再者,圖只不過是用於說明發明之構成之概略圖,各構件之大小、形狀、數量及不同構件之大小之比率等並不限定於圖示。Hereinafter, an embodiment of the method for manufacturing a semipolar independent substrate of the present invention will be described using drawings. In addition, the drawings are only schematic diagrams for explaining the structure of the invention, and the size, shape, number, and ratio of the sizes of the various members are not limited to the drawings.

<第1實施形態> 「整體情況及概略」 圖1之流程圖表示本實施形態之半極性獨立基板之製造方法之處理流程的一例。如圖示,於本實施形態之半極性獨立基板之製造方法中,依序進行準備步驟S10、III族氮化物半導體層形成步驟S20、切下步驟S30及加工步驟S40。<First Embodiment> "Overall situation and overview" The flowchart of FIG. 1 shows an example of the processing flow of the manufacturing method of the semipolar independent substrate of this embodiment. As shown in the figure, in the manufacturing method of the semipolar independent substrate of this embodiment, the preparation step S10, the group III nitride semiconductor layer forming step S20, the cutting step S30, and the processing step S40 are sequentially performed.

此處,使用圖2之步驟圖對各步驟之概略進行說明。Here, the outline of each step will be described using the step diagram of FIG. 2.

於準備步驟S10中,如圖2(1)所示,準備以半極性面為主面且包含III族氮化物半導體之半極性晶種基板1。In the preparation step S10, as shown in FIG. 2(1), a semipolar seed substrate 1 including a group III nitride semiconductor with a semipolar surface as the main surface is prepared.

於III族氮化物半導體層形成步驟S20中,如圖2(2)所示,於半極性晶種基板1之上使III族氮化物半導體磊晶生長,而形成III族氮化物半導體層2。In the group III nitride semiconductor layer forming step S20, as shown in FIG. 2(2), the group III nitride semiconductor is epitaxially grown on the semipolar seed substrate 1 to form the group III nitride semiconductor layer 2.

於切下步驟S30中,如圖2(3)所示,將III族氮化物半導體層2之一部分(III族氮化物半導體層之分離部2-2)自半極性晶種基板1分離,而獲得以半極性面為主面之半極性獨立基板。再者,亦可對III族氮化物半導體層之分離部2-2進行切片而獲得複數個半極性獨立基板。In the cutting step S30, as shown in FIG. 2(3), a part of the group III nitride semiconductor layer 2 (the separation part 2-2 of the group III nitride semiconductor layer) is separated from the semipolar seed substrate 1, and A semipolar independent substrate with a semipolar surface as the main surface was obtained. Furthermore, a plurality of semi-polar independent substrates may be obtained by slicing the separation portion 2-2 of the group III nitride semiconductor layer.

於加工步驟S40中,對殘存有III族氮化物半導體層2之一部分(III族氮化物半導體層之殘存部2-1)之半極性晶種基板1進行加工,而去除III族氮化物半導體層之殘存部2-1。In the processing step S40, the semi-polar seed substrate 1 in which a part of the group III nitride semiconductor layer 2 (the remaining portion 2-1 of the group III nitride semiconductor layer) remains is processed to remove the group III nitride semiconductor layer残残部2-1 2-1.

其後,再利用去除III族氮化物半導體層之殘存部2-1後之半極性晶種基板1,執行III族氮化物半導體層形成步驟S20及切下步驟S30。再者,亦可進而進行加工步驟S40而將半極性晶種基板1進行複數次再利用。Thereafter, using the semipolar seed substrate 1 after removing the remaining portion 2-1 of the group III nitride semiconductor layer, the group III nitride semiconductor layer forming step S20 and the cutting step S30 are performed. Furthermore, the processing step S40 may be further performed to reuse the semipolar seed substrate 1 a plurality of times.

其次,對各步驟詳細地進行說明。Next, each step will be described in detail.

「準備步驟S10」 於準備步驟S10中,如圖2(1)所示,準備以半極性面為主面且包含III族氮化物半導體之半極性晶種基板1。半極性晶種基板1之主面可例示{-1-12-3}面、自{-1-12-3}面具有15°以內之偏離角之面、{-1-12-4}面及{-1-12-2}面等,但並不限定於該等。"Preparation Step S10" In the preparation step S10, as shown in FIG. 2(1), a semipolar seed substrate 1 including a group III nitride semiconductor with a semipolar surface as the main surface is prepared. The main surface of the semi-polar seed crystal substrate 1 can be exemplified by the {-1-12-3} plane, the plane with a deviation angle of less than 15° from the {-1-12-3} plane, the {-1-12-4} plane And {-1-12-2}, etc., but not limited to these.

於準備步驟S10中,藉由執行圖3之流程圖所示之處理而製造半極性晶種基板1。如圖3所示,於準備步驟S10中,依序進行固著步驟S11、第1生長步驟S12、冷卻步驟S13、第2生長步驟S14及晶種基板切下步驟S15。In the preparation step S10, the semipolar seed substrate 1 is manufactured by performing the process shown in the flowchart of FIG. As shown in FIG. 3, in the preparation step S10, the fixing step S11, the first growth step S12, the cooling step S13, the second growth step S14, and the seed substrate cutting step S15 are sequentially performed.

於固著步驟S11中,將基底基板固著於基座。例如如圖4(2)所示,使如圖4(1)所示之基底基板10固著於之基座20。In the fixing step S11, the base substrate is fixed to the base. For example, as shown in FIG. 4(2), the base 20 to which the base substrate 10 shown in FIG. 4(1) is fixed is fixed.

基底基板10包含以半極性面為主面之III族氮化物半導體層12。III族氮化物半導體層12例如為GaN層。The base substrate 10 includes a group III nitride semiconductor layer 12 having a semipolar surface as a main surface. The group III nitride semiconductor layer 12 is, for example, a GaN layer.

半極性面係除極性面及非極性面以外之面。III族氮化物半導體層12之主面(圖中露出之面)可為+c側之半極性面(Ga極性側之半極性面:以密勒指數(hkml)表示,l大於0之半極性面),亦可為-c側之半極性面(N極性側之半極性面:以密勒指數(hkml)表示,l未達0之半極性面)。The semi-polar plane is a plane other than the polar plane and the non-polar plane. The main surface of the III-nitride semiconductor layer 12 (the exposed surface in the figure) may be a semi-polar surface on the +c side (semi-polar surface on the Ga polar side: expressed by the Miller index (hkml), and a semi-polarity where l is greater than 0 Surface), or a semi-polar surface on the -c side (semi-polar surface on the N-polar side: expressed by the Miller index (hkml), and a semi-polar surface with l not reaching 0).

基底基板10可為包含除III族氮化物半導體層12以外之層之積層體,亦可為僅III族氮化物半導體層12之單層。作為積層體之例,例如可例示如圖4(1)所示依序積層藍寶石基板11、緩衝層(圖中省略)及III族氮化物半導體層12而得之積層體,然而,並不限定於此。例如亦可用其他異質基板代替藍寶石基板11。又,可不包含緩衝層。又,亦可包含其他層。The base substrate 10 may be a laminate including layers other than the group III nitride semiconductor layer 12, or may be a single layer of only the group III nitride semiconductor layer 12. As an example of the layered body, for example, a layered body in which the sapphire substrate 11, the buffer layer (omitted in the figure) and the group III nitride semiconductor layer 12 are sequentially stacked as shown in FIG. 4(1) can be exemplified, however, it is not limited Here. For example, the sapphire substrate 11 may be replaced with another heterogeneous substrate. In addition, a buffer layer may not be included. In addition, other layers may be included.

基底基板10之製造方法並無特別限制,可採用所有技術。例如亦可於成為特定之面方位之藍寶石基板11上,藉由MOCVD(metal organic chemical vapor deposition,有機金屬化學氣相沈積)法介隔緩衝層使III族氮化物半導體磊晶生長,藉此形成III族氮化物半導體層12。於該情形時,藉由對如下條件等進行調整而形成主面成為N極性側及Ga極性側中之任一者之所需之半極性面的III族氮化物半導體層12,上述條件係指藍寶石基板11之主面之面方位、對形成緩衝層之前之藍寶石基板11進行熱處理時之氮化處理之有無、形成緩衝層時之生長條件、形成III族氮化物半導體層12時之生長條件、對藍寶石基板11之主面上供給含金屬之氣體(例:三甲基鋁、三乙基鋁)而形成金屬膜及碳化金屬膜之處理、或形成緩衝層或III族氮化物半導體層12時之生長條件。詳細內容揭示於專利文獻6及7。The manufacturing method of the base substrate 10 is not particularly limited, and all techniques can be used. For example, a group III nitride semiconductor may be epitaxially grown by a MOCVD (metal organic chemical vapor deposition, organic metal chemical vapor deposition) method on a sapphire substrate 11 that has a specific surface orientation. Group III nitride semiconductor layer 12. In this case, by adjusting the following conditions and the like to form a group III nitride semiconductor layer 12 having a desired semipolar plane whose main surface becomes either the N polar side or the Ga polar side, the above conditions refer to The orientation of the main surface of the sapphire substrate 11, the presence or absence of nitriding treatment when the sapphire substrate 11 before the buffer layer is heat-treated, the growth conditions when forming the buffer layer, the growth conditions when forming the group III nitride semiconductor layer 12, When a metal-containing gas (eg, trimethyl aluminum, triethyl aluminum) is supplied to the main surface of the sapphire substrate 11 to form a metal film and a metal carbide film, or when forming a buffer layer or a group III nitride semiconductor layer 12 Growth conditions. The details are disclosed in Patent Documents 6 and 7.

作為基底基板10之製造方法之其他例,可對進行c面生長而獲得之III族氮化物半導體層進行加工(例:切片等),獲得以所需之半極性面為主面之III族氮化物半導體層(基底基板10)。As another example of the manufacturing method of the base substrate 10, a group III nitride semiconductor layer obtained by growing on the c-plane can be processed (eg, slicing, etc.) to obtain a group III nitrogen having the desired semipolar plane as the main surface Compound semiconductor layer (base substrate 10).

III族氮化物半導體層12之最大直徑例如為Φ50 mm以上Φ6英吋以下。III族氮化物半導體層12之厚度例如為50 nm以上1 mm以下。藍寶石基板11之直徑例如為Φ50 mm以上Φ6英吋以下。藍寶石基板11之厚度例如為100 μm以上10 mm以下。The maximum diameter of the group III nitride semiconductor layer 12 is, for example, Φ50 mm or more and Φ6 inches or less. The thickness of the group III nitride semiconductor layer 12 is, for example, 50 nm or more and 1 mm or less. The diameter of the sapphire substrate 11 is, for example, Φ50 mm or more and Φ6 inches or less. The thickness of the sapphire substrate 11 is, for example, 100 μm or more and 10 mm or less.

其次,對基座20進行說明。基座20具有不會因由第1生長步驟S12或第2生長步驟S14中之加熱導致翹曲之基底基板10之應力而發生變形之特性等。作為此種基座20之例,可例示碳基座、碳化矽塗層碳基座、氮化硼塗層碳基座及石英基座等,然而並不限定於該等。Next, the base 20 will be described. The susceptor 20 has characteristics such as not to be deformed due to the stress of the warped base substrate 10 caused by the heating in the first growth step S12 or the second growth step S14. As an example of such a susceptor 20, a carbon susceptor, a silicon carbide coated carbon susceptor, a boron nitride coated carbon susceptor, a quartz susceptor, etc. may be exemplified, but it is not limited thereto.

其次,對使基底基板10固著於基座20之方法進行說明。於本實施形態中,如圖4(2)所示,將基底基板10之背面(藍寶石基板11之背面)固著於基座20之面。藉此,抑制基底基板10之變形。作為固著之方法,要求不會因第1生長步驟S12或第2生長步驟S14中之加熱、或可能由該加熱造成翹曲之基底基板10之該翹曲之力等導致剝離之方法。例如可例示使用氧化鋁系、碳系、氧化鋯系、氧化矽系、氮化物系等接著劑而固著之方法。Next, a method of fixing the base substrate 10 to the base 20 will be described. In this embodiment, as shown in FIG. 4(2), the back surface of the base substrate 10 (the back surface of the sapphire substrate 11) is fixed to the surface of the base 20. With this, the deformation of the base substrate 10 is suppressed. As a fixing method, a method that does not cause peeling due to the heating in the first growth step S12 or the second growth step S14 or the warping force of the base substrate 10 that may be warped by the heating is required. For example, a method of fixing using an alumina-based, carbon-based, zirconia-based, silica-based, or nitride-based adhesive can be exemplified.

返回至圖3,於第1生長步驟S12中,如圖4(3)所示,在使基底基板10固著於基座20之狀態下,於III族氮化物半導體層12之主面上利用HVPE(Hydride Vapor Phase Epitaxy,氫化物氣相磊晶)法使III族氮化物半導體生長。藉此,形成包含單晶之III族氮化物半導體之第1生長層30。例如,於以下之生長條件下使GaN磊晶生長,而形成GaN層(第1生長層30)。Returning to FIG. 3, in the first growth step S12, as shown in FIG. 4(3), with the base substrate 10 fixed to the susceptor 20, the main surface of the group III nitride semiconductor layer 12 is used The HVPE (Hydride Vapor Phase Epitaxy) method grows group III nitride semiconductors. With this, the first growth layer 30 including the single crystal group III nitride semiconductor is formed. For example, GaN is epitaxially grown under the following growth conditions to form a GaN layer (first growth layer 30).

生長溫度:900℃~1100℃ 生長時間:1 h~50 h V/III比:1~20 生長膜厚:100 μm~10 mmGrowth temperature: 900℃~1100℃ Growth time: 1 h~50 h V/III ratio: 1~20 Growth film thickness: 100 μm~10 mm

於第1生長步驟S12中,沿著包含基座20、基底基板10及第1生長層30之積層體之側面,形成有多晶之III族氮化物半導體。多晶之III族氮化物半導體附著於上述積層體之側面之全部或大部分。所附著之多晶之III族氮化物半導體相互連接而成為環狀。繼而,上述積層體保持於環狀之多晶之III族氮化物半導體之內部。In the first growth step S12, a polycrystalline group III nitride semiconductor is formed along the side surface of the laminate including the susceptor 20, the base substrate 10, and the first growth layer 30. The polycrystalline group III nitride semiconductor is attached to all or most of the side surfaces of the above-mentioned laminate. The attached polycrystalline group III nitride semiconductor is connected to each other to form a ring. Then, the above-mentioned laminate is held inside the ring-shaped polycrystalline group III nitride semiconductor.

再者,於第1生長步驟S12中,除上述積層體之側面以外,於基座20之背面亦可能形成多晶之III族氮化物半導體。多晶之III族氮化物半導體附著於上述積層體之側面及基座20之背面之全部或大部分。所附著之多晶之III族氮化物半導體相互連接而成為杯狀之形狀。繼而,上述積層體保持於杯狀之多晶之III族氮化物半導體之內部。In addition, in the first growth step S12, in addition to the side surface of the above-mentioned laminated body, a polycrystalline group III nitride semiconductor may be formed on the back surface of the susceptor 20. The polycrystalline group III nitride semiconductor is attached to all or most of the side surface of the above-mentioned layered body and the back surface of the base 20. The attached polycrystalline group III nitride semiconductor is connected to each other to form a cup shape. Then, the above laminate is held inside the cup-shaped polycrystalline group III nitride semiconductor.

返回至圖3,於冷卻步驟S13中,將包含基座20、基底基板10及第1生長層30之積層體冷卻。此處冷卻之目的在於,利用因第1生長層30與藍寶石基板11之線膨脹係數差而產生之應變(應力),使第1生長層30產生裂痕,藉此緩和應力。期望於第2生長步驟S14之前使應力緩和。只要可達成該目的,則該冷卻之方法並無特別限制。例如可於第1生長步驟S12之後,暫且將上述積層體取出至HVPE裝置之外,並冷卻至室溫。Returning to FIG. 3, in the cooling step S13, the laminate including the susceptor 20, the base substrate 10, and the first growth layer 30 is cooled. The purpose of the cooling here is to use the strain (stress) generated by the difference in the linear expansion coefficients of the first growth layer 30 and the sapphire substrate 11 to crack the first growth layer 30, thereby relaxing the stress. It is desirable to relax the stress before the second growth step S14. As long as the purpose can be achieved, the method of cooling is not particularly limited. For example, after the first growth step S12, the layered product may be taken out of the HVPE device and cooled to room temperature.

如圖4(3)所示,冷卻步驟S13之後之第1生長層30存在裂痕(裂縫、龜裂等)31。如圖示,裂痕31可存在於第1生長層30之表面。再者,裂痕31可於第1生長步驟S12期間產生,亦可於冷卻步驟S13期間產生。As shown in FIG. 4(3), the first growth layer 30 after the cooling step S13 has cracks (cracks, cracks, etc.) 31. As shown, the crack 31 may exist on the surface of the first growth layer 30. Furthermore, the crack 31 may be generated during the first growth step S12 or may be generated during the cooling step S13.

返回至圖3,於第2生長步驟S14中,如圖4(4)所示,於使基底基板10固著於基座20之狀態下,在第1生長層30之上藉由HVPE法使III族氮化物半導體生長。藉此,形成包含單晶之III族氮化物半導體之第2生長層40。例如,於以下之生長條件下使GaN磊晶生長,而形成GaN層(第2生長層40)。用於形成第1生長層30之生長條件與用於形成第2生長層40之生長條件可相同,亦可不同。Returning to FIG. 3, in the second growth step S14, as shown in FIG. 4(4), with the base substrate 10 fixed to the susceptor 20, the HVPE method is used on the first growth layer 30. Group III nitride semiconductor growth. With this, the second growth layer 40 including the single crystal III-nitride semiconductor is formed. For example, GaN is epitaxially grown under the following growth conditions to form a GaN layer (second growth layer 40). The growth conditions for forming the first growth layer 30 and the growth conditions for forming the second growth layer 40 may be the same or different.

生長溫度:900℃~1100℃ 生長時間:1 h~50 h V/III比:1~20 生長膜厚:100 μm~10 mmGrowth temperature: 900℃~1100℃ Growth time: 1 h~50 h V/III ratio: 1~20 Growth film thickness: 100 μm~10 mm

於第2生長步驟S14中,於殘存有第1生長步驟S12中所形成之環狀之多晶之III族氮化物半導體之狀態下,在第1生長層30之上形成第2生長層40。殘存環狀之多晶之III族氮化物半導體之目的在於,藉由自外周保持可能因裂痕31而分離成複數個部分之第1生長層30而抑制該分離。若第1生長層30分離成複數個部分,則複數個部分各自之面方位偏移、或處理性、作業性等變差。又,亦有因一部分零件消失或粉碎而導致無法再現原本之形狀之虞。根據本實施形態,由於可抑制面方位偏移或分離,故可抑制該不良情況。In the second growth step S14, the second growth layer 40 is formed on the first growth layer 30 with the ring-shaped polycrystalline group III nitride semiconductor formed in the first growth step S12 remaining. The purpose of the remaining ring-shaped polycrystalline group III nitride semiconductor is to suppress the separation by retaining the first growth layer 30 that may be separated into a plurality of parts by cracks 31 from the outer periphery. If the first growth layer 30 is separated into a plurality of parts, the plane orientation of each of the plurality of parts will shift, or the handling and workability will deteriorate. In addition, there is a possibility that the original shape cannot be reproduced due to the disappearance or crushing of some parts. According to this embodiment, since the surface orientation deviation or separation can be suppressed, this defect can be suppressed.

再者,可保持原狀殘存第1生長步驟S12中所形成之多晶之III族氮化物半導體之全部,只要能實現上述目的即可,亦可未必殘存第1生長步驟S12中所形成之多晶之III族氮化物半導體之全部。即,可去除多晶之III族氮化物半導體之一部分。Furthermore, all of the polycrystalline group III nitride semiconductor formed in the first growth step S12 may remain as it is, as long as the above purpose can be achieved, and the polycrystalline formed in the first growth step S12 may not necessarily remain All of the III-nitride semiconductors. That is, a part of the polycrystalline group III nitride semiconductor can be removed.

於第2生長步驟S14中亦形成多晶之III族氮化物半導體。多晶之III族氮化物半導體可沿著包含基座20、基底基板10、第1生長層30及第2生長層40之積層體之側面或基座20之背面形成。In the second growth step S14, a polycrystalline group III nitride semiconductor is also formed. The polycrystalline group III nitride semiconductor can be formed along the side surface of the laminate including the base 20, the base substrate 10, the first growth layer 30, and the second growth layer 40 or the back surface of the base 20.

又,於第2生長步驟S14中,於存在裂痕31之第1生長層30之表面上,藉由HVPE法使III族氮化物半導體生長,而形成第2生長層40。於該情形時,生長面(第1生長層30之表面)於裂痕31部分不連續。自以裂痕31為分界相互分開之第1表面區域及第2表面區域之各者生長之III族氮化物半導體進行生長後相互接合,而一體化。In the second growth step S14, on the surface of the first growth layer 30 where the crack 31 is present, a group III nitride semiconductor is grown by the HVPE method to form the second growth layer 40. In this case, the growth surface (the surface of the first growth layer 30) is not continuous at the crack 31 portion. Group III nitride semiconductors grown from each of the first surface region and the second surface region separated from each other with the crack 31 as a boundary are grown and bonded to each other and integrated.

返回至圖3,於晶種基板切下步驟S15中,切下第2生長層40之至少一部分作為半極性晶種基板1。Returning to FIG. 3, in the seed crystal substrate cutting step S15, at least a part of the second growth layer 40 is cut out as the semi-polar seed crystal substrate 1.

例如,如圖4(5)所示,將包含基座20、基底基板10、第1生長層30及第2生長層40之積層體進行切片而將第2生長層40之至少一部分自基座20分離,製成半極性晶種基板1。再者,可對自基座20分離後之第2生長層40之至少一部分進行切片,而獲得複數個半極性晶種基板1。又,除切片以外,亦可利用研削、研磨、燃燒、分解、溶解等方法,將第2生長層40之至少一部分自基座20分離。For example, as shown in FIG. 4(5), a laminate including the susceptor 20, the base substrate 10, the first growth layer 30, and the second growth layer 40 is sliced, and at least a portion of the second growth layer 40 is removed from the susceptor 20 is separated to make a semi-polar seed substrate 1. Furthermore, at least a part of the second growth layer 40 separated from the susceptor 20 may be sliced to obtain a plurality of semipolar seed crystal substrates 1. In addition to slicing, at least a part of the second growth layer 40 may be separated from the susceptor 20 by methods such as grinding, grinding, burning, decomposition, and dissolution.

根據以上,可獲得以半極性面為主面且包含III族氮化物半導體之半極性晶種基板1。According to the above, the semipolar seed substrate 1 including the group III nitride semiconductor with the semipolar plane as the main surface can be obtained.

根據該準備步驟S10,可於應力緩和之第1生長層30之上使半導體磊晶生長,形成第2生長層40(第2生長步驟S14)。由此,與不緩和應力而使第1生長層30厚膜化為同等之厚度之情形時相比,第2生長層40不易產生裂痕或裂紋。According to this preparation step S10, the semiconductor epitaxial growth can be performed on the stress-relieved first growth layer 30 to form the second growth layer 40 (second growth step S14). Thus, compared to the case where the first growth layer 30 is thickened to the same thickness without easing the stress, the second growth layer 40 is less likely to have cracks or cracks.

由此,根據該準備步驟S10,可使以半極性面為主面且孔徑充分之III族氮化物半導體厚膜生長。結果,獲得包含第1生長層30及第2生長層40之塊狀結晶。例如,第2生長層40之膜厚為500 μm以上20 mm以下,其最大孔徑為Φ50 mm以上Φ6英吋以下。又,第1生長層30之膜厚為100 μm以上10 mm以下。若合併第1生長層30與第2生長層40,則其膜厚成為600 μm以上30 mm以下。第2生長層40之表面凹凸,存在m面系刻面。Thus, according to this preparation step S10, a thick group III nitride semiconductor film having a semipolar surface as the main surface and a sufficient pore diameter can be grown. As a result, a bulk crystal including the first growth layer 30 and the second growth layer 40 is obtained. For example, the film thickness of the second growth layer 40 is 500 μm or more and 20 mm or less, and the maximum pore diameter is Φ50 mm or more and Φ6 inches or less. In addition, the film thickness of the first growth layer 30 is 100 μm or more and 10 mm or less. When the first growth layer 30 and the second growth layer 40 are combined, the film thickness becomes 600 μm or more and 30 mm or less. The surface of the second growth layer 40 has irregularities, and there are m-plane facets.

根據如上所述可製造充分之孔徑及充分之膜厚之塊狀結晶之該準備步驟S10,藉由自該塊狀結晶切下一部分(III族氮化物半導體層),可有效率地製造以半極性面為主面且具有充分之孔徑及厚度之半極性晶種基板1。例如,半極性晶種基板1之最大直徑為Φ50 mm以上Φ6英吋以下,半極性晶種基板1之厚度為100 μm以上10 mm以下。According to the preparation step S10 that can produce a bulk crystal with a sufficient pore diameter and a sufficient film thickness as described above, by cutting a part (Group III nitride semiconductor layer) from the bulk crystal, a half-crystal can be efficiently manufactured The semipolar seed substrate 1 having a polar surface as a main surface and a sufficient pore diameter and thickness. For example, the maximum diameter of the semipolar seed substrate 1 is Φ50 mm or more and Φ6 inches or less, and the thickness of the semipolar seed substrate 1 is 100 μm or more and 10 mm or less.

再者,於緩和應力時,第1生長層30產生裂痕31。而且,於此種第1生長層30之上生長之第2生長層40係藉由自以裂痕31為分界相互分開之第1生長層30之第1表面區域及第2表面區域之各者生長之結晶相互接合而形成。此處,第1表面區域及第2表面區域之界面上可能產生錯位。而且,若第1表面區域及第2表面區域之面方位偏移,則上述界面上之錯位增加。於本實施形態中,藉由環狀之多晶之III族氮化物半導體而自外周保持第1生長層30。由此,可抑制上述面方位之偏移。結果,可抑制上述界面上之錯位增加。In addition, when the stress is relaxed, the first growth layer 30 has cracks 31. Moreover, the second growth layer 40 grown on the first growth layer 30 is grown by each of the first surface area and the second surface area of the first growth layer 30 separated from each other by the crack 31 as a boundary The crystals are joined together to form. Here, misalignment may occur at the interface between the first surface area and the second surface area. Furthermore, if the plane orientation of the first surface area and the second surface area shift, the misalignment on the interface increases. In this embodiment, the first growth layer 30 is held from the outer periphery by the ring-shaped polycrystalline group III nitride semiconductor. Thereby, the deviation of the above-mentioned plane orientation can be suppressed. As a result, the increase in the misalignment on the above interface can be suppressed.

又,根據於利用基座20拘束基底基板10之狀態下進行第1生長步驟S12、冷卻步驟S13之該準備步驟S10,與無該拘束之狀態下進行相同之處理之情形相比,可減少於第1生長層30產生之裂痕31之數量。Moreover, according to the preparation step S10 in which the first growth step S12 and the cooling step S13 are performed with the base 20 constrained to the base substrate 10, compared to the case where the same processing is performed without the constraint, it can be reduced to The number of cracks 31 generated in the first growth layer 30.

又,根據於利用基座20拘束包含基底基板10及第1生長層30之積層體之狀態下進行第2生長步驟S14之該準備步驟S10,與無該拘束之狀態下進行相同之處理之情形相比,可減少於第1生長層30或第2生長層40產生之裂痕之數量,而可抑制分離。In addition, according to the case where the preparation step S10 of the second growth step S14 is performed in a state where the laminate including the base substrate 10 and the first growth layer 30 is constrained by the susceptor 20, the same processing is performed as in the state without the constraint In contrast, the number of cracks generated in the first growth layer 30 or the second growth layer 40 can be reduced, and separation can be suppressed.

又,根據該準備步驟S10,如圖5(1)及(2)所示,可製造包括包含單晶之第1部分51及包含多晶之第2部分52之半極性晶種基板1。圖5(1)及(2)係半極性晶種基板1之俯視圖,且示出主面。In addition, according to this preparation step S10, as shown in FIGS. 5(1) and (2), the semipolar seed substrate 1 including the first portion 51 including the single crystal and the second portion 52 including the polycrystal can be manufactured. 5 (1) and (2) are plan views of the semi-polar seed substrate 1 and show the main surface.

第2部分52附著於第1部分51之外周。第2部分52成為環狀,將第1部分51保持於其內部。第2部分52可如圖5(1)所示保持無規附著之狀態,亦可如圖5(2)所示藉由研磨或研削等而齊整。The second part 52 is attached to the outer periphery of the first part 51. The second portion 52 has a ring shape, and holds the first portion 51 inside. The second part 52 may be maintained in a randomly attached state as shown in FIG. 5(1), or may be aligned by grinding or grinding as shown in FIG. 5(2).

根據此種本實施形態之半極性晶種基板1,可藉由第2部分52而獲得直徑。結果,可提高處理性或作業性,又,於利用半極性晶種基板1作為晶種基板時,可確保包含單晶之第1部分51之生長面積較大。例如,第1部分51之最大直徑為Φ50 mm以上Φ6英吋以下,具有第1部分51及第2部分52之III族氮化物半導體層之最大直徑為Φ51 mm以上Φ6.5英吋以下。According to such a semi-polar seed substrate 1 of this embodiment, the diameter can be obtained by the second portion 52. As a result, the handling or workability can be improved, and when the semi-polar seed crystal substrate 1 is used as the seed crystal substrate, the growth area of the first portion 51 including the single crystal can be ensured to be large. For example, the maximum diameter of the first portion 51 is Φ50 mm or more and Φ6 inches or less, and the maximum diameter of the group III nitride semiconductor layer having the first portion 51 and the second portion 52 is Φ51 mm or more and Φ6.5 inches or less.

再者,亦可去除包含多晶之第2部分52,而獲得僅由包含單晶之第1部分51所構成之半極性晶種基板1。In addition, the second portion 52 including polycrystals can be removed to obtain a semi-polar seed substrate 1 composed only of the first portion 51 including single crystals.

又,根據本實施形態之該準備步驟S10,如圖6及圖7所示,製造包含晶軸之朝向相互不同之複數個部分之半極性晶種基板1。圖7係圖6之A-A'之剖視圖。圖示之區域A及區域B之各者係自以裂痕31為分界相互分開之第1生長層30之第1表面區域及第2表面區域之各者生長之部分。In addition, according to this preparation step S10 of the present embodiment, as shown in FIGS. 6 and 7, a semipolar seed substrate 1 including a plurality of portions having crystal axes different from each other is manufactured. 7 is a cross-sectional view of AA' of FIG. 6. Each of the illustrated area A and area B is a portion grown from each of the first surface area and the second surface area of the first growth layer 30 separated from each other by the crack 31 as a boundary.

區域A及區域B之結晶因第1生長層30之第1表面區域及第2表面區域間之晶軸之偏移(由裂痕31引起之偏移)等而導致晶軸之朝向相互不同。圖示之區域A之晶軸之朝向Y及區域B之晶軸之朝向Z表示相同晶軸之朝向。該特徵係該準備步驟中所製造之半極性晶種基板1出現之特徵。再者,如上述,於本實施形態中,因存在自外周保持第1生長層30之環狀之多晶之III族氮化物半導體,而可抑制面方位之偏移。結果,可將區域A之晶軸之朝向Y與區域B之晶軸之朝向Z所成之角抑制為2°以下。The crystals in the regions A and B are different from each other due to the shift of the crystal axis between the first surface region and the second surface region of the first growth layer 30 (the shift caused by the crack 31). The direction Y of the crystal axis of the region A and the direction Z of the crystal axis of the region B in the figure indicate the directions of the same crystal axis. This feature is a feature that appears in the semi-polar seed substrate 1 manufactured in the preparation step. Furthermore, as described above, in the present embodiment, the existence of the ring-shaped polycrystalline group III nitride semiconductor holding the first growth layer 30 from the outer periphery can suppress the deviation of the plane orientation. As a result, the angle formed by the direction Y of the crystal axis of the region A and the direction Z of the crystal axis of the region B can be suppressed to 2° or less.

再者,於準備步驟S10中,亦可藉由與圖3之流程圖所示之處理不同之處理製造半極性晶種基板1。例如,於準備步驟S10中,可以切片面成為半極性面之方式將c面生長所得之III族氮化物半導體之塊狀結晶進行切片,而製造半極性晶種基板1。In addition, in the preparation step S10, the semi-polar seed crystal substrate 1 may also be manufactured by a process different from the process shown in the flowchart of FIG. For example, in the preparation step S10, the bulk crystal of the III-nitride semiconductor grown on the c-plane can be sliced so that the sliced surface becomes a semipolar surface to manufacture the semipolar seed substrate 1.

「III族氮化物半導體層形成步驟S20」 返回至圖1,於III族氮化物半導體層形成步驟S20中,如圖2(2)所示,於半極性晶種基板1之上使III族氮化物半導體磊晶生長,而形成III族氮化物半導體層2。例如,於半極性晶種基板1之主面上藉由HVPE法使III族氮化物半導體(例:GaN)生長,而形成III族氮化物半導體層2。生長條件如下。"Group III nitride semiconductor layer formation step S20" Returning to FIG. 1, in the group III nitride semiconductor layer forming step S20, as shown in FIG. 2(2), the group III nitride semiconductor is epitaxially grown on the semi-polar seed substrate 1 to form a group III nitrogen化物 Semiconductor layer 2. For example, a group III nitride semiconductor layer (eg, GaN) is grown on the main surface of the semipolar seed substrate 1 by the HVPE method to form a group III nitride semiconductor layer 2. The growth conditions are as follows.

生長溫度:900℃~1100℃ 生長時間:1 h~50 h V/III比:1~20 生長膜厚:100 μm~20 mmGrowth temperature: 900℃~1100℃ Growth time: 1 h~50 h V/III ratio: 1~20 Growth film thickness: 100 μm~20 mm

「切下步驟S30」 返回至圖1,於切下步驟S30中,自III族氮化物半導體層2切下以半極性面為主面之半極性獨立基板。"Cut step S30" Returning to FIG. 1, in the cutting step S30, the semipolar independent substrate with the semipolar plane as the main surface is cut from the group III nitride semiconductor layer 2.

例如,於切下步驟S30中,如圖2(3)所示,對包含半極性晶種基板1及III族氮化物半導體層2之積層體進行切片,而將III族氮化物半導體層2之一部分(III族氮化物半導體層之分離部2-2)自半極性晶種基板1分離,藉此,可獲得以半極性面為主面之半極性獨立基板。再者,亦可對III族氮化物半導體層之分離部2-2進行切片而獲得複數個半極性獨立基板。用於獲得III族氮化物半導體層之分離部2-2之切片位置例如可設為自半極性晶種基板1與III族氮化物半導體層2之界面沿著積層方向朝III族氮化物半導體層2移動100 μm以上500 μm以下後之位置,然而,並不限定於此。For example, in the cutting step S30, as shown in FIG. 2(3), the laminate including the semipolar seed substrate 1 and the group III nitride semiconductor layer 2 is sliced, and the group III nitride semiconductor layer 2 is sliced. A part (the separation part 2-2 of the group III nitride semiconductor layer) is separated from the semipolar seed substrate 1, whereby a semipolar independent substrate having a semipolar plane as its main surface can be obtained. Furthermore, a plurality of semi-polar independent substrates may be obtained by slicing the separation portion 2-2 of the group III nitride semiconductor layer. The slicing position of the separation portion 2-2 for obtaining the group III nitride semiconductor layer can be set, for example, from the interface of the semipolar seed substrate 1 and the group III nitride semiconductor layer 2 along the stacking direction toward the group III nitride semiconductor layer 2 The position after moving 100 μm or more and 500 μm or less is not limited to this.

半極性獨立基板之主面之面方位可與半極性晶種基板1之主面之面方位相同。此外,半極性獨立基板之主面之面方位亦可與半極性晶種基板1之主面之面方位不同。上述內容均可藉由調整上述切片之切片面之斜率而實現。例如,於半極性晶種基板1之主面為自{hklm}面(例:{-1-12-3}面)具有15°以內之偏離角之面之情形時,半極性獨立基板之主面可為{hklm}面。The plane orientation of the main surface of the semipolar independent substrate may be the same as the plane orientation of the main surface of the semipolar seed substrate 1. In addition, the plane orientation of the main surface of the semipolar independent substrate may be different from the plane orientation of the main surface of the semipolar seed substrate 1. The above can be achieved by adjusting the slope of the slice plane of the slice. For example, when the main surface of the semi-polar seed crystal substrate 1 is a surface with an angle of deviation within 15° from the {hklm} surface (for example: {-1-12-3} surface), the main surface of the semi-polar independent substrate The face can be a {hklm} face.

再者,如圖2(3)所示,於將III族氮化物半導體層2之一部分(III族氮化物半導體層之分離部2-2)自半極性晶種基板1分離後,III族氮化物半導體層2之另一部分(III族氮化物半導體層之殘存部2-1)殘存於半極性晶種基板1。Furthermore, as shown in FIG. 2(3), after a part of the group III nitride semiconductor layer 2 (the separation part 2-2 of the group III nitride semiconductor layer) is separated from the semipolar seed substrate 1, the group III nitrogen The other part of the compound semiconductor layer 2 (the remaining portion 2-1 of the group III nitride semiconductor layer) remains on the semipolar seed substrate 1.

「加工步驟S40」 返回至圖1,加工步驟S40係於切下步驟S30之後且再利用半極性晶種基板1進行III族氮化物半導體層形成步驟S20之前執行。於加工步驟S40中,自殘存有III族氮化物半導體層2之一部分(III族氮化物半導體層之分離部2-2)之半極性晶種基板1去除所有III族氮化物半導體層2。例如,可藉由研磨而自半極性晶種基板1去除III族氮化物半導體層2。"Processing step S40" Returning to FIG. 1, the processing step S40 is performed after the cutting step S30 and before performing the group III nitride semiconductor layer forming step S20 using the semipolar seed substrate 1. In the processing step S40, all the group III nitride semiconductor layer 2 is removed from the semipolar seed substrate 1 in which a part of the group III nitride semiconductor layer 2 (the separation part 2-2 of the group III nitride semiconductor layer) remains. For example, the group III nitride semiconductor layer 2 can be removed from the semi-polar seed substrate 1 by polishing.

於加工步驟S40中,可去除半極性晶種基板1之與III族氮化物半導體層2相接之面側之一部分。藉由如此,可確實地達成所有III族氮化物半導體層2之去除。In the processing step S40, a part of the surface side of the semi-polar seed substrate 1 that is in contact with the group III nitride semiconductor layer 2 can be removed. In this way, the removal of all group III nitride semiconductor layers 2 can be surely achieved.

再者,加工步驟S40可包含藉由表面觀察而確認已自半極性晶種基板1去除所有III族氮化物半導體層2之處理。此處之表面觀察例如為利用SEM(Scanning Electron microscope,掃描式電子顯微鏡)/CL(Cathodoluminescence,陰極發光)之表面觀察。Furthermore, the processing step S40 may include a process of confirming that all the group III nitride semiconductor layers 2 have been removed from the semipolar seed substrate 1 by surface observation. The surface observation here is, for example, surface observation using SEM (Scanning Electron microscope)/CL (Cathodoluminescence).

於加工步驟S40後,再利用已去除III族氮化物半導體層2之全部之半極性晶種基板1,執行III族氮化物半導體層形成步驟S20及切下步驟S30。再者,可於再利用半極性晶種基板1執行III族氮化物半導體層形成步驟S20及切下步驟S30之後,進而進行加工步驟S40,將半極性晶種基板1進行複數次再利用。例如,可預先規定反覆利用之次數之上限(例:5次左右),若達到該次數,則結束半極性晶種基板1之再利用。After the processing step S40, the semi-polar seed substrate 1 from which all the group III nitride semiconductor layers 2 have been removed is reused to perform the group III nitride semiconductor layer forming step S20 and the cutting step S30. Furthermore, after the semi-polar seed substrate 1 is reused, the group III nitride semiconductor layer forming step S20 and the cutting step S30 can be performed, and then the processing step S40 can be performed to reuse the semi-polar seed substrate 1 a plurality of times. For example, the upper limit of the number of times of repeated use (for example, about 5 times) may be predetermined, and if this number of times is reached, the reuse of the semi-polar seed crystal substrate 1 is ended.

其次,對本實施形態之半極性獨立基板之製造方法之作用效果進行說明。於本實施形態之半極性獨立基板之製造方法中,於以半極性面為主面且包含III族氮化物半導體之半極性晶種基板1上形成III族氮化物半導體層2,繼而將III族氮化物半導體層2自半極性晶種基板1分離而獲得半極性獨立基板,之後再利用將III族氮化物半導體層2分離而得之半極性晶種基板1進行該步驟。藉由半極性晶種基板1之再利用,可產生成本上之優勢。Next, the function and effect of the manufacturing method of the semipolar independent substrate of this embodiment will be described. In the manufacturing method of the semipolar independent substrate of the present embodiment, the group III nitride semiconductor layer 2 is formed on the semipolar seed substrate 1 having the group of the group III nitride semiconductor with the semipolar surface as the main surface, and then the group III The nitride semiconductor layer 2 is separated from the semipolar seed substrate 1 to obtain a semipolar independent substrate, and then this step is performed using the semipolar seed substrate 1 obtained by separating the group III nitride semiconductor layer 2. By reusing the semi-polar seed crystal substrate 1, a cost advantage can be produced.

又,於以下之實施例中示出,在以c面為主面之晶種基板上將c面設為生長面而形成III族氮化物半導體層之情形時,所獲得之III族氮化物半導體層之表面容易產生貫通孔或裂痕。結果,於所獲得之獨立基板之表面亦容易產生貫通孔或裂痕。In the following examples, it is shown that when a group III nitride semiconductor layer is formed by using a c-plane as a growth plane on a seed substrate having a c-plane as a main surface, the obtained group-III nitride semiconductor The surface of the layer is prone to through holes or cracks. As a result, through holes or cracks are easily generated on the surface of the obtained independent substrate.

與此相對,根據於以半極性面為主面之半極性晶種基板1上將半極性面設為生長面而形成III族氮化物半導體層2之本實施形態之製造方法,與上述c面生長之例相比,所獲得之III族氮化物半導體層2之表面不易產生貫通孔或裂痕。結果,所獲得之半極性獨立基板之表面亦不易產生貫通孔或裂痕。即,根據本實施形態之半極性獨立基板之製造方法,可製造表面狀態良好之半極性獨立基板。On the other hand, according to the manufacturing method of this embodiment in which the group III nitride semiconductor layer 2 is formed on the semipolar seed substrate 1 having the semipolar plane as the main surface, the semipolar plane is used as the growth plane, and the above-mentioned c plane Compared with the growth example, the surface of the obtained III-nitride semiconductor layer 2 is less likely to produce through holes or cracks. As a result, the surface of the obtained semipolar independent substrate is also less prone to through holes or cracks. That is, according to the method for manufacturing a semipolar independent substrate of this embodiment, a semipolar independent substrate with a good surface condition can be manufactured.

又,根據本實施形態之半極性獨立基板之製造方法,由於可製造主面成為半極性面之半極性獨立基板,故可實現形成於獨立基板上之元件之內部量子效率之提高等。In addition, according to the manufacturing method of the semipolar independent substrate of the present embodiment, since the semipolar independent substrate whose main surface becomes the semipolar surface can be manufactured, the internal quantum efficiency of the device formed on the independent substrate can be improved.

又,根據於再利用前將III族氮化物半導體層2自半極性晶種基板1完全去除之本實施形態之半極性獨立基板之製造方法,於III族氮化物半導體層形成步驟S20中之III族氮化物半導體之生長中,可降低局部之應變、異常生長、結晶缺陷等不良情況之產生機率。即,可製造高品質之半極性獨立基板。In addition, according to the manufacturing method of the semi-polar independent substrate of the present embodiment in which the III-nitride semiconductor layer 2 is completely removed from the semi-polar seed substrate 1 before reuse, the III in the III-nitride semiconductor layer forming step S20 In the growth of group nitride semiconductors, the probability of occurrence of local conditions such as strain, abnormal growth, and crystal defects can be reduced. That is, a high-quality semi-polar independent substrate can be manufactured.

<第2實施形態> 圖8之流程圖表示本實施形態之半極性獨立基板之製造方法之處理流程的一例。如圖示,於本實施形態之半極性獨立基板之製造方法中,依序進行準備步驟S10、III族氮化物半導體層形成步驟S20、切下步驟S30、加工步驟S40及判斷步驟S50。<Second Embodiment> The flowchart of FIG. 8 shows an example of the processing flow of the manufacturing method of the semipolar independent substrate of this embodiment. As shown in the figure, in the manufacturing method of the semipolar independent substrate of this embodiment, the preparation step S10, the group III nitride semiconductor layer forming step S20, the cutting step S30, the processing step S40, and the determination step S50 are sequentially performed.

本實施形態與第1實施形態之不同點在於具有判斷步驟S50。準備步驟S10、III族氮化物半導體層形成步驟S20、切下步驟S30及加工步驟S40與第1實施形態相同。This embodiment is different from the first embodiment in that it has a judgment step S50. The preparation step S10, the group III nitride semiconductor layer forming step S20, the cutting step S30, and the processing step S40 are the same as in the first embodiment.

再者,雖未圖示,但判斷步驟S50可於切下步驟S30之後且加工步驟S40之前進行,而非於加工步驟S40之後進行。此外,判斷步驟S50可於切下步驟S30之後且加工步驟S40之前、與加工步驟S40之後之兩者進行。Furthermore, although not shown, the determination step S50 may be performed after the cutting step S30 and before the processing step S40, rather than after the processing step S40. In addition, the determination step S50 may be performed after the cutting step S30 and before the processing step S40 and after the processing step S40.

藉由於切下步驟S30之後且加工步驟S40之前進行判斷步驟S50,可抑制對無法再利用之半極性晶種基板1進行加工步驟S40之不良情況。又,藉由於加工步驟S40之後進行判斷步驟S50,可考慮加工步驟S40之影響而判斷能否再利用半極性晶種基板1。以下,對判斷步驟S50進行說明。By performing the determination step S50 after the cutting step S30 and before the processing step S40, the defect of performing the processing step S40 on the semi-polar seed substrate 1 that cannot be reused can be suppressed. Moreover, since the determination step S50 is performed after the processing step S40, the influence of the processing step S40 can be considered to determine whether the semipolar seed substrate 1 can be reused. Hereinafter, the determination step S50 will be described.

「判斷步驟S50」 於判斷步驟S50中,判斷半極性晶種基板1能否再利用。於藉由判斷步驟S50判斷為可再利用之情形時,將半極性晶種基板1進行再利用。即,於該半極性晶種基板1之上形成III族氮化物半導體層2,自III族氮化物半導體層2切下半極性獨立基板。另一方面,於藉由判斷步驟S50判斷為無法再利用之情形時,結束半極性晶種基板1之再利用。"Judgment Step S50" In the judgment step S50, it is judged whether the semi-polar seed substrate 1 can be reused. When it is determined in step S50 that it is reusable, the semi-polar seed substrate 1 is reused. That is, a group III nitride semiconductor layer 2 is formed on the semipolar seed substrate 1, and a semipolar independent substrate is cut from the group III nitride semiconductor layer 2. On the other hand, when it is determined in the determination step S50 that it cannot be reused, the reuse of the semipolar seed substrate 1 is ended.

以下,對判斷方法之具體例進行說明。Hereinafter, a specific example of the determination method will be described.

於第1例中,基於半極性晶種基板1之曲率半徑,判斷能否再利用。具體而言,於半極性晶種基板1之曲率半徑為基準值以上之情形時,判斷為可再利用,於半極性晶種基板1之曲率半徑未達基準值之情形時,判斷為無法再利用。In the first example, based on the radius of curvature of the semi-polar seed substrate 1, it is determined whether it can be reused. Specifically, when the radius of curvature of the semipolar seed crystal substrate 1 is greater than or equal to the reference value, it is determined to be reusable, and when the radius of curvature of the semipolar seed crystal substrate 1 does not reach the reference value, it is determined that it is no longer possible use.

若半極性晶種基板1之翹曲過大,則所獲得之半極性獨立基板亦大幅度地翹曲,可能產生裂紋等不良情況。藉由基於曲率半徑判斷能否再利用,可抑制製造出不適合之半極性獨立基板作為製品之不良情況。再者,曲率半徑之基準值例如為1 m,可依據該基準值予以適當設定。If the warpage of the semi-polar seed substrate 1 is too large, the obtained semi-polar independent substrate will also warp to a large extent, and defects such as cracks may occur. By judging whether it can be reused based on the radius of curvature, it is possible to suppress the defect of manufacturing an unsuitable semipolar independent substrate as a product. Furthermore, the reference value of the radius of curvature is, for example, 1 m, and can be appropriately set according to the reference value.

於在切下步驟S30之後且加工步驟S40之前執行判斷步驟S50之情形時,可藉由能量分散型X射線繞射(EDXRD)法測量相對於主面之偏離角,並根據所獲得之資料算出曲率半徑。亦可利用X射線搖擺曲線法進行測量,但因切下步驟S30而於結晶切斷面產生切斷損傷,難以實現精度佳之測量,故不佳。When the judgment step S50 is performed after the cutting step S30 and before the processing step S40, the deviation angle relative to the main surface can be measured by the energy dispersive X-ray diffraction (EDXRD) method, and calculated based on the obtained data Radius of curvature. The X-ray rocking curve method can also be used for measurement, but due to the cutting step S30, cutting damage is generated on the crystal cut surface, and it is difficult to achieve measurement with good accuracy, which is not good.

另一方面,於在加工步驟S40之後執行判斷步驟S50之情形時,由於藉由加工步驟S40去除結晶表面之切斷損傷,故可利用能量分散型X射線繞射法及X射線搖擺曲線法中之任一方法高精度地測量曲率半徑。On the other hand, when the judgment step S50 is performed after the processing step S40, since the cutting damage of the crystal surface is removed by the processing step S40, energy dispersive X-ray diffraction method and X-ray rocking curve method can be used Either method measures the radius of curvature with high accuracy.

如此,藉由根據進行判斷步驟S50之時點選擇適當之方法,可對半極性晶種基板1之狀態進行適當評價。In this way, by selecting an appropriate method according to the timing at which the judgment step S50 is performed, the state of the semipolar seed substrate 1 can be properly evaluated.

於第2例中,基於半極性晶種基板1是否產生特定之裂痕,判斷能否再利用。具體而言,於半極性晶種基板1未產生特定之裂痕之情形時,判斷為可再利用,於半極性晶種基板1產生特定之裂痕之情形時,判斷為無法再利用。特定之裂痕例如為預先規定之基準長度以上之裂痕。基準長度可為「半極性晶種基板1之直徑之50%以上」,亦可規定為「○○ cm以上」。In the second example, it is determined whether the semi-polar seed crystal substrate 1 has a specific crack or not, and it can be reused. Specifically, when the semi-polar seed crystal substrate 1 does not generate a specific crack, it is determined to be reusable, and when the semi-polar seed crystal substrate 1 generates a specific crack, it is determined to be unusable. The specific crack is, for example, a crack having a predetermined reference length or longer. The reference length may be "more than 50% of the diameter of the semi-polar seed substrate 1", or it may be specified as "more than ○ cm".

若半極性晶種基板1存在較長之裂痕,則對形成於其上之III族氮化物半導體層2之結晶性產生不良影響。藉由基於是否產生有特定之裂痕來判斷能否再利用,可抑制製造出不適合之半極性獨立基板作為製品之不良情況。If the semipolar seed substrate 1 has a long crack, it will adversely affect the crystallinity of the group III nitride semiconductor layer 2 formed thereon. By judging whether it can be reused based on whether there is a specific crack or not, it is possible to suppress the defect of manufacturing an unsuitable semi-polar independent substrate as a product.

於第3例中,基於半極性晶種基板1之厚度,判斷能否再利用。具體而言,於半極性晶種基板1之厚度為基準值以上之情形時,判斷為可再利用,於半極性晶種基板1之厚度未達基準值之情形時,判斷為無法再利用。In the third example, based on the thickness of the semi-polar seed substrate 1, it is determined whether it can be reused. Specifically, when the thickness of the semi-polar seed crystal substrate 1 is equal to or greater than the reference value, it is determined to be reusable, and when the thickness of the semi-polar seed crystal substrate 1 does not reach the reference value, it is determined that it is not reusable.

如第1實施形態中所說明,於加工步驟S40中,由於確實地達成所有III族氮化物半導體層2之去除,故可去除半極性晶種基板1之與III族氮化物半導體層2相接之面側之一部分。於該情形時,藉由半極性晶種基板1之一部分之去除,半極性晶種基板1變薄。As described in the first embodiment, in the processing step S40, since the removal of all the group III nitride semiconductor layers 2 is surely achieved, it is possible to remove the semi-polar seed substrate 1 that is in contact with the group III nitride semiconductor layer 2 Part of the face side. In this case, by removing a part of the semi-polar seed crystal substrate 1, the semi-polar seed crystal substrate 1 becomes thinner.

若半極性晶種基板1變得過薄,則半極性晶種基板1或形成於其上之III族氮化物半導體層2容易產生翹曲或裂痕。藉由基於厚度判斷能否再利用,可抑制製造出不適合之半極性獨立基板作為製品之不良情況。再者,厚度之基準值例如為250 μm,可依據該基準值予以適當設定。If the semi-polar seed crystal substrate 1 becomes too thin, the semi-polar seed crystal substrate 1 or the group III nitride semiconductor layer 2 formed thereon is likely to be warped or cracked. By judging whether it can be reused based on the thickness, it is possible to suppress the defect of manufacturing an unsuitable semipolar independent substrate as a product. Furthermore, the reference value of the thickness is, for example, 250 μm, and can be appropriately set according to the reference value.

於第4例中,基於半極性晶種基板1之表面粗糙度,判斷能否再利用。具體而言,於半極性晶種基板1之表面粗糙度未達基準值之情形時,判斷為可再利用,於半極性晶種基板1之表面粗糙度為基準值以上之情形時,判斷為無法再利用。In the fourth example, based on the surface roughness of the semi-polar seed substrate 1, it is judged whether it can be reused. Specifically, when the surface roughness of the semi-polar seed crystal substrate 1 does not reach the reference value, it is judged as reusable, and when the surface roughness of the semi-polar seed crystal substrate 1 is above the reference value, it is judged as Cannot be reused.

若半極性晶種基板1之表面粗糙度過於粗糙,則半極性晶種基板1或形成於其上之III族氮化物半導體層2之結晶性容易受損。藉由基於表面粗糙度判斷能否再利用,可抑制製造出不適合之半極性獨立基板作為製品之不良情況。再者,表面粗糙度之基準值例如為5×5 μm2 之表面粗糙度RMS(Root Mean Square,均方根)為0.5 nm以上5 nm以下,可依據該基準值予以適當設定。If the surface roughness of the semi-polar seed crystal substrate 1 is too rough, the crystallinity of the semi-polar seed crystal substrate 1 or the group III nitride semiconductor layer 2 formed thereon is easily damaged. By judging whether it can be reused based on the surface roughness, it is possible to suppress the defect of manufacturing an unsuitable semipolar independent substrate as a product. In addition, the reference value of the surface roughness is, for example, 5×5 μm 2 and the surface roughness RMS (Root Mean Square, root mean square) is 0.5 nm or more and 5 nm or less, and can be appropriately set according to the reference value.

於第5例中,基於半極性晶種基板1之表面之傷痕之有無,判斷能否再利用。具體而言,於半極性晶種基板1之表面未產生傷痕之情形時,判斷為可再利用,於半極性晶種基板1之表面產生傷痕之情形時,判斷為無法再利用。In the fifth example, based on the presence or absence of scratches on the surface of the semi-polar seed substrate 1, it is determined whether it can be reused. Specifically, when scratches are not generated on the surface of the semi-polar seed crystal substrate 1, it is determined to be reusable, and when scratches are generated on the surface of the semi-polar seed crystal substrate 1, it is determined that it cannot be reused.

藉由半極性晶種基板1之利用或加工步驟S40之實施等,半極性晶種基板1之表面可能產生研磨痕跡或傷痕。若半極性晶種基板1之表面存在研磨痕跡或傷痕,則會對形成於其上之III族氮化物半導體層2之結晶性帶來不良影響。藉由基於半極性晶種基板1之表面之傷痕之有無判斷能否再利用,可抑制製造出不適合之半極性獨立基板作為製品之不良情況。確認傷痕之有無之檢查可藉由光學顯微鏡觀察或SEM/CL等實現。Through the use of the semi-polar seed crystal substrate 1 or the implementation of the processing step S40, etc., the surface of the semi-polar seed crystal substrate 1 may produce grinding marks or scratches. If there are grinding marks or scratches on the surface of the semi-polar seed substrate 1, it will adversely affect the crystallinity of the group III nitride semiconductor layer 2 formed thereon. By judging whether the scratches on the surface of the semi-polar seed crystal substrate 1 can be reused or not, it is possible to suppress the defect of manufacturing an unsuitable semi-polar independent substrate as a product. The inspection to confirm the presence or absence of scars can be achieved by optical microscope observation or SEM/CL.

根據以上所說明之本實施形態之半極性獨立基板之製造方法,可實現與第1實施形態相同之作用效果。又,根據於適當地判斷半極性晶種基板1能否再利用後進行再利用之本實施形態之半極性獨立基板之製造方法,可抑制因半極性晶種基板1之狀態不良而製造出不適合之半極性獨立基板作為製品之不良情況。According to the manufacturing method of the semipolar independent substrate of the present embodiment described above, the same effect as the first embodiment can be achieved. In addition, according to the method of manufacturing the semi-polar independent substrate of the present embodiment for appropriately determining whether the semi-polar seed substrate 1 can be reused, it is possible to suppress unsuitable manufacturing due to the defective state of the semi-polar seed substrate 1 The semi-polar independent substrate is a defect of the product.

<實施例> 「實施例1」 圖9表示實施例1之半極性晶種基板1。實施例1之半極性晶種基板1包含GaN,且雖一部分存在裂紋(位於基板之外周附近之於圖中縱向上延伸之裂紋),但不存在貫通孔。主面之面方位係使{-1-12-3}面朝m面方向傾斜9°且朝c面方向傾斜3°而得之面,直徑為Φ60 mm,厚度為800 μm。<Example> "Example 1" 9 shows the semi-polar seed substrate 1 of Example 1. FIG. The semi-polar seed substrate 1 of Example 1 contains GaN, and although a part of it has cracks (cracks extending in the longitudinal direction in the figure near the outer periphery of the substrate), there are no through holes. The plane orientation of the main plane is a plane obtained by inclining the {-1-12-3} plane toward the m plane by 9° and 3° toward the c plane, with a diameter of Φ60 mm and a thickness of 800 μm.

於該半極性晶種基板1上,於以下之生長條件下使GaN磊晶生長,而形成GaN層(III族氮化物半導體層2)。On this semi-polar seed substrate 1, GaN is epitaxially grown under the following growth conditions to form a GaN layer (Group III nitride semiconductor layer 2).

生長方法:HVPE法 生長溫度:1040℃ V/III比:2000/200 氣體總流量:10314 sccm 雜質:未摻雜 生長時間:12小時Growth method: HVPE method Growth temperature: 1040℃ V/III ratio: 2000/200 Total gas flow: 10314 sccm Impurities: undoped Growth time: 12 hours

圖10表示實施例1之GaN層之表面。GaN層之表面不存在貫通孔或裂痕。即,可不產生新貫通孔或裂痕而形成GaN層。又,存在於半極性晶種基板1之表面之裂痕於GaN層之表面消失。10 shows the surface of the GaN layer of Example 1. FIG. There are no through holes or cracks on the surface of the GaN layer. That is, the GaN layer can be formed without generating new through holes or cracks. In addition, cracks existing on the surface of the semipolar seed substrate 1 disappear on the surface of the GaN layer.

於形成GaN層後,如圖11所示,於自半極性晶種基板1與GaN層之界面沿著積層方向朝GaN層(圖中之上方向)移動300 μm後之位置進行切片,使半極性晶種基板1與GaN層之一部分分離。再者,如圖示,GaN層之中心部之厚度為2500 μm,最外周部之厚度為1550 μm。After the formation of the GaN layer, as shown in FIG. 11, the slice was sliced at a position moved 300 μm from the interface of the semipolar seed substrate 1 and the GaN layer along the stacking direction toward the GaN layer (upward direction in the figure), The polar seed substrate 1 is separated from a part of the GaN layer. Furthermore, as shown in the figure, the thickness of the central portion of the GaN layer is 2500 μm, and the thickness of the outermost peripheral portion is 1550 μm.

圖12表示經分離之GaN層之切片面。圖中之圓形表示Φ50 mm之圓。圖13表示殘存於半極性晶種基板1之GaN層之切片面。如圖12及圖13所示,於GaN層之內部亦未確認到貫通孔或裂痕。Fig. 12 shows the sliced surface of the separated GaN layer. The circle in the figure represents a circle of Φ50 mm. FIG. 13 shows a sliced surface of the GaN layer remaining on the semipolar seed substrate 1. As shown in FIGS. 12 and 13, no through holes or cracks were confirmed in the GaN layer.

圖14表示執行GaN層之形成及分離前之半極性晶種基板1(起始基板)、及於執行GaN層之形成及分離後藉由研磨去除GaN層而得之半極性晶種基板1(再利用基板)之表面。即便實施上述步驟,亦確認到可不使表面產生傷痕等而將半極性晶種基板1進行再利用。14 shows a semi-polar seed substrate 1 (starting substrate) before performing the formation and separation of the GaN layer, and a semi-polar seed substrate 1 obtained by removing the GaN layer by grinding after performing the formation and separation of the GaN layer ( Reuse the surface of the substrate). Even if the above steps were carried out, it was confirmed that the semipolar seed crystal substrate 1 can be reused without causing scratches or the like on the surface.

「實施例2」 圖15表示實施例2之半極性晶種基板1。實施例2之半極性晶種基板1包含GaN,且一部分存在裂紋,進而存在貫通孔。圖中,利用圓圈表示貫通孔。主面之面方位係使{-1-12-3}面朝m面方向傾斜9°且朝c面方向傾斜3°而得之面,直徑為Φ60 mm,厚度為800 μm。"Example 2" 15 shows the semi-polar seed substrate 1 of Example 2. FIG. The semi-polar seed substrate 1 of Example 2 contains GaN, and a part of it has cracks and further has through holes. In the figure, the through holes are indicated by circles. The plane orientation of the main plane is a plane obtained by inclining the {-1-12-3} plane toward the m plane by 9° and 3° toward the c plane, with a diameter of Φ60 mm and a thickness of 800 μm.

於該半極性晶種基板1上使GaN磊晶生長,而形成GaN層(III族氮化物半導體層2)。生長條件除進行2次將生長時間設為20小時之生長之方面以外,與實施例1相同。On this semi-polar seed substrate 1, GaN is epitaxially grown to form a GaN layer (Group III nitride semiconductor layer 2). The growth conditions are the same as in Example 1 except that the growth time is set twice to 20 hours of growth.

圖16表示包含半極性晶種基板1及GaN層之積層體之中心部膜厚為6 mm之時間點之GaN層的表面。圖17表示該積層體之中心部膜厚成為12.8 mm之時間點之GaN層之表面。於該等表面中,未產生半極性晶種基板1所不存在之新貫通孔或裂痕。FIG. 16 shows the surface of the GaN layer at a time point when the thickness of the central portion of the laminate including the semipolar seed substrate 1 and the GaN layer is 6 mm. FIG. 17 shows the surface of the GaN layer at the time when the film thickness at the center of the layered product becomes 12.8 mm. In these surfaces, no new through holes or cracks that do not exist in the semi-polar seed substrate 1 are generated.

而且,與實施例1同樣地,於自半極性晶種基板1與GaN層之界面沿著積層方向朝GaN層(圖中之上方向)移動300 μm後之位置進行切片,將半極性晶種基板1與GaN層之一部分分離。Furthermore, in the same manner as in Example 1, the semipolar seed crystal was sliced at a position moved 300 μm from the interface of the semipolar seed crystal substrate 1 and the GaN layer along the stacking direction toward the GaN layer (upward direction in the figure). The substrate 1 is separated from a part of the GaN layer.

圖18表示經分離之GaN層之切片面。於圖18之切片面不存在貫通孔或裂痕。即,存在於半極性晶種基板1之貫通孔或裂痕(參照圖15)消失。Fig. 18 shows the sliced surface of the separated GaN layer. There is no through hole or crack in the sliced surface of FIG. 18. That is, the through holes or cracks (see FIG. 15) existing in the semipolar seed crystal substrate 1 disappear.

圖19表示殘存於半極性晶種基板1之GaN層之切片面。雖中心部存在貫通孔(圖中之圓圈),但不存在其他貫通孔或裂痕。即,存在於半極性晶種基板1之貫通孔或裂痕(參照圖15)中之中心部之貫通孔殘存,其他貫通孔或裂痕消失。FIG. 19 shows the slice surface of the GaN layer remaining on the semipolar seed substrate 1. Although there is a through hole (circle in the figure) in the center, there are no other through holes or cracks. That is, the through hole existing in the central portion of the through hole or crack (see FIG. 15) of the semipolar seed crystal substrate 1 remains, and the other through holes or crack disappear.

圖20中表示存在於半極性晶種基板1之中心部之貫通孔的光學顯微鏡觀察圖像。圖21中表示存在於圖19所示之GaN層之切片面之中心部之貫通孔的光學顯微鏡觀察圖像。再者,圖20及圖21中之表示長度之數字之單位為「μm」。由圖可知,隨著遠離半極性晶種基板1(隨著構成III族氮化物半導體層2之III族氮化物半導體生長),貫通孔之寬度或長度變小。即,確認到藉由於半極性晶種基板1上使III族氮化物半導體生長,可使存在於半極性晶種基板1之貫通孔變小或使裂痕消失。再者,圖中之<000-2>投影軸表示將<000-2>投影至半極性晶種基板1之主面後之軸之方向。同樣地,圖中之<10-10>投影軸表示將<10-10>投影至半極性晶種基板1之主面後之軸之方向。FIG. 20 shows an optical microscope observation image of the through hole existing in the central portion of the semipolar seed substrate 1. FIG. 21 shows an optical microscope observation image of the through hole existing in the central portion of the slice surface of the GaN layer shown in FIG. 19. In addition, the unit of the number indicating the length in FIGS. 20 and 21 is “μm”. It can be seen from the figure that the width or length of the through hole becomes smaller as the distance away from the semipolar seed substrate 1 (as the group III nitride semiconductor constituting the group III nitride semiconductor layer 2 grows). That is, it was confirmed that by growing the III-nitride semiconductor on the semi-polar seed crystal substrate 1, the through-holes present in the semi-polar seed crystal substrate 1 can be reduced or cracks disappeared. Furthermore, the projection axis of <000-2> in the figure indicates the direction of the axis after projecting <000-2> onto the main surface of the semipolar seed crystal substrate 1. Similarly, the projection axis of <10-10> in the figure represents the direction of the axis after projecting <10-10> onto the main surface of the semipolar seed crystal substrate 1.

「比較例1」 圖22中表示比較例1之晶種基板。比較例1之晶種基板包含GaN且存在貫通孔。圖中,利用圓圈表示貫通孔。主面為c面,直徑為Φ50 mm,厚度為400 μm。"Comparative Example 1" FIG. 22 shows the seed crystal substrate of Comparative Example 1. The seed substrate of Comparative Example 1 contains GaN and has through holes. In the figure, the through holes are indicated by circles. The main surface is the c-plane, the diameter is Φ50 mm, and the thickness is 400 μm.

於該晶種基板上使GaN磊晶生長而形成GaN層。生長條件除將生長時間設為20小時且進行Si摻雜之方面以外,與實施例1相同。A GaN layer is formed by epitaxially growing GaN on the seed substrate. The growth conditions are the same as in Example 1 except that the growth time is set to 20 hours and Si doping is performed.

圖23表示GaN層之表面。可知存在於晶種基板上之貫通孔亦存在於GaN層。而且,可確認到GaN層之貫通孔大於晶種基板上之貫通孔。Fig. 23 shows the surface of the GaN layer. It can be seen that the through holes present on the seed substrate also exist in the GaN layer. Furthermore, it can be confirmed that the through hole of the GaN layer is larger than the through hole on the seed substrate.

「比較例2」 圖24中表示比較例2之晶種基板。比較例2之晶種基板包含GaN,且存在未貫通至背面之開口孔。主面為c面,直徑為Φ50 mm,厚度為400 μm。"Comparative Example 2" FIG. 24 shows the seed substrate of Comparative Example 2. The seed substrate of Comparative Example 2 contains GaN, and there is an opening that does not penetrate to the back surface. The main surface is the c-plane, the diameter is Φ50 mm, and the thickness is 400 μm.

於該晶種基板上使GaN磊晶生長而形成GaN層。生長條件除將生長時間設為20小時之方面以外,與實施例1相同。A GaN layer is formed by epitaxially growing GaN on the seed substrate. The growth conditions are the same as in Example 1 except that the growth time is set to 20 hours.

圖25表示GaN層之表面。可確認到於GaN層存在晶種基板上不存在之新貫通孔(圖中,利用圓圈表示)。Fig. 25 shows the surface of the GaN layer. It can be confirmed that there is a new through hole (not shown by a circle in the figure) that does not exist on the seed substrate of the GaN layer.

「比較例3」 圖26表示比較例3之晶種基板。比較例3之晶種基板包含GaN,且存在未貫通至背面之開口孔。主面為c面,直徑為Φ54 mm,厚度為1.4 mm。"Comparative Example 3" FIG. 26 shows the seed crystal substrate of Comparative Example 3. FIG. The seed crystal substrate of Comparative Example 3 contains GaN, and there is an opening hole that does not penetrate to the back surface. The main surface is c-plane, the diameter is Φ54 mm, and the thickness is 1.4 mm.

於該晶種基板上使GaN磊晶生長而形成GaN層。生長條件除將生長時間設為21小時之方面以外,與實施例1相同。A GaN layer is formed by epitaxially growing GaN on the seed substrate. The growth conditions are the same as in Example 1 except that the growth time is set to 21 hours.

圖27表示GaN層之表面。可確認到於GaN層存在晶種基板上不存在之裂痕。又,可確認到存在晶種基板上不存在之貫通孔、晶種基板上存在之貫通孔之殘存、及該貫通孔之擴大。Fig. 27 shows the surface of the GaN layer. It can be confirmed that there is a crack that does not exist on the seed substrate in the GaN layer. In addition, it can be confirmed that there is a through hole that does not exist on the seed crystal substrate, a residual through hole that exists on the seed crystal substrate, and an enlargement of the through hole.

以下,附記參考形態之例。 1.一種半極性獨立基板之製造方法,其執行:準備步驟,其係準備以半極性面為主面且包含III族氮化物半導體之半極性晶種基板; III族氮化物半導體層形成步驟,其係於上述半極性晶種基板之上使III族氮化物半導體磊晶生長,而形成III族氮化物半導體層; 切下步驟,其係自上述III族氮化物半導體層切下以半極性面為主面之半極性獨立基板;及 加工步驟,其係於上述切下步驟之後,自殘存有上述III族氮化物半導體層之一部分之上述半極性晶種基板去除所有上述III族氮化物半導體層;之後再利用去除上述III族氮化物半導體層後之上述半極性晶種基板,進行上述III族氮化物半導體層形成步驟及上述切下步驟。 2.如1之半極性獨立基板之製造方法,其係 於上述加工步驟中,去除上述半極性晶種基板之與上述III族氮化物半導體層相接之面側之一部分。 3.如1或2之半極性獨立基板之製造方法,其係 於上述加工步驟中,藉由表面觀察而確認所有上述III族氮化物半導體層之去除。 4.如1至3中任一項之半極性獨立基板之製造方法,其 進而包括判斷上述半極性晶種基板能否再利用之判斷步驟, 於在上述判斷步驟中判斷為可再利用之情形時,將上述半極性晶種基板進行再利用, 於在上述判斷步驟中判斷為無法再利用之情形時,結束上述半極性晶種基板之再利用。 5.如4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之曲率半徑為基準值以上之情形時,判斷為可再利用,於上述半極性晶種基板之曲率半徑未達基準值之情形時,判斷為無法再利用。 6.如4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板未產生特定之裂痕之情形時,判斷為可再利用,於上述半極性晶種基板產生特定之裂痕之情形時,判斷為無法再利用。 7.如4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之厚度為基準值以上之情形時,判斷為可再利用,於上述半極性晶種基板之厚度未達基準值之情形時,判斷為無法再利用。 8.如4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之表面粗糙度未達基準值之情形時,判斷為可再利用,於上述半極性晶種基板之表面粗糙度為基準值以上之情形時,判斷為無法再利用。 9.如4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之表面未產生傷痕之情形時,判斷為可再利用,於上述半極性晶種基板之表面產生傷痕之情形時,判斷為無法再利用。 10.如1至9中任一項之半極性獨立基板之製造方法,其中 上述半極性晶種基板之主面係自{hklm}面具有15°以內之偏離角之面, 於上述切下步驟中,切下以{hklm}面為主面之上述半極性獨立基板。 11.如10之半極性獨立基板之製造方法,其中 上述半極性晶種基板之主面係自{-1-12-3}面具有15°以內之偏離角之面。 12.如1至11中任一項之半極性獨立基板之製造方法,其中 上述準備步驟包括: 固著步驟,其係使包含以半極性面為主面之III族氮化物半導體層之基底基板固著於基座; 第1生長步驟,其係於使上述基底基板固著於上述基座之狀態下,於上述III族氮化物半導體層之上述主面上藉由HVPE(Hydride Vapor Phase Epitaxy)法使III族氮化物半導體生長,而形成第1生長層; 冷卻步驟,其係將包含上述基座、上述基底基板及上述第1生長層之積層體冷卻; 第2生長步驟,其係於上述冷卻步驟之後,在使上述基底基板固著於上述基座之狀態下,於上述第1生長層之上藉由HVPE法使III族氮化物半導體生長而形成第2生長層;及 切下步驟,其係切下上述第2生長層之至少一部分作為上述半極性晶種基板。In the following, examples of reference forms are appended. 1. A method for manufacturing a semi-polar independent substrate, which performs: a preparation step, which is to prepare a semi-polar seed substrate with a semi-polar surface as a main surface and containing a group III nitride semiconductor; A step of forming a group III nitride semiconductor layer, which is to epitaxially grow a group III nitride semiconductor on the above semi-polar seed substrate to form a group III nitride semiconductor layer; A cutting step, which is to cut a semipolar independent substrate with a semipolar plane as its main surface from the above-mentioned group III nitride semiconductor layer; and A processing step which is to remove all the group III nitride semiconductor layers from the semi-polar seed substrate remaining a part of the group III nitride semiconductor layer after the cutting step; and then use the group III nitride to remove The semi-polar seed crystal substrate after the semiconductor layer is subjected to the group III nitride semiconductor layer forming step and the cutting step. 2. The manufacturing method of semipolar independent substrate as in 1, which is In the above processing step, a part of the surface side of the semi-polar seed substrate that is in contact with the group III nitride semiconductor layer is removed. 3. The manufacturing method of semi-polar independent substrate like 1 or 2, which is In the above processing steps, the removal of all the above-mentioned Group III nitride semiconductor layers was confirmed by surface observation. 4. The method for manufacturing a semi-polar independent substrate according to any one of 1 to 3, which It further includes a judgment step to judge whether the above semi-polar seed substrate can be reused, When it is judged that it is reusable in the judgment step, the semi-polar seed crystal substrate is reused, When it is determined in the above determination step that it cannot be reused, the reuse of the semi-polar seed substrate is ended. 5. The manufacturing method of semipolar independent substrate as in 4, which is In the above determination step, when the radius of curvature of the semi-polar seed crystal substrate is above a reference value, it is determined to be reusable, and when the radius of curvature of the semi-polar seed crystal substrate does not reach the reference value, it is determined as Cannot be reused. 6. The manufacturing method of semipolar independent substrate as in 4, which is In the above determination step, when the specific crack is not generated in the semi-polar seed crystal substrate, it is determined to be reusable, and when the specific crack is generated in the semi-polar seed crystal substrate, it is determined that it cannot be reused. 7. The manufacturing method of semi-polar independent substrate as in 4, which is In the above determination step, when the thickness of the semi-polar seed substrate is greater than or equal to the reference value, it is determined to be reusable, and when the thickness of the semi-polar seed substrate does not reach the reference value, it is determined that it is no longer possible use. 8. The manufacturing method of semipolar independent substrate as in 4, which is In the above determination step, when the surface roughness of the semi-polar seed crystal substrate does not reach the reference value, it is determined to be reusable, and when the surface roughness of the semi-polar seed crystal substrate is above the reference value, It is judged that it cannot be reused. 9. The manufacturing method of semi-polar independent substrate as in 4, which is In the above determination step, it is determined that the surface of the semi-polar seed crystal substrate is not reusable when scratches are not generated, and when the surface of the semi-polar seed crystal substrate is scratched, it is determined that it is not reusable. 10. The method for manufacturing a semipolar independent substrate according to any one of 1 to 9, wherein The main surface of the above semi-polar seed crystal substrate is a surface having an off angle within 15° from the {hklm} surface, In the above-mentioned cutting step, the above semipolar independent substrate with the {hklm} plane as the main surface is cut. 11. The manufacturing method of the semipolar independent substrate as in 10, wherein The main surface of the above-mentioned semi-polar seed crystal substrate is a surface having a deviation angle within 15° from the {-1-12-3} plane. 12. The method for manufacturing a semipolar independent substrate according to any one of 1 to 11, wherein The above preparation steps include: The fixing step is to fix the base substrate including the group III nitride semiconductor layer with the semipolar plane as the main surface to the base; The first growth step is to fix the group III nitride on the main surface of the group III nitride semiconductor layer by HVPE (Hydride Vapor Phase Epitaxy) method with the base substrate fixed to the pedestal The semiconductor grows to form the first growth layer; The cooling step is to cool the laminate including the susceptor, the base substrate, and the first growth layer; The second growth step is that after the cooling step, the group III nitride semiconductor is grown by the HVPE method on the first growth layer in a state where the base substrate is fixed to the pedestal to form the first 2 Growth layer; and In the cutting step, at least a part of the second growth layer is cut out as the semi-polar seed substrate.

本申請主張以2018年8月27日提出申請之日本申請特願2018-158077號為基礎之優先權,將其揭示之全部內容引入至本文。This application claims priority based on Japanese Application No. 2018-158077 filed on August 27, 2018, and incorporates the entire contents of the disclosure.

1:半極性晶種基板 2:III族氮化物半導體層 2-1:III族氮化物半導體層之殘存部 2-2:III族氮化物半導體層之分離部 10:基底基板 11:藍寶石基板 12:III族氮化物半導體層 20:基座 30:第1生長層 31:裂痕 40:第2生長層 51:第1部分 52:第2部分 A:區域 B:區域 S10:準備步驟 S11:固著步驟 S12:第1生長步驟 S13:冷卻步驟 S14:第2生長步驟 S15:晶種基板切下步驟 S20:III族氮化物半導體層形成步驟 S30:切下步驟 S40:加工步驟 S50:判斷步驟1: Semi-polar seed substrate 2: Group III nitride semiconductor layer 2-1: Remaining part of III-nitride semiconductor layer 2-2: Separation part of III-nitride semiconductor layer 10: base substrate 11: Sapphire substrate 12: III-nitride semiconductor layer 20: Dock 30: 1st growth layer 31: Crack 40: 2nd growth layer 51: Part 1 52: Part 2 A: area B: area S10: Preparation steps S11: fixation steps S12: 1st growth step S13: cooling step S14: 2nd growth step S15: Seeding substrate cutting step S20: Group III nitride semiconductor layer forming step S30: Cut off the steps S40: Processing steps S50: Judgment step

上述之目的及其他目的、特徵及優點係藉由以下敍述之較佳之實施形態及隨附於其之以下之圖式而變得更明確。The above-mentioned object and other objects, features, and advantages are made clearer by the preferred embodiments described below and the drawings attached to it.

圖1係表示本實施形態之半極性獨立基板之製造方法的處理流程之一例之流程圖。 圖2(1)~(3)係表示本實施形態之半極性獨立基板之製造方法的處理流程之一例之步驟圖。 圖3係表示本實施形態之準備步驟之處理流程之一例的流程圖。 圖4(1)~(5)係表示本實施形態之準備步驟之處理流程之一例的步驟圖。 圖5(1)、(2)係表示本實施形態之半極性晶種基板之一例之模式圖。 圖6係用於說明本實施形態之半極性晶種基板之構成之圖。 圖7係用於說明本實施形態之半極性晶種基板之構成之圖。 圖8係表示本實施形態之半極性獨立基板之製造方法的處理流程之一例之流程圖。 圖9係表示實施例1之半極性獨立基板之表面之圖。 圖10係表示實施例1之GaN層之表面之圖。 圖11係用於說明實施例之切片位置之圖。 圖12係表示實施例1之經分離之GaN層之切片面的圖。 圖13係表示實施例1之殘存於半極性晶種基板之GaN層之切片面的圖。 圖14係表示實施例1之利用前之半極性晶種基板及再利用前之半極性晶種基板之表面的圖。 圖15係表示實施例2之半極性獨立基板之表面之圖。 圖16係表示實施例2之生長階段之GaN層之表面的圖。 圖17係表示實施例2之生長階段之GaN層之表面的圖。 圖18係表示實施例2之經分離之GaN層之切片面的圖。 圖19係表示實施例2之殘存於半極性晶種基板之GaN層之切片面的圖。 圖20係表示實施例2之存在於半極性晶種基板之中心部之貫通孔的圖。 圖21係表示存在於圖19所示之GaN層之切片面之中心部的貫通孔之圖。 圖22係表示比較例1之晶種基板之表面之圖。 圖23係表示比較例1之GaN層之表面之圖。 圖24係表示比較例2之晶種基板之表面之圖。 圖25係表示比較例2之GaN層之表面之圖。 圖26係表示比較例3之晶種基板之表面之圖。 圖27係表示比較例3之GaN層之表面之圖。FIG. 1 is a flowchart showing an example of the processing flow of the manufacturing method of the semipolar independent substrate of this embodiment. 2(1) to (3) are step diagrams showing an example of the processing flow of the manufacturing method of the semipolar independent substrate of this embodiment. FIG. 3 is a flowchart showing an example of the processing flow of the preparation step of this embodiment. 4(1) to (5) are step diagrams showing an example of the processing flow of the preparation step of this embodiment. 5(1) and (2) are schematic views showing an example of the semi-polar seed substrate of this embodiment. FIG. 6 is a diagram for explaining the configuration of the semi-polar seed crystal substrate of this embodiment. FIG. 7 is a diagram for explaining the configuration of the semi-polar seed substrate of this embodiment. FIG. 8 is a flowchart showing an example of the processing flow of the manufacturing method of the semipolar independent substrate of this embodiment. 9 is a diagram showing the surface of the semipolar independent substrate of Example 1. FIG. 10 is a diagram showing the surface of the GaN layer of Example 1. FIG. Fig. 11 is a diagram for explaining the slicing position of the embodiment. 12 is a diagram showing a sliced surface of the separated GaN layer of Example 1. FIG. 13 is a diagram showing the sliced surface of the GaN layer remaining in the semipolar seed crystal substrate of Example 1. FIG. 14 is a diagram showing the surface of the semipolar seed crystal substrate before use and the semipolar seed crystal substrate before reuse in Example 1. FIG. 15 is a diagram showing the surface of the semipolar independent substrate of Example 2. FIG. 16 is a diagram showing the surface of the GaN layer in the growth stage of Example 2. FIG. 17 is a diagram showing the surface of the GaN layer in the growth stage of Example 2. FIG. 18 is a diagram showing a sliced surface of the separated GaN layer of Example 2. FIG. 19 is a diagram showing a sliced surface of the GaN layer remaining in the semipolar seed crystal substrate of Example 2. FIG. 20 is a diagram showing a through hole existing in the central portion of the semipolar seed substrate of Example 2. FIG. FIG. 21 is a view showing a through hole existing in the center of the slice surface of the GaN layer shown in FIG. 19. 22 is a diagram showing the surface of the seed substrate of Comparative Example 1. FIG. 23 is a diagram showing the surface of the GaN layer of Comparative Example 1. FIG. 24 is a diagram showing the surface of the seed substrate of Comparative Example 2. FIG. 25 is a diagram showing the surface of the GaN layer of Comparative Example 2. FIG. 26 is a diagram showing the surface of the seed substrate of Comparative Example 3. FIG. FIG. 27 is a diagram showing the surface of the GaN layer of Comparative Example 3. FIG.

S10:準備步驟 S10: Preparation steps

S20:III族氮化物半導體層形成步驟 S20: Group III nitride semiconductor layer forming step

S30:切下步驟 S30: Cut off the steps

S40:加工步驟 S40: Processing steps

Claims (12)

一種半極性獨立基板之製造方法,其執行:準備步驟,其係準備以半極性面為主面且包含III族氮化物半導體之半極性晶種基板; III族氮化物半導體層形成步驟,其係於上述半極性晶種基板之上使III族氮化物半導體磊晶生長,而形成III族氮化物半導體層; 切下步驟,其係自上述III族氮化物半導體層切下以半極性面為主面之半極性獨立基板;及 加工步驟,其係於上述切下步驟之後,自殘存有上述III族氮化物半導體層之一部分之上述半極性晶種基板去除所有上述III族氮化物半導體層;之後再利用去除上述III族氮化物半導體層後之上述半極性晶種基板,進行上述III族氮化物半導體層形成步驟及上述切下步驟。A method for manufacturing a semi-polar independent substrate, which performs: a preparation step, which is to prepare a semi-polar seed substrate with a semi-polar surface as a main surface and containing a group III nitride semiconductor; A step of forming a group III nitride semiconductor layer, which is to epitaxially grow a group III nitride semiconductor on the above semi-polar seed substrate to form a group III nitride semiconductor layer; A cutting step, which is to cut a semipolar independent substrate with a semipolar plane as its main surface from the above-mentioned group III nitride semiconductor layer; and A processing step which is to remove all the group III nitride semiconductor layers from the semi-polar seed substrate remaining a part of the group III nitride semiconductor layer after the cutting step; and then use the group III nitride to remove The semi-polar seed crystal substrate after the semiconductor layer is subjected to the group III nitride semiconductor layer forming step and the cutting step. 如請求項1之半極性獨立基板之製造方法,其係 於上述加工步驟中,去除上述半極性晶種基板之與上述III族氮化物半導體層相接之面側之一部分。For the manufacturing method of semi-polar independent substrate of claim 1, it is In the above processing step, a part of the surface side of the semi-polar seed substrate that is in contact with the group III nitride semiconductor layer is removed. 如請求項1或2之半極性獨立基板之製造方法,其係 於上述加工步驟中,藉由表面觀察而確認所有上述III族氮化物半導體層之去除。If the manufacturing method of semi-polar independent substrate of claim 1 or 2, it is In the above processing steps, the removal of all the above-mentioned Group III nitride semiconductor layers was confirmed by surface observation. 如請求項1或2之半極性獨立基板之製造方法,其 進而包括判斷上述半極性晶種基板能否再利用之判斷步驟, 於在上述判斷步驟中判斷為可再利用之情形時,將上述半極性晶種基板進行再利用, 於在上述判斷步驟中判斷為無法再利用之情形時,結束上述半極性晶種基板之再利用。For the manufacturing method of semi-polar independent substrate of claim 1 or 2, It further includes a judgment step to judge whether the above semi-polar seed substrate can be reused, When it is judged that it is reusable in the judgment step, the semi-polar seed crystal substrate is reused, When it is determined in the above determination step that it cannot be reused, the reuse of the semi-polar seed substrate is ended. 如請求項4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之曲率半徑為基準值以上之情形時,判斷為可再利用,於上述半極性晶種基板之曲率半徑未達基準值之情形時,判斷為無法再利用。The manufacturing method of semi-polar independent substrate as claimed in item 4 is In the above determination step, when the radius of curvature of the semi-polar seed crystal substrate is above a reference value, it is determined to be reusable, and when the radius of curvature of the semi-polar seed crystal substrate does not reach the reference value, it is determined as Cannot be reused. 如請求項4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板未產生特定之裂痕之情形時,判斷為可再利用,於上述半極性晶種基板產生特定之裂痕之情形時,判斷為無法再利用。The manufacturing method of semi-polar independent substrate as claimed in item 4 is In the above determination step, when the specific crack is not generated in the semi-polar seed crystal substrate, it is determined to be reusable, and when the specific crack is generated in the semi-polar seed crystal substrate, it is determined that it cannot be reused. 如請求項4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之厚度為基準值以上之情形時,判斷為可再利用,於上述半極性晶種基板之厚度未達基準值之情形時,判斷為無法再利用。The manufacturing method of semi-polar independent substrate as claimed in item 4 is In the above determination step, when the thickness of the semi-polar seed substrate is greater than or equal to the reference value, it is determined to be reusable, and when the thickness of the semi-polar seed substrate does not reach the reference value, it is determined that it is no longer possible use. 如請求項4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之表面粗糙度未達基準值之情形時,判斷為可再利用,於上述半極性晶種基板之表面粗糙度為基準值以上之情形時,判斷為無法再利用。The manufacturing method of semi-polar independent substrate as claimed in item 4 is In the above determination step, when the surface roughness of the semi-polar seed crystal substrate does not reach the reference value, it is determined to be reusable, and when the surface roughness of the semi-polar seed crystal substrate is above the reference value, It is judged that it cannot be reused. 如請求項4之半極性獨立基板之製造方法,其係 於上述判斷步驟中,於上述半極性晶種基板之表面未產生傷痕之情形時,判斷為可再利用,於上述半極性晶種基板之表面產生傷痕之情形時,判斷為無法再利用。The manufacturing method of semi-polar independent substrate as claimed in item 4 is In the above determination step, it is determined that the surface of the semi-polar seed crystal substrate is not reusable when scratches are not generated, and when the surface of the semi-polar seed crystal substrate is scratched, it is determined that it is not reusable. 如請求項1或2之半極性獨立基板之製造方法,其中 上述半極性晶種基板之主面係自{hklm}面具有15°以內之偏離角之面, 於上述切下步驟中,切下以{hklm}面為主面之上述半極性獨立基板。The method for manufacturing a semi-polar independent substrate according to claim 1 or 2, wherein The main surface of the above semi-polar seed crystal substrate is a surface having an off angle within 15° from the {hklm} surface, In the above-mentioned cutting step, the above semipolar independent substrate with the {hklm} plane as the main surface is cut. 如請求項10之半極性獨立基板之製造方法,其中 上述半極性晶種基板之主面係自{-1-12-3}面具有15°以內之偏離角之面。The method for manufacturing a semi-polar independent substrate according to claim 10, wherein The main surface of the above-mentioned semi-polar seed crystal substrate is a surface having a deviation angle within 15° from the {-1-12-3} plane. 如請求項1或2之半極性獨立基板之製造方法,其中 上述準備步驟包括: 固著步驟,其係使包含以半極性面為主面之III族氮化物半導體層之基底基板固著於基座; 第1生長步驟,其係於使上述基底基板固著於上述基座之狀態下,於上述III族氮化物半導體層之上述主面上藉由HVPE(Hydride Vapor Phase Epitaxy)法使III族氮化物半導體生長,而形成第1生長層; 冷卻步驟,其係將包含上述基座、上述基底基板及上述第1生長層之積層體冷卻; 第2生長步驟,其係於上述冷卻步驟之後,在使上述基底基板固著於上述基座之狀態下,於上述第1生長層之上藉由HVPE法使III族氮化物半導體生長而形成第2生長層;及 晶種基板切下步驟,其係切下上述第2生長層之至少一部分作為上述半極性晶種基板。The method for manufacturing a semi-polar independent substrate according to claim 1 or 2, wherein The above preparation steps include: The fixing step is to fix the base substrate including the group III nitride semiconductor layer with the semipolar plane as the main surface to the base; The first growth step is to fix the group III nitride on the main surface of the group III nitride semiconductor layer by HVPE (Hydride Vapor Phase Epitaxy) method with the base substrate fixed to the pedestal The semiconductor grows to form the first growth layer; The cooling step is to cool the laminate including the susceptor, the base substrate, and the first growth layer; The second growth step is that after the cooling step, the group III nitride semiconductor is grown by the HVPE method on the first growth layer in a state where the base substrate is fixed to the pedestal to form the first 2 Growth layer; and In the seed crystal substrate cutting step, at least a part of the second growth layer is cut out as the semi-polar seed crystal substrate.
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