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TW201730555A - 感測器及其製造方法 - Google Patents

感測器及其製造方法 Download PDF

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Publication number
TW201730555A
TW201730555A TW105105605A TW105105605A TW201730555A TW 201730555 A TW201730555 A TW 201730555A TW 105105605 A TW105105605 A TW 105105605A TW 105105605 A TW105105605 A TW 105105605A TW 201730555 A TW201730555 A TW 201730555A
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TW
Taiwan
Prior art keywords
wafer
sensor
field effect
effect transistor
polymer substrate
Prior art date
Application number
TW105105605A
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English (en)
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TWI612300B (zh
Inventor
王玉麟
許振彬
陳姵圻
Original Assignee
國立清華大學
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Application filed by 國立清華大學 filed Critical 國立清華大學
Priority to TW105105605A priority Critical patent/TWI612300B/zh
Priority to US15/097,899 priority patent/US10242963B2/en
Publication of TW201730555A publication Critical patent/TW201730555A/zh
Application granted granted Critical
Publication of TWI612300B publication Critical patent/TWI612300B/zh

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    • G—PHYSICS
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Abstract

一種感測器的製造方法，包括以下步驟。提供具有模穴的模具。於模穴中配置至少一晶片。晶片具有相對的主動面與背面。主動面朝向模穴的底面。將高分子材料填入模穴中，以覆蓋晶片的背面。進行熱處理，使得高分子材料固化為高分子基板。進行脫模處理，使得高分子基板從模穴分離出來。於高分子基板的第一表面上形成多條導線。導線與晶片電性連接。

Description

感測器及其製造方法
本發明是有關於一種感測器及其製造方法，且特別是有關於一種整合晶片於高分子基板中的感測器及其製造方法。
系統級封裝（System in Package，SiP）是指將一個系統或子系統的全部或大部分電子功能整合在一個基板中。舉例來說，系統級封裝可包括多種晶片，其可以2D或3D堆疊方式接合（bonded）到所述基板上。所述晶片可例如是處理器、動態隨機存取記憶體（DRAM）、快閃記憶體結合其他被動元件（如電容器、電阻器等）。因此，系統級封裝只需要加入極少的外部元件即可運作。對於現今愈來愈微型化的電子產品而言，系統級封裝不僅具有縮小封裝體積、重量的功效，還可降低功耗。
一般而言，場效電晶體（Field-Effect Transistor，FET）是一種利用電場效應來控制電流大小的半導體元件，由於場效電晶體具有體積小、重量輕、耗電省、壽命長等優點，因此，其應用範圍較廣。舉例來說，場效電晶體可應用在感測器上，其包括氣體感測器或是生物感測器等。然而，當場效電晶體應用在生物感測器時，傳統矽晶圓製程需耗費較多的成本，且具有較低的晶圓面積利用率。
本發明提供一種感測器及其製造方法，其可整合晶片於高分子基板中，以降低製造成本，進而提升商業產品競爭力。
本發明提供一種感測器的製造方法，包括以下步驟。提供具有模穴的模具。於模穴中配置至少一晶片。晶片具有相對的主動面與背面。主動面朝向模穴的底面。將高分子材料填入模穴中，以覆蓋晶片的背面。進行熱處理，使得高分子材料固化為高分子基板。進行脫模處理，使得高分子基板從模穴分離出來。於高分子基板的第一表面上形成多條導線。導線與晶片電性連接。
在本發明的一實施例中，在形成上述導線之後，更包括於晶片上形成微流道結構。
在本發明的一實施例中，在形成上述微流道結構之前，更包括於高分子基板的第一表面上形成保護層。保護層具有開口。開口至少暴露出晶片的感測區。
在本發明的一實施例中，上述高分子基板的第一表面與晶片的主動面為共平面。
在本發明的一實施例中，上述高分子材料包括熱固性樹脂材料。
在本發明的一實施例中，上述熱固性樹脂材料包括環氧樹脂（Epoxy）、聚二甲基矽氧烷（PDMS）、聚甲基丙烯酸甲酯（PMMA）或其組合。
在本發明的一實施例中，上述晶片包括電晶體式晶片、表面聲波式晶片、二極體式晶片、半導體電阻式晶片、微機電式晶片或其組合。
在本發明的一實施例中，上述電晶體式晶片包括高速電子遷移率場效電晶體、矽基場效電晶體、奈米線場效電晶體、奈米碳管場效電晶體、石墨烯場效電晶體、二硫化鉬場效電晶體或其組合。
本發明提供一種感測器，包括高分子基板、至少一晶片以及多條導線。晶片內埋於高分子基板中。晶片具有相對的主動面與背面。主動面外露於高分子基板的第一表面。導線配置於高分子基板上。導線與晶片電性連接。
在本發明的一實施例中，上述感測器更包括微流道結構配置於晶片上。
在本發明的一實施例中，上述高分子基板的第一表面與晶片的主動面為共平面。
在本發明的一實施例中，上述晶片包括電晶體式晶片、表面聲波式晶片、二極體式晶片、半導體電阻式晶片、微機電式晶片或其組合。
在本發明的一實施例中，上述電晶體式晶片包括高速電子遷移率場效電晶體、矽基場效電晶體、奈米線場效電晶體、奈米碳管場效電晶體、石墨烯場效電晶體、二硫化鉬場效電晶體或其組合。
基於上述，本發明藉由將晶片內埋於高分子基板中，使得高分子基板的表面與晶片的主動面為共平面。接著，將微流道結構配置於晶片上，以形成一種結合微流道與晶片的感測器。所述感測器不僅可降低製造成本，亦與習知半導體製程相容。因此，在商業市場上，本發明之感測器具有產品競爭力。此外，本發明亦可整合多種晶片於高分子基板中，所述晶片可分別具有氣體感測、壓力感測、濕度感測等特性，以達到系統級封裝的功效。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
參照本實施例之圖式以更全面地闡述本發明。然而，本發明亦可以各種不同的形式體現，而不應限於本文中所述之實施例。圖式中的層與區域的厚度會為了清楚起見而放大。相同或相似之參考號碼表示相同或相似之元件，以下段落將不再一一贅述。
圖1A至圖1F繪示為本發明之一實施例的一種感測器的製造流程示意圖。
請參照圖1A，本發明之一實施例提供一種感測器的製造方法，其步驟如下。首先，提供具有模穴102的模具100。在一實施例中，模具100的材料可例如是聚二甲基矽氧烷（PDMS）、壓克力或是其他合適的材料。模穴102凹陷於模具100的表面，其中模穴102的凹陷深度可小於模具100的厚度。在本實施例中，模穴102的形狀可例如是矩形，但本發明不限於此。在其他實施例中，模穴102的形狀可例如是方形、圓形或是多邊形。
接著，於模穴102中配置晶片104。晶片104具有相對的主動面104a與背面104b。晶片104的主動面104a朝向模穴102的底面。在一實施例中，晶片104可包括電晶體式晶片、表面聲波式晶片、二極體式晶片、半導體電阻式晶片、微機電式晶片或其組合。電晶體式晶片可例如是高速電子遷移率場效電晶體（High Electron Mobility Transistors，HEMT）、矽基場效電晶體、奈米線場效電晶體、奈米碳管場效電晶體、石墨烯場效電晶體、二硫化鉬場效電晶體或其組合。雖然在圖1A中僅繪示一個晶片104，但本發明不以此為限。在其他實施例中，晶片104的數量與種類可依使用者需求而調整。舉例來說，晶片104可例如是具有氣體感測、壓力感測、濕度感測、微塵感測等各種機械與物理感測特性。在此實施例中，可將具有各種感測特性的晶片104配置於模穴102中，使得本實施例之感測器可具有更多的彈性，以更加貼近客戶或是使用者的需求。
請參照圖1A與圖1B，將高分子材料106填入模穴102中，以覆蓋晶片104的背面104b。在一實施例中，高分子材料106包括熱固性樹脂材料。熱固性樹脂材料可例如是環氧樹脂（Epoxy）、聚二甲基矽氧烷（PDMS）、聚甲基丙烯酸甲酯（PMMA）或其組合，但本發明不以此為限。在其他實施例中，高分子材料106可以是具有低熱膨脹係數的材料，或是可承受後續導線的蒸鍍製程溫度或是濺鍍製程溫度的材料即為本發明的範疇。雖然在圖1B中，高分子材料106完全填滿模穴102，但本發明不以此為限。在其他實施例中，高分子材料106亦可不完全填滿模穴102。也就是說，只要高分子材料106能覆蓋晶片104的背面104b，使得晶片104內埋於高分子材料106中即為本發明的範疇。
請參照圖1B與圖1C，進行熱處理，使得高分子材料106固化為高分子基板106a。由於高分子材料106可例如是熱固性樹脂材料，因此，在進行熱處理時，高分子材料106可固化為固體狀態的高分子基板106a。此時，晶片104內埋於高分子基板106a中。而晶片104的主動面104a外露於高分子基板106的第一表面S1。在一實施例中，熱處理的溫度可例如是50℃至200℃。
之後，進行脫模處理，使得高分子基板106a從模穴102分離出來。然後，將高分子基板106a倒置，使得高分子基板106a的第一表面S1朝上，並使得第二表面S2朝下。在本實施例中，脫模處理沒有特別限制，其可例如是直接以手動方式讓高分子基板106a從模穴102分離出來。
進行脫模處理後的高分子基板106a（或是感測器）如圖1D所示，其高分子基板106a的第一表面S1與晶片104的主動面104a可視為共平面。在一實施例中，高分子基板106a的長度L可例如是10 mm至50 mm；其寬度W可例如是5 mm至30 mm；而其高度H可例如是0.5 mm至2 mm。但本發明不以此為限，其尺寸可依據使用者需求來調整。舉例來說，本發明之感測器的尺寸可符合微安全數位記憶卡（Micro Secure Digital，Micro SD）的尺寸，其長度可例如是20 mm；其寬度可例如是10 mm；其高度可例如是0.7 mm。因此，本發明之感測器可與現行的微安全數位記憶卡的讀取裝置相符，以讀取生物檢測的結果。
請參照圖1D與圖1E，於高分子基板106a的第一表面S1上形成導線110、120、130。導線110、120、130與晶片104電性連接。在一實施例中，導線110、120、130可以是金屬導線，金屬導線的材料可例如是金、銀、銅或其組合。導線110、130的材料與導線120的材料可以相同或是不同。舉例來說，導線110、120、130的材料可皆為金。在另一實施例中，導線110、130的材料可例如是銅，而導線120的材料可例如是金。在一實施例中，導線110、120、130的形成方法可例如是剝除法（lift-off process），由於剝除法為所屬領域具有通常知識者所周知，於此便不再詳述。
值得注意的是，本實施例之感測器可利用高分子基板106a取代傳統的矽晶圓基板，以降低製造成本，進而增加商業產品的競爭力。另外，由於本實施例之感測器的導線110、120、130是形成在高分子基板106a上，因此，相較於傳統的矽基感測器（Si-based sensor），本實施例之晶片104可有效地縮小，以增加感測器的面積利用率。
圖2繪示為圖1E之部分感測器的上視示意圖。圖3繪示為圖2之A-A’切線的剖面示意圖。為圖面清楚起見，在圖3中僅繪示出晶片，而未繪示出高分子基板；在圖2中未繪示出保護層。
請同時參照圖1E、圖2以及圖3，部分感測器P包括高分子基板106a、導線110、120、130以及晶片104。晶片104包括源極端112、汲極端114以及設置於源極端112與汲極端114之間的閘極端116。如圖2所示，導線110與源極端112電性連接，導線130與汲極端114電性連接。另一方面，導線120可包括反應層122。反應層122相對於晶片104的閘極端116，且反應層122（亦或導線120）與閘極端116並未電性連接。反應層122上具有感測區140，其中感測區140包括鍵結於反應層122上的受體（receptor）。
具體來說，在進行生物檢測時，是將具有能與所述受體產生反應的配體的待測樣品放置在感測區140（亦或反應層122）上，使得所述配體鍵結於所述受體上。接著，施加一電壓於導線120的反應層122上，使得反應層122與晶片104的閘極端116之間產生一壓差，以得到檢測電流。所述受體與所述配體的選擇並沒有特別的限制，只要所述配體能與所述感測器上的受體相互反應鍵結即為本發明的範疇。在一實施例中，所述待測樣品可例如是核糖核酸（Ribonucleic acid，RNA）、去氧核糖核酸（Deoxyribonucleic acid，DNA）、酵素、蛋白質、病毒、脂質或其組合，但本發明不以此為限。
另一方面，如圖3所示，以高速電子遷移率場效電晶體（HEMT）為例來說明，晶片104的結構是在藍寶石（sapphire）基板200上依序形成GaN層202以及AlGaN層204。在一實施例中，AlGaN層204的尺寸小於GaN層202。換言之，GaN層202的部分頂面被暴露出來。接著，在AlGaN層204上分別形成歐姆接觸層206、208，其中歐姆接觸層206、208彼此不互相接觸。在一實施例中，歐姆接觸層206、208的材料可例如是Ti、Al、Ni、Au、Cr、Mo、Pt或其組合，其形成方法可例如是蒸鍍或濺鍍法。
之後，在歐姆接觸層206上形成源極端112（可例如源極電極或導線110的延伸）；在歐姆接觸層208上形成汲極端114（可例如汲極電極或導線130的延伸）。在一實施例中，源極端112與汲極端114的材料可包括一種或一種以上的導電材料，所述導電材料可例如是金屬材料、金屬化合物或其組合。金屬材料可例如是Ti、Al、Ni、Au、W或其組合；金屬化合物可例如TiN、TiW、TiWN、WN或其組合。源極端112與汲極端114的形成方法可例如是化學氣相沈積法、物理氣相沈積法或其他適當的形成方法。物理氣相沈積法可以是蒸鍍或濺鍍。
然後，在藍寶石基板200（或是在高分子基板106a的第一表面S1）上形成保護層210。保護層210覆蓋GaN層202、AlGaN層204、歐姆接觸層206、208、源極端112以及汲極端114的表面。保護層210具有開口212，其中開口212暴露出閘極端116的表面（如圖3所示）或是暴露出晶片104的感測區（未繪示）。在一實施例中，保護層210的材料可例如是氮化矽或光阻，其形成方法可例如是化學氣相沈積法或塗布法。在本實施例中，保護層210可避免待測樣品接觸到導線110、120、130，以造成導線110、120、130的損壞。另外，保護層210亦可暴露出靠近導線110、120、130的末端處的區域，以利於電性連接至讀取裝置的插槽。
請參考圖1E與圖1F，於晶片104上形成微流道結構108。詳細地說，微流道結構108具有通道10以及配置於通道10兩側的開口12、14。也就是說，通道10以及開口12、14為連通的空間。通道10對應於（亦或暴露出）晶片104的感測區140（如圖2所示）。在一實施例中，待測樣品可藉由開口12或開口14經由通道10與晶片104的感測區140接觸，以進行生物檢測。在一實施例中，微流道結構108的材料可例如是聚二甲基矽氧烷（PDMS）、聚甲基丙烯酸甲酯（PMMA）或其組合。
在另一實施例中，微流道結構108僅具有通道10，而不具有開口12、14。詳細地說，本實施例可將高分子基板106a的第一表面S1與第二表面S2貫穿，以於通道10的兩側分別形成兩個開口（未繪示），使得通道10與高分子基板106a中的所述兩個開口連通。因此，待測樣品可藉由所述兩個開口經由通道10與晶片104的感測區140接觸，以進行生物檢測。
此外，雖然本實施例的說明是以生物感測器為例，但本發明不以此為限。在其他實施例中，感測器亦可具有氣體感測、壓力感測、濕度感測、微塵感測等各種機械與物理感測特性。
綜上所述，本發明藉由將晶片內埋於高分子基板中，使得高分子基板的表面與晶片的主動面為共平面。接著，將微流道結構配置於晶片上，以形成一種結合微流道與晶片的感測器。所述感測器不僅可降低製造成本，亦與習知半導體製程相容。因此，在商業市場上，本發明之感測器具有產品競爭力。此外，本發明亦可整合多種晶片於高分子基板中，所述晶片可分別具有氣體感測、壓力感測、濕度感測等特性，以達到系統級封裝的功效。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
10‧‧‧通道 12、14、212‧‧‧開口 100‧‧‧模具 102‧‧‧模穴 104‧‧‧晶片 104a‧‧‧主動面 104b‧‧‧背面 106‧‧‧高分子材料 106a‧‧‧高分子基板 108‧‧‧微流道結構 110、120、130‧‧‧導線 112‧‧‧源極端 114‧‧‧汲極端 116‧‧‧閘極端 122‧‧‧反應層 140‧‧‧感測區 200‧‧‧藍寶石基板 202‧‧‧GaN層 204‧‧‧AlGaN層 206、208‧‧‧歐姆接觸層 210‧‧‧保護層 H‧‧‧高度 L‧‧‧長度 W‧‧‧寬度 S1‧‧‧第一表面 S2‧‧‧第二表面 P‧‧‧部分
圖1A至圖1F繪示為本發明之一實施例的一種感測器的製造流程示意圖。 圖2繪示為圖1E之部分感測器的上視示意圖。 圖3繪示為圖2之A-A’切線的剖面示意圖。
10‧‧‧通道
12、14‧‧‧開口
104‧‧‧晶片
104a‧‧‧主動面
106a‧‧‧高分子基板
108‧‧‧微流道結構
110、120、130‧‧‧導線
H‧‧‧高度
L‧‧‧長度
W‧‧‧寬度
S1‧‧‧第一表面

Claims (13)

  1. 一種感測器的製造方法，包括： 提供具有一模穴的一模具； 於該模穴中配置至少一晶片，其中該至少一晶片具有相對的一主動面與一背面，該主動面朝向該模穴的底面； 將一高分子材料填入該模穴中，以覆蓋該晶片的該背面； 進行一熱處理，使得該高分子材料固化為一高分子基板； 進行一脫模處理，使得該高分子基板從該模穴分離出來；以及 於該高分子基板的一第一表面上形成多條導線，其中該些導線與該至少一晶片電性連接。
  2. 如申請專利範圍第1項所述的感測器的製造方法，在形成該些導線之後，更包括於該至少一晶片上形成一微流道結構。
  3. 如申請專利範圍第2項所述的感測器的製造方法，在形成該微流道結構之前，更包括於該高分子基板的該第一表面上形成一保護層，該保護層具有一開口，該開口至少暴露出該至少一晶片的一感測區。
  4. 如申請專利範圍第1項所述的感測器的製造方法，其中該高分子基板的該第一表面與該晶片的該主動面為共平面。
  5. 如申請專利範圍第1項所述的感測器的製造方法，其中該高分子材料包括一熱固性樹脂材料。
  6. 如申請專利範圍第5項所述的感測器的製造方法，其中該熱固性樹脂材料包括環氧樹脂、聚二甲基矽氧烷、聚甲基丙烯酸甲酯或其組合。
  7. 如申請專利範圍第1項所述的感測器的製造方法，其中該至少一晶片包括一電晶體式晶片、一表面聲波式晶片、一二極體式晶片、一半導體電阻式晶片、一微機電式晶片或其組合。
  8. 如申請專利範圍第7項所述的感測器的製造方法，其中該電晶體式晶片包括高速電子遷移率場效電晶體、矽基場效電晶體、奈米線場效電晶體、奈米碳管場效電晶體、石墨烯場效電晶體、二硫化鉬場效電晶體或其組合。
  9. 一種感測器，包括： 一高分子基板； 至少一晶片，內埋於該高分子基板中，其中該至少一晶片具有相對的一主動面與一背面，該主動面外露於該高分子基板的一第一表面；以及 多條導線，配置於該高分子基板上，其中該些導線與該至少一晶片電性連接。
  10. 如申請專利範圍第9項所述的感測器，更包括一微流道結構，配置於該至少一晶片上。
  11. 如申請專利範圍第9項所述的感測器，其中該高分子基板的該第一表面與該晶片的該主動面為共平面。
  12. 如申請專利範圍第9項所述的感測器，其中該至少一晶片包括一電晶體式晶片、一表面聲波式晶片、一二極體式晶片、一半導體電阻式晶片、一微機電式晶片或其組合。
  13. 如申請專利範圍第12項所述的感測器，其中該電晶體式晶片包括高速電子遷移率場效電晶體、矽基場效電晶體、奈米線場效電晶體、奈米碳管場效電晶體、石墨烯場效電晶體、二硫化鉬場效電晶體或其組合。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI795874B (zh) * 2020-08-17 2023-03-11 日商球波股份有限公司 病毒檢查裝置、病毒檢查系統、病毒檢查方法及病毒檢查程式

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7146221B2 (en) 2001-11-16 2006-12-05 The Regents Of The University Of California Flexible electrode array for artifical vision
US7910064B2 (en) 2003-06-03 2011-03-22 Nanosys, Inc. Nanowire-based sensor configurations
TW200931544A (en) 2008-01-10 2009-07-16 Univ Nat Taiwan Flexurable semiconductor device and method
TWI383144B (zh) 2008-09-23 2013-01-21 Univ Nat Chiao Tung 感測元件、製造方法及其生物檢測系統
TW201107749A (en) * 2009-08-24 2011-03-01 Nat Applied Res Laboratories Field-effect-transistor-based bio-sensor and the bio-signal amplification method thereof
TWI372137B (en) 2009-09-04 2012-09-11 Univ Nat Chiao Tung Dielectrophoresis-based microfluidic system
CN104091777B (zh) * 2009-11-17 2017-09-12 伊帆科技股份有限公司 用于处理基材的设备
TWI405968B (zh) * 2009-12-09 2013-08-21 Nat Univ Chung Hsing Folded microfluidic chip and its preparation and application
US8834695B2 (en) 2010-03-09 2014-09-16 Sparkle Power Inc. Droplet manipulations on EWOD microelectrode array architecture
KR101718011B1 (ko) * 2010-11-01 2017-03-21 삼성전자주식회사 반도체 패키지 및 그 제조방법
TW201319563A (zh) 2011-11-08 2013-05-16 Jung-Tang Huang 整合ｉｃ晶片與塑膠微流體基板的檢測系統
US8981578B2 (en) 2012-04-30 2015-03-17 Apple Inc. Sensor array package
JP6044885B2 (ja) * 2012-08-08 2016-12-14 パナソニックＩｐマネジメント株式会社 実装方法
CN103913489B (zh) 2013-01-09 2015-06-10 北京怡成生物电子技术股份有限公司 用于体液中物质实时检测的微型生物芯片
US8963318B2 (en) * 2013-02-28 2015-02-24 Freescale Semiconductor, Inc. Packaged semiconductor device
CN103589631B (zh) 2013-11-19 2015-04-22 苏州晶方半导体科技股份有限公司 生物芯片封装结构及其封装方法
US20170181669A1 (en) * 2014-06-12 2017-06-29 The Trustees Of Columbia University In The City Of New York Graphene-based nanosensor for identifying target analytes

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI795874B (zh) * 2020-08-17 2023-03-11 日商球波股份有限公司 病毒檢查裝置、病毒檢查系統、病毒檢查方法及病毒檢查程式

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