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TW201715231A - 感測裝置及其製造方法 - Google Patents

感測裝置及其製造方法 Download PDF

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Publication number
TW201715231A
TW201715231A TW105133519A TW105133519A TW201715231A TW 201715231 A TW201715231 A TW 201715231A TW 105133519 A TW105133519 A TW 105133519A TW 105133519 A TW105133519 A TW 105133519A TW 201715231 A TW201715231 A TW 201715231A
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TW
Taiwan
Prior art keywords
substrate
layer
sensing device
sensing
manufacturing
Prior art date
Application number
TW105133519A
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English (en)
Inventor
劉滄宇
溫英男
廖季昌
黃玉龍
Original Assignee
精材科技股份有限公司
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Publication of TW201715231A publication Critical patent/TW201715231A/zh

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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
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    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F18/00—Pattern recognition
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    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
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Abstract

本發明實施例提供一種感測裝置的製造方法，包括提供一第一基底。第一基底具有一第一表面及與其相對的一第二表面，且一感測區鄰近於第一表面。在第一表面上提供一暫時性蓋板，以覆蓋感測區。在第二表面上形成一重佈線層，重佈線層電性連接至感測區。在形成重佈線層之後，去除暫時性蓋板。在去除暫時性蓋板之後，將第一基底接合至一第二基底及一蓋板，使得第一基底位於第二基底與蓋板之間。重佈線層電性連接至第二基底。在第二基底與蓋板之間填入一封膠層，以環繞第一基底。

Description

感測裝置及其製造方法
本發明係有關於一種感測裝置及其製造方法，特別為有關於以晶圓級封裝製程製作感測生物特徵的感測裝置。
晶片封裝製程是形成電子產品過程中之重要步驟。晶片封裝體除了將晶片保護於其中，使其免受外界環境污染外，還提供晶片內部電子元件與外界之電性連接通路。具有感測功能的晶片封裝體通常與其他電子構件一起接合於電路板上，進而形成感測裝置，並進一步組合於電子產品內。
然而，傳統的感測裝置的製程繁複、良率低。感測裝置通常凹陷於電子產品外殼內，而不利於使用者的操作，且一旦感測晶片或晶片封裝體毀損或失效，整個感測裝置即無法使用。
因此，有必要尋求一種新穎的感測裝置及其製造方法，其能夠解決或改善上述的問題。
本發明實施例係提供一種感測裝置的製造方法，包括提供一第一基底。第一基底具有一第一表面及與其相對的一第二表面，且一感測區鄰近於第一表面。在第一表面上提供一暫時性蓋板，以覆蓋感測區。在第二表面上形成一重佈線 層，重佈線層電性連接至感測區。在形成重佈線層之後，去除暫時性蓋板。在去除暫時性蓋板之後，將第一基底接合至一第二基底及一蓋板，使得第一基底位於第二基底與蓋板之間。重佈線層電性連接至第二基底。在第二基底與蓋板之間填入一封膠層，以環繞第一基底。
本發明實施例係提供一種感測裝置，包括一第一基底。第一基底位於一第二基底與一蓋板之間。一感測區感測區鄰近於第一基底面向蓋板的表面。一重佈線層位於第一基底與第二基底之間。重佈線層電性連接至感測區及第二基底。一底膠層位於重佈線層與第二基底之間。一封膠層環繞第一基底及底膠層。
本發明實施例係提供一種感測裝置，包括一基底。基底承載於一支撐基底上，且基底具有一第一表面及與其相對的一第二表面。複數感測區鄰近於第一表面，且用以感測生物特徵。複數導電結構位於第二表面，且電性連接至對應的該測區。導電結構彼此電性絕緣。一溝槽延伸於感測區之間及導電結構之間，且露出支撐基底。
100‧‧‧第一基底
100a‧‧‧第一表面
100b‧‧‧第二表面
110‧‧‧感測區
120‧‧‧晶片區
130‧‧‧絕緣層
140‧‧‧導電墊
165‧‧‧暫時性黏著層
170‧‧‧暫時性蓋板
190‧‧‧第一開口
200‧‧‧第二開口
210‧‧‧絕緣層
220‧‧‧重佈線層
230‧‧‧保護層
240‧‧‧孔洞
250‧‧‧導電結構
260‧‧‧第二基底
270A‧‧‧框體
270B‧‧‧切割膠帶
280‧‧‧底膠層
290‧‧‧黏著層
300‧‧‧蓋板
310‧‧‧封膠層
320、330‧‧‧感測裝置
A、B‧‧‧子結構
SC‧‧‧切割道
SC’‧‧‧溝槽
第1A至1E及1G至1I圖係繪示出根據本發明某些實施例之感測裝置的製造方法的剖面示意圖。
第1F圖係繪示出根據本發明某些實施例之感測裝置的製造方法的平面示意圖。
第2A至2C圖係繪示出根據本發明某些實施例之感測裝置 的製造方法的剖面示意圖。
以下將詳細說明本發明實施例之製作與使用方式。然應注意的是，本發明提供許多可供應用的發明概念，其可以多種特定型式實施。文中所舉例討論之特定實施例僅為製造與使用本發明之特定方式，非用以限制本發明之範圍。此外，在不同實施例中可能使用重複的標號或標示。這些重複僅為了簡單清楚地敘述本發明，不代表所討論之不同實施例及/或結構之間具有任何關連性。再者，當述及一第一材料層位於一第二材料層上或之上時，包括第一材料層與第二材料層直接接觸或間隔有一或更多其他材料層之情形。
本發明某些實施例之晶片封裝體可用以封裝微機電系統晶片。然其應用不限於此，例如在本發明之晶片封裝體的實施例中，其可應用於各種包含主動元件或被動元件(active or passive elements)、數位電路或類比電路(digital or analog circuits)等積體電路的電子元件(electronic components)，例如是有關於光電元件(opto electronic devices)、微機電系統(Micro Electro Mechanical System，MEMS)、生物辨識元件(biometric device)、微流體系統(micro fluidic systems)、或利用熱、光線、電容及壓力等物理量變化來測量的物理感測器(Physical Sensor)。特別是可選擇使用晶圓級封裝(wafer scale package，WSP)製程對影像感測元件、發光二極體(light-emitting diodes，LEDs)、太陽能電池(solar cells)、射頻元件(RF circuits)、加速計(accelerators)、陀螺儀(gyroscopes)、指紋辨 識器(fingerprint recognition device)、微制動器(micro actuators)、表面聲波元件(surface acoustic wave devices)、壓力感測器(process sensors)或噴墨頭(ink printer heads)等半導體晶片進行封裝。
其中上述晶圓級封裝製程主要係指在晶圓階段完成封裝步驟後，再予以切割成獨立的封裝體，然而，在一特定實施例中，例如將已分離之半導體晶片重新分布在一承載晶圓上，再進行封裝製程，亦可稱之為晶圓級封裝製程。另外，上述晶圓級封裝製程亦適用於藉堆疊(stack)方式安排具有積體電路之多片晶圓，以形成多層積體電路(multi-layer integrated circuit devices)之晶片封裝體或系統級封裝(System in Package，SIP)之晶片封裝體。
以下配合第1A至1I圖說明本發明某些實施例之感測裝置的製造方法，其中第1A至1E及1G至1I圖係繪示出根據本發明某些實施例之感測裝置的製造方法的剖面示意圖，且第1F圖係繪示出根據本發明某些實施例之感測裝置的製造方法的平面示意圖。
請參照第1A圖，提供一第一基底100，其具有一第一表面100a及與其相對的一第二表面100b，且包括複數晶片區120。為簡化圖式，此處僅繪示出一完整的晶片區120及與其相鄰的晶片區120的一部分。在某些實施例中，第一基底100可為一矽基底或其他半導體基底。在某些實施例中，第一基底100為一矽晶圓，以利於進行晶圓級封裝製程。
第一基底100的第一表面100a上具有一絕緣層 130。一般而言，絕緣層130可由層間介電層(interlayer dielectric，ILD)、金屬間介電層(inter-metal dielectric，IMD)及覆蓋之鈍化層(passivation)組成。為簡化圖式，此處僅繪示出單層絕緣層130。在某些實施例中，絕緣層130可包括無機材料，例如氧化矽、氮化矽、氮氧化矽、金屬氧化物或前述之組合或其他適合的絕緣材料。
在某些實施例中，每一晶片區120的絕緣層130內具有一個或一個以上的導電墊140。在某些實施例中，導電墊140可為單層導電層或具有多層之導電層結構。為簡化圖式，此處僅以單層導電層作為範例說明。在某些實施例中，每一晶片區120的絕緣層130內包括一個或一個以上的開口，露出對應的導電墊140，以透過露出的導電墊140進行預先檢測。
在某些實施例中，每一晶片區120內具有一感測區110。感測區110可鄰近於絕緣層130及第一基底100的第一表面100a，且可透過內連線結構(未繪示)與導電墊140電性連接。在某些實施例中，感測區110用以感測生物特徵，且感測區110內可包括一指紋辨識元件(例如，一電容式指紋辨識元件)。
在某些實施例中，可依序進行半導體裝置的前段(front end)製程(例如，在第一基底100內製作積體電路)及後段(back end)製程(例如，在第一基底100上製作絕緣層130、內連線結構及導電墊140)來提供前述結構。換句話說，以下感測裝置的製造方法係用於對完成後段製程的基底進行後續的封裝製程。
接著，可透過一暫時性黏著層165將一暫時性蓋板 170接合至第一基底100，暫時性蓋板170覆蓋感測區110及導電墊140。暫時性蓋板170用以在後續的製程期間提供保護及支撐的功能。在某些實施例中，暫時性蓋板170可包括玻璃、半導體材料(例如，矽)或其他適合的基底材料。在某些實施例中，暫時性蓋板170的尺寸(例如，寬度及/或長度)大致上等於第一基底100的尺寸。
在某些實施例中，暫時性黏著層165為雙面膠材或其他適合的可移除式黏著材料。形成於暫時性蓋板170與第一基底100之間的暫時性黏著層165完全覆蓋第一基底100的第一表面100a，因此導電墊140及感測區110也被暫時性黏著層165所覆蓋。
請參照第1B圖，以暫時性蓋板170作為承載基板，對第一基底100的第二表面100b進行薄化製程(例如，蝕刻製程、銑削(milling)製程、磨削(grinding)製程或研磨(polishing)製程)，以減少第一基底100的厚度。在某些實施例中，第一基底100薄化後的厚度小於大約100μm(例如，大約85μm)。
接著，透過微影製程及蝕刻製程(例如，乾蝕刻製程、濕蝕刻製程、電漿蝕刻製程、反應性離子蝕刻製程或其他適合的製程)，在每一晶片區120的第一基底100內同時形成複數第一開口190及第二開口200，第一開口190及第二開口200自第一基底100的第二表面100b露出絕緣層130。在其他實施例中，可分別透過刻痕(notching)製程以及微影及蝕刻製程形成第二開口200以及第一開口190。
在某些實施例中，第一開口190對應於導電墊140 而貫穿第一基底100，且第一開口190鄰近於第一表面100a的口徑小於其鄰近於第二表面100b的口徑，因此第一開口190具有傾斜的側壁，進而降低後續形成於第一開口190內的膜層的製程難度，並提高可靠度。舉例來說，由於第一開口190鄰近於第一表面100a的口徑小於其鄰近於第二表面100b的口徑，因此後續形成於第一開口190內的膜層(例如，後續形成的絕緣層210及重佈線層220)能夠較輕易地沉積於第一開口190與絕緣層130之間的轉角，以避免影響電性連接路徑或產生漏電流的問題。
在某些實施例中，第二開口200沿著相鄰晶片區120之間的切割道SC延伸且貫穿第一基底100，使得每一晶片區120內的第一基底100彼此分離。在某些實施例中，相鄰兩晶片區120內的多個第一開口190沿著第二開口200間隔排列，且第一開口190與第二開口200透過第一基底100的一部分(例如，側壁部分)互相間隔且完全隔離。在某些實施例中，第二開口200可沿著晶片區120延伸而環繞第一開口190。
在某些其他實施例中，第一開口190與第二開口200連通。例如，第一開口190鄰近於第二表面100b的部分與第二開口200鄰近於第二表面100b的部分彼此連通，使得第一基底100具有一側壁部分低於第二表面100b。由於第一開口190與第二開口200彼此連通，而並非透過第一基底100的一部分完全隔離，因此能夠防止應力累積於第一開口190與第二開口200之間的第一基底100，且可藉由第二開口200緩和及釋放應力，進而避免第一基底100的側壁部分出現破裂。
請參照第1C圖，可透過沉積製程(例如，塗佈製程、物理氣相沈積製程、化學氣相沈積製程或其他適合的製程)，在第一基底100的第二表面100b上形成一絕緣層210，絕緣層210順應性沉積於第一開口190及第二開口200的側壁及底部上。在某些實施例中，絕緣層210可包括環氧樹脂、無機材料(例如，氧化矽、氮化矽、氮氧化矽、金屬氧化物或前述之組合)、有機高分子材料(例如，聚醯亞胺樹脂、苯環丁烯、聚對二甲苯、萘聚合物、氟碳化物、丙烯酸酯)或其他適合的絕緣材料。
接著，可透過微影製程及蝕刻製程，去除第一開口190底部的絕緣層210及其下方的絕緣層130，使得第一開口190延伸至絕緣層130內而露出對應的導電墊140。
可透過沉積製程(例如，塗佈製程、物理氣相沉積製程、化學氣相沉積製程、電鍍製程、無電鍍製程或其他適合的製程)、微影製程及蝕刻製程，在絕緣層210上形成圖案化的重佈線層220。重佈線層220順應性延伸至第一開口190的側壁及底部，而未延伸至第二開口200內，且重佈線層220延伸至第一開口190與第二開口200之間的第二表面100b上。
在某些實施例中，重佈線層220可透過絕緣層210與第一基底100電性隔離，且可經由第一開口190直接電性接觸或間接電性連接露出的導電墊140。因此，第一開口190內的重佈線層220也稱為矽通孔電極(through silicon via，TSV)。在其他實施例中，重佈線層220也可能以T型接觸(T-contact)或其他適合的方式電性連接至對應的導電墊140。在某些實施例中， 重佈線層220可包括鋁、銅、金、鉑、鎳、錫、前述之組合、導電高分子材料、導電陶瓷材料(例如，氧化銦錫或氧化銦鋅)或其他適合的導電材料。
請參照第1D圖，可透過沉積製程，在第一基底100的第二表面100b上形成一保護層230，且填入第一開口190及第二開口200，以覆蓋重佈線層220。在某些實施例中，保護層230可包括環氧樹脂、綠漆、無機材料(例如，氧化矽、氮化矽、氮氧化矽、金屬氧化物或前述之組合)、有機高分子材料(例如，聚醯亞胺樹脂、苯環丁烯、聚對二甲苯、萘聚合物、氟碳化物、丙烯酸酯)或其他適合的絕緣材料。
在某些實施例中，保護層230僅部分填充第一開口190而未填滿第一開口190，使得一孔洞240形成於第一開口190內的重佈線層220與保護層230之間。由於保護層230部分填充於第一開口190而留下孔洞240，因此後續製程中遭遇熱循環(Thermal Cycle)時，孔洞240能夠作為保護層230與重佈線層220之間的緩衝，以降低保護層230與重佈線層220之間由於熱膨脹係數不匹配所引發不必要的應力，且防止外界溫度或壓力劇烈變化時保護層230會過度拉扯重佈線層220，進而可避免靠近導電墊結構的重佈線層220剝離甚至斷路的問題。在某些實施例中，孔洞240與保護層230之間的界面具有拱形輪廓。在某些實施例中，重佈線層220的末端可位於孔洞240內。在某些其他實施例中，保護層230亦可填滿第一開口190。
接著，可透過微影製程及蝕刻製程，在第一基底100的第二表面100b上的保護層230內形成開口，以露出圖案化 的重佈線層220的一部分。接著，可透過電鍍製程、網版印刷製程或其他適合的製程，在保護層230的開口內填入導電結構250(例如，焊球、凸塊或導電柱)，以與露出的重佈線層220電性連接。在某些實施例中，導電結構250可包括錫、鉛、銅、金、鎳、或前述之組合。
請參照第1E圖，在形成導電結構250之後，將暫時性黏著層165及暫時性蓋板170去除，且露出絕緣層130。在某些實施例中，經由加熱來消除暫時性黏著層165的黏性，進而將暫時性蓋板170分離及移除(debond)。例如，可利用紫外光(ultraviolet，UV)來進行加熱。
接著，將第一基底100承載於一支撐基底上。在某些實施例中，支撐基底可包括框體270A及由框體270A圍繞的切割膠帶270B，如第1F圖所示。之後，沿著切割道SC(等同於沿著第二開口200)切割保護層230及絕緣層130，進而形成複數獨立的子結構A。舉例來說，可使用切割刀具或雷射進行切割製程，其中使用雷射切割製程可以避免上下膜層發生位移。
在某些實施例中，第一基底100為晶圓級尺寸的基底，且可切割出多個晶片級尺寸(chip level)的子結構A，多個子結構A之間彼此電性絕緣。在某些實施例中，分離的第一基底100及切割後的絕緣層130可共同視為晶片/晶粒。在某些實施例中，進行切割製程之後，沿著切割道SC形成一溝槽SC’，溝槽SC’延伸於多個感測區110之間及多個導電結構250之間，且露出一部份的支撐基底(例如，切割膠帶270B)，如第1F圖所示。
在某些實施例中，可利用支撐基底承載切割後的子結構A而直接運送多個子結構A。在某些實施例中，在運送的過程中，支撐基底上的多個子結構A上方貼附有一保護膠帶，使得所有的感測區110皆能夠避免受到汙染或破壞而影響感測性能。之後，可移除保護膠帶，且將各個子結構A自支撐基底取起，並繼續對子結構A進行後續的製程。
請參照第1G圖，提供一第二基底260。在某些實施例中，第二基底260可包括一電路板、一陶瓷基底或其他適合的基底材料。接著，將子結構A接合至第二基底260上，且導電墊140透過第一基底100的第二表面100b上的重佈線層220及導電結構250而與第二基底260電性連接。舉例來說，導電結構250可由焊料(solder)所構成，將子結構A自支撐基底取起且放置於第二基底260上後，可進行回焊(reflow)製程，以透過焊球將子結構A接合至第二基底260上。
在某些實施例中，在將子結構A接合至第二基底260上之前，可透過表面黏著技術(surface mount technology，SMT)將所需的被動元件(例如，電感、電容、電阻或其他電子部件)形成於第二基底260上。如此一來，可盡可能防止子結構A受到外界環境的汙染。在某些其他實施例中，可能透過同一回焊製程將子結構A及上述被動元件同時接合至第二基底260上，或者也可能在將子結構A接合至第二基底260上之後，透過表面黏著技術將上述被動元件形成於已接合子結構A的第二基底260上。
接著，可透過點膠(dispensing)製程或其他適合製 程，將一底膠層280填入保護層230與第二基底260之間。底膠層280連續地環繞導電結構250，以保護導電結構250。在某些實施例中，底膠層280與重佈線層220因保護層230而互相分離。在某些實施例中，底膠層280由具有高擴散性及流動性且可加熱固化的材料所構成。在某些實施例中，底膠層280包括樹脂或其他適合的材料。
在某些實施例中，加熱固化後的底膠層280的側壁可能由於毛細現象而具有曲形表面。在某些實施例中，底膠層280完全填滿子結構A與第二基底260之間的空間。再者，底膠層280延伸超出子結構A的邊緣，且露出第二基底260的上表面的一部分。在某些其他實施例中，底膠層280可完全覆蓋第二基底260的上表面。
請參照第1H圖，透過一黏著層290將一蓋板300接合於子結構A上，使得子結構A位於蓋板300與第二基底260之間。在某些實施例中，在形成底膠層280之後，可先對已接合子結構A的第二基底260進行檢測，而僅對品質良好的封裝構件進行後續製程(例如，接合高品質及高成本的蓋板300)，因此能夠確保感測裝置的品質，並有效節省製造成本。
在某些實施例中，黏著層290包括黏著膠或其他具有黏性的材料。在某些實施例中，位於子結構A與蓋板300之間的黏著層290包括高介電常數(K)材料，以增加感測裝置的感測靈敏度。在某些實施例中，蓋板300包括藍寶石(sapphire)材料或其他適合的材料，以提供耐磨、防刮及高可靠度的平坦表面，進而避免在使用感測裝置之感測功能的過程中感測裝置受 到汙染或破壞。再者，蓋板300具有遮蔽性，例如蓋板300由具有色彩且非透明的材料所構成。
在某些實施例中，蓋板300的尺寸(例如，寬度及/或長度)大於子結構A的尺寸。在某些實施例中，蓋板300的尺寸(例如，寬度及/或長度)大致上等於第二基底260的尺寸。在某些其他實施例中，蓋板300的尺寸可大於第二基底260的尺寸。蓋板300的尺寸不小於第二基底260的尺寸可確保感測裝置能夠容納於電子產品內預定提供給感測裝置的空間，以使感測裝置後續可順利組合於電子產品之中。
接著，可透過點膠製程、模塑成型(molding)製程或其他適合製程，將一封膠層310填入蓋板300與第二基底260所圍成的空間，且將封膠層310加熱固化，進而完成感測裝置320的製作。封膠層310連續地環繞位於蓋板300與第二基底260之間的子結構A，以保護子結構A。在某些實施例中，封膠層310進一步連續地環繞黏著層290及底膠層280，且封膠層310與底膠層280共同完全填滿蓋板300與第二基底260之間的空間。
在某些實施例中，封膠層310由具有高擴散性及流動性且可加熱固化的材料所構成。在某些實施例中，封膠層310包括底膠材料、模塑成型材料或其他適合的材料(例如，樹脂)。在某些實施例中，加熱固化後的封膠層310的側壁由於毛細現象而具有曲形表面。在某些實施例中，封膠層310可能延伸至第二基底260的側壁。
在某些實施例中，底膠層280及封膠層310可包括相同或不同材料。在某些實施例中，底膠層280與封膠層310之 間具有一可視界面。在某些其他實施例中，底膠層280與封膠層310之間可能沒有可視界面。
以下配合第2A至2C圖說明本發明某些實施例之感測裝置的製造方法。第2A至2C圖係繪示出根據本發明某些實施例之感測裝置的製造方法的剖面示意圖，其中相同於第1A至1I圖中的部件係使用相同的標號並省略其說明。
請參照第2A圖，可透過與第1A圖相同或相似之步驟，藉由暫時性黏著層165將暫時性蓋板170接合至第一基底100。接著，透過與第1B圖相同或相似之步驟，對第一基底100進行薄化製程，且在第一基底100內形成第一開口190及第二開口200。接著，透過與第1C圖相同或相似之步驟，在基底100的第二表面100b上形成絕緣層210及重佈線層220。
之後，透過與第1E圖相同或相似之步驟，將暫時性黏著層165及暫時性蓋板170去除。接著，透過與第1F圖相同或相似之步驟，沿著切割道SC(等同於沿著第二開口200)進行切割製程，進而形成複數獨立的子結構B。在某些實施例中，子結構B中的第一基底100的第二表面100b上不具有保護層，因而完全露出重佈線層220。在某些其他實施例中，也可選擇性在第一基底100的第二表面100b上形成保護層(例如，保護層230)，且在保護層內形成露出重佈線層220的開口。
請參照第2B圖，將子結構B接合至第二基底260上，且透過重佈線層220與第二基底260之間的複數導電結構250而與第二基底260電性連接。在某些實施例中，可使用浸焊(dipping flow)技術形成導電結構250。舉例來說，在將子結構B 接合至第二基底260上之前，預先在第二基底260上形成由焊料所構成的導電結構250，接著進行回焊製程，以透過焊料凸塊或焊墊將子結構B接合至第二基底260上。如此一來，可降低導電結構250的高度，進而有利於縮小感測裝置的整體尺寸。再者，子結構B具有露出的重佈線層220，有利於子結構B順利地電性連接至形成於第二基底260上的導電結構250。
在某些其他實施例中，導電結構250可為導電膠或其他具有黏性的導電材料，以將子結構B黏貼至第二基底260上，且透過導電結構250作為電性連接路徑。如此一來，可更進一步降低導電結構250的高度，且無須使用可能造成汙染問題的回焊製程或浸焊技術。再者，可在將感測裝置B接合至第二基底260上之前，透過表面黏著技術將所需的被動元件(例如，電感、電容、電阻或其他電子部件)形成於第二基底260上。如此一來，可盡可能防止子結構B受到外界環境的汙染。
在某些其他實施例中，可能透過同一回焊製程將子結構B及上述被動元件同時接合至第二基底260上，或者也可能在將子結構B接合至第二基底260上之後，透過表面黏著技術將上述被動元件形成於已接合子結構B的第二基底260上。
請參照第2C圖，可透過點膠製程或其他適合製程，將底膠層280填入重佈線層220與第二基底260之間。底膠層280連續地環繞導電結構250，以保護導電結構250。在某些實施例中，底膠層280直接接觸重佈線層220。在某些實施例中，底膠層280全部填滿第一開口190及/或第二開口200。在某些實施例中，底膠層280局部填入第一開口190及/或第二開口 200內。在某些其他實施例中，底膠層280未填入第一開口190及/或第二開口200內。
接著，可透過與第1H圖相同或相似之步驟，利用黏著層290將蓋板300接合於子結構B上，使得子結構B位於蓋板300與第二基底260之間。接著，可透過與第1I圖相同或相似之步驟，將封膠層310填入蓋板300與第二基底260所圍成的空間，進而完成感測裝置330的製作。
根據本發明的上述實施例，提供了簡化的製程，能夠將感測晶片及所需的被動元件整合於同一感測裝置中，且由於以矽通孔電極作為感測裝置的外部電性連接路徑，而不需進行打線接合製程來形成焊線，因此可有效降低製造成本及縮小感測裝置的尺寸，更有利於提供感測裝置平坦的感測表面。
再者，在製作感測裝置的過程中，暫時性蓋板提供保護及支撐的功能，有效防止感測區受到汙染而影響感測性能，也避免第一基底產生彎曲或翹曲的問題，以提供有利於使用感測功能的平坦表面。再者，在進行切割製程之前(即，在晶圓級製程期間)而非在進行切割製程之後將暫時性蓋板去除，不僅有利於簡化製程步驟，更能夠降低移除暫時性蓋板的製程難度以及進行切割製程的難度。
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可更動與組合上述各種實施例。
100‧‧‧第一基底
100a‧‧‧第一表面
100b‧‧‧第二表面
110‧‧‧感測區
130‧‧‧絕緣層
140‧‧‧導電墊
190‧‧‧第一開口
200‧‧‧第二開口
210‧‧‧絕緣層
220‧‧‧重佈線層
230‧‧‧保護層
240‧‧‧孔洞
250‧‧‧導電結構
260‧‧‧第二基底
280‧‧‧底膠層
290‧‧‧黏著層
300‧‧‧蓋板
310‧‧‧封膠層
320‧‧‧感測裝置
A‧‧‧子結構

Claims (20)

  1. 一種感測裝置的製造方法，包括：提供一第一基底，其中該第一基底具有一第一表面及與其相對的一第二表面，且其中一感測區鄰近於該第一表面；在該第一表面上提供一暫時性蓋板，以覆蓋該感測區；在該第二表面上形成一重佈線層，其中該重佈線層電性連接至該感測區；在形成該重佈線層之後，去除該暫時性蓋板；在去除該暫時性蓋板之後，將該第一基底接合至一第二基底及一蓋板，使得該第一基底位於該第二基底與該蓋板之間，其中該重佈線層電性連接至該第二基底；以及在該第二基底與該蓋板之間填入一封膠層，以環繞該第一基底。
  2. 如申請專利範圍第1項所述之感測裝置的製造方法，更包括在形成該重佈線層之前，自該第二表面對該第一基底進行薄化製程。
  3. 如申請專利範圍第1項所述之感測裝置的製造方法，更包括在去除該暫時性蓋板之後進行切割製程。
  4. 如申請專利範圍第1項所述之感測裝置的製造方法，更包括形成一導電結構，其中該導電結構位於該重佈線層與該第二基底之間，且透過該導電結構將該第一基底接合至該第二基底。
  5. 如申請專利範圍第4項所述之感測裝置的製造方法，其中在將該第一基底接合至該第二基底之前，在該重佈線層上形 成該導電結構。
  6. 如申請專利範圍第4項所述之感測裝置的製造方法，其中在將該第一基底接合至該第二基底之前，在該第二基底上形成該導電結構。
  7. 如申請專利範圍第1項所述之感測裝置的製造方法，更包括在將該第一基底接合至該第二基底之後以及在將該第一基底接合至該蓋板之前，在該第一基底與該第二基底之間填入一底膠層。
  8. 如申請專利範圍第7項所述之感測裝置的製造方法，其中該封膠層更環繞該底膠層。
  9. 如申請專利範圍第1項所述之感測裝置的製造方法，其中透過一黏著層將該第一基底接合至該蓋板。
  10. 如申請專利範圍第1項所述之感測裝置的製造方法，其中該感測區用以感測生物特徵。
  11. 如申請專利範圍第1項所述之感測裝置的製造方法，其中該感測區用於指紋辨識。
  12. 一種感測裝置，包括：一第一基底及一第二基底；一蓋板，其中該第一基底位於該第二基底與該蓋板之間；一感測區，其中該感測區鄰近於該第一基底面向該蓋板的表面；一重佈線層，其中該重佈線層位於該第一基底與該第二基底之間，且該重佈線層電性連接至該感測區及該第二基底；一底膠層，其中該底膠層位於該重佈線層與該第二基底之 間；以及一封膠層，其中該封膠層環繞該第一基底及該底膠層。
  13. 如申請專利範圍第12項所述之感測裝置，其中該蓋板為非透明的。
  14. 如申請專利範圍第12項所述之感測裝置，其中該蓋板包括藍寶石材料。
  15. 如申請專利範圍第12項所述之感測裝置，更包括一導電結構，其中該導電結構位於該重佈線層與該第二基底之間，且被該底膠層所環繞。
  16. 如申請專利範圍第12項所述之感測裝置，更包括一黏著層，其中該黏著層位於該第一基底與該蓋板之間，且該黏著層包括高介電常數材料。
  17. 如申請專利範圍第16項所述之感測裝置，其中該封膠層更環繞該黏著層。
  18. 如申請專利範圍第12項所述之感測裝置，其中該感測區包括感測生物特徵的元件。
  19. 如申請專利範圍第12項所述之感測裝置，其中該感測區包括指紋辨識元件。
  20. 一種感測裝置，包括：一基底，其中該基底具有一第一表面及與其相對的一第二表面；一支撐基底，其中該基底承載於該支撐基底上；複數感測區，其中該等感測區鄰近於該第一表面，且用以感測生物特徵； 複數導電結構，其中該等導電結構位於該第二表面，且電性連接至對應的該等感測區，且其中該等導電結構彼此電性絕緣；以及一溝槽，其中該溝槽延伸於該等感測區之間及該等導電結構之間，且露出該支撐基底。
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