TW201415459A - Resistive random access memory and manufacturing method thereof - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 12
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims abstract description 34
- 239000005751 Copper oxide Substances 0.000 claims abstract description 33
- 229910000431 copper oxide Inorganic materials 0.000 claims abstract description 33
- 230000015654 memory Effects 0.000 claims description 72
- 239000000463 material Substances 0.000 claims description 37
- 238000000034 method Methods 0.000 claims description 37
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 24
- 239000011787 zinc oxide Substances 0.000 claims description 12
- 239000011810 insulating material Substances 0.000 claims description 10
- 229910000420 cerium oxide Inorganic materials 0.000 claims description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims description 9
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 claims description 9
- 239000000395 magnesium oxide Substances 0.000 claims description 9
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 claims description 9
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 9
- BMMGVYCKOGBVEV-UHFFFAOYSA-N oxo(oxoceriooxy)cerium Chemical compound [Ce]=O.O=[Ce]=O BMMGVYCKOGBVEV-UHFFFAOYSA-N 0.000 claims description 9
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 claims description 9
- 238000005240 physical vapour deposition Methods 0.000 claims description 9
- 229910001928 zirconium oxide Inorganic materials 0.000 claims description 9
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 8
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 7
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims description 7
- 229910001887 tin oxide Inorganic materials 0.000 claims description 7
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 6
- 229910000480 nickel oxide Inorganic materials 0.000 claims description 6
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 6
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- 230000003647 oxidation Effects 0.000 claims description 5
- 238000007254 oxidation reaction Methods 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 229910052799 carbon Inorganic materials 0.000 claims description 4
- 229910052804 chromium Inorganic materials 0.000 claims description 4
- 239000011651 chromium Substances 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910052718 tin Inorganic materials 0.000 claims description 4
- 239000011135 tin Substances 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000010936 titanium Substances 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 239000010937 tungsten Substances 0.000 claims description 4
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 3
- 150000001875 compounds Chemical class 0.000 claims description 3
- 229910052707 ruthenium Inorganic materials 0.000 claims description 3
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 claims 1
- 229910052725 zinc Inorganic materials 0.000 claims 1
- 239000011701 zinc Substances 0.000 claims 1
- JPVYNHNXODAKFH-UHFFFAOYSA-N Cu2+ Chemical compound [Cu+2] JPVYNHNXODAKFH-UHFFFAOYSA-N 0.000 description 6
- 229910001431 copper ion Inorganic materials 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- -1 indium tin oxide Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
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Abstract
Description
本發明是有關於一種記憶體，且特別是有關於一種阻變式記憶體。 The present invention relates to a memory, and more particularly to a resistive memory.
隨著各種電子產品的蓬勃發展及功能需求的提升，使得當前全球記憶體市場需求急速擴張，其中又以非揮發性記憶體(Non-Volatile Memory,NVM)的快速成長最引人注目。為了因應此產業變化，全球各大廠與研究機構對於下一個世代記憶體技術開發均早已如火如荼般地展開。在各種可能的技術中，阻變式記憶體(Resistive Random Access Memory,RRAM)為相當受到注目的技術之一。 With the rapid development of various electronic products and the improvement of functional requirements, the current global memory market demand has expanded rapidly, and the rapid growth of Non-Volatile Memory (NVM) is the most attractive. In response to this industry change, the development of the next generation of memory technology by major manufacturers and research institutions around the world has already begun. Among various possible technologies, Resistive Random Access Memory (RRAM) is one of the most attractive technologies.
阻變式記憶體的基本原理是藉由改變施加的電壓來調控可變電阻層的電阻值，而以不同的電阻值來代表不同位元值，例如以高阻態代表位元值「1」，且以低阻態代表位元值「0」。 The basic principle of the resistive memory is to control the resistance value of the variable resistance layer by changing the applied voltage, and to represent different bit values with different resistance values, for example, the high resistance state represents the bit value "1". And the low resistance state represents the bit value "0".
此外，由於阻變式記憶體具有可高密度堆疊、可高速操作以及非揮發性的特性，因此阻變式記憶體具有與其它非揮發性記憶體競爭的潛力。 In addition, resistive memory has the potential to compete with other non-volatile memories due to its high density stacking, high speed operation, and non-volatile properties.
本發明提供一種阻變性記憶體，其具有較佳的電阻切換特性及操作效能。 The present invention provides a resistive memory having better resistance switching characteristics and operational efficiency.
本發明提供一種阻變性記憶體的製造方法，其可製作出高效能的阻變性記憶體。 The present invention provides a method of producing a resistive memory which can produce a high performance resistive memory.
本發明提出一種阻變性記憶體，包括第一電極、第二電極、可變電阻層及銅氧化物層。第二電極設置於第一電極上。可變電阻層設置於第一電極與第二電極之間。銅氧化物層設置於第一電極與可變電阻層之間，或是設置於第二電極與可變電阻層之間。 The invention provides a resistive memory comprising a first electrode, a second electrode, a variable resistance layer and a copper oxide layer. The second electrode is disposed on the first electrode. The variable resistance layer is disposed between the first electrode and the second electrode. The copper oxide layer is disposed between the first electrode and the variable resistance layer or between the second electrode and the variable resistance layer.
依照本發明的一實施例所述，在上述之阻變性記憶體中，銅氧化物層的材料例如是以CuxOy表示的化合物，其中x為1至4，且y為1至4。 According to an embodiment of the present invention, in the above-described resistive memory, the material of the copper oxide layer is, for example, a compound represented by Cu x O y , wherein x is 1 to 4, and y is 1 to 4.
依照本發明的一實施例所述，在上述之阻變性記憶體中，第一電極與第二電極的材料分別可為導體材料。 According to an embodiment of the invention, in the resistive memory, the materials of the first electrode and the second electrode may be conductor materials, respectively.
依照本發明的一實施例所述，在上述之阻變性記憶體中，導體材料例如是鉑、鎢、鋁、鈦、錫、鉻、鉭、鎳、碳、氧化銦錫、氟摻雜氧化錫或鋁摻雜氧化鋅。 According to an embodiment of the invention, in the above-mentioned resistive memory, the conductor material is, for example, platinum, tungsten, aluminum, titanium, tin, chromium, niobium, nickel, carbon, indium tin oxide, fluorine-doped tin oxide. Or aluminum doped zinc oxide.
依照本發明的一實施例所述，在上述之阻變性記憶體中，可變電阻層的材料例如是絕緣材料或半導體材料。 According to an embodiment of the invention, in the resistive memory described above, the material of the variable resistance layer is, for example, an insulating material or a semiconductor material.
依照本發明的一實施例所述，在上述之阻變性記憶體中，絕緣材料例如是氧化鉿、氧化鎂、氧化鋯或氧化鋁。 According to an embodiment of the invention, in the above-described resistive memory, the insulating material is, for example, cerium oxide, magnesium oxide, zirconium oxide or aluminum oxide.
依照本發明的一實施例所述，在上述之阻變性記憶體中，半導體材料例如是氧化鋅、氧化鎳或氧化鈦。 According to an embodiment of the invention, in the above-described resistive memory, the semiconductor material is, for example, zinc oxide, nickel oxide or titanium oxide.
依照本發明的一實施例所述，在上述之阻變性記憶體中，可變電阻層的材料例如是金屬氧化物。 According to an embodiment of the invention, in the resistive memory described above, the material of the variable resistance layer is, for example, a metal oxide.
依照本發明的一實施例所述，在上述之阻變性記憶體 中，金屬氧化物例如是氧化銦錫、氟掺雜氧化錫、鋁掺雜氧化鋅、氧化鉿、氧化鎂、氧化鋯、氧化鋁、氧化鋅、氧化鎳或氧化鈦。 According to an embodiment of the invention, in the above resistive memory The metal oxide is, for example, indium tin oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, cerium oxide, magnesium oxide, zirconium oxide, aluminum oxide, zinc oxide, nickel oxide or titanium oxide.
依照本發明的一實施例所述，在上述之阻變性記憶體中，可變電阻層的材料例如是高介電常數材料。 According to an embodiment of the invention, in the resistive memory described above, the material of the variable resistance layer is, for example, a high dielectric constant material.
依照本發明的一實施例所述，在上述之阻變性記憶體中，高介電常數材料例如是氧化鉿、氧化鎂、氧化鋯或氧化鋁。 According to an embodiment of the invention, in the resistive memory described above, the high dielectric constant material is, for example, cerium oxide, magnesium oxide, zirconium oxide or aluminum oxide.
本發明提出一種阻變性記憶體的製造方法，包括下列步驟。在基底上形成第一電極。在第一電極上形成可變電阻層。在可變電阻層上形成第二電極。接下來，在第一電極與可變電阻層之間，或是在第二電極與可變電阻層之間形成銅氧化物層。 The present invention provides a method of manufacturing a resistive memory comprising the following steps. A first electrode is formed on the substrate. A variable resistance layer is formed on the first electrode. A second electrode is formed on the variable resistance layer. Next, a copper oxide layer is formed between the first electrode and the variable resistance layer or between the second electrode and the variable resistance layer.
依照本發明的一實施例所述，在上述之阻變性記憶體的製造方法中，第一電極與第二電極的形成方法分別可為物理氣相沈積法或化學氣相沈積法。 According to an embodiment of the invention, in the method for manufacturing a resistive memory, the method for forming the first electrode and the second electrode may be a physical vapor deposition method or a chemical vapor deposition method, respectively.
依照本發明的一實施例所述，在上述之阻變性記憶體的製造方法中，可變電阻層的形成方法例如是物理氣相沈積法或化學氣相沈積法。 According to an embodiment of the present invention, in the method of manufacturing a resistive memory, the method of forming the variable resistance layer is, for example, a physical vapor deposition method or a chemical vapor deposition method.
基於上述，由於本發明所提出之阻變性記憶體具有銅氧化物層，所以在對阻變性記憶體進行操作時，銅氧化物層可調節銅離子在可變電阻層中擴散與分布的情況，且可降低銅離子在導電路徑消失後殘留在可變電阻層中的殘留量，藉此可具有較佳的電阻切換特性及操作效能。此外， 由於本發明所提出之阻變性記憶體的製造方法所形成的阻變性記憶體具有銅氧化物層，所以可製作出高效能的阻變性記憶體。 Based on the above, since the resistive memory of the present invention has a copper oxide layer, the copper oxide layer can adjust the diffusion and distribution of copper ions in the variable resistance layer when the resistive memory is operated. Moreover, the residual amount of copper ions remaining in the variable resistance layer after the conductive path disappears can be reduced, thereby having better resistance switching characteristics and operational efficiency. In addition, Since the resistive memory formed by the method for producing a resistive memory proposed by the present invention has a copper oxide layer, a highly efficient resistive memory can be produced.
為讓本發明之上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。 The above described features and advantages of the present invention will be more apparent from the following description.
圖1A至圖1D為本發明之一實施例之阻變性記憶體的製造流程剖面圖。圖2為本發明之另一實施例之阻變性記憶體的剖面圖。 1A to 1D are cross-sectional views showing a manufacturing process of a resistive memory according to an embodiment of the present invention. 2 is a cross-sectional view of a resistive memory according to another embodiment of the present invention.
首先，請參照圖1A，在基底100上形成第一電極102。基底100的材料例如是矽基材料、絕緣材料或有機材料。第一電極102的材料例如是導體材料，如鉑、鎢、鋁、鈦、錫、鉻、鉭、鎳、碳、氧化銦錫、氟摻雜氧化錫或鋁摻雜氧化鋅。第一電極102的形成方法例如是物理氣相沈積法或化學氣相沈積法。 First, referring to FIG. 1A, a first electrode 102 is formed on a substrate 100. The material of the substrate 100 is, for example, a bismuth based material, an insulating material or an organic material. The material of the first electrode 102 is, for example, a conductor material such as platinum, tungsten, aluminum, titanium, tin, chromium, ruthenium, nickel, carbon, indium tin oxide, fluorine-doped tin oxide or aluminum-doped zinc oxide. The formation method of the first electrode 102 is, for example, a physical vapor deposition method or a chemical vapor deposition method.
接著，請參照圖1B，在第一電極102上形成銅氧化物層104。銅氧化物層104例如是以CuxOy表示的化合物，其中x為1至4，且y為1至4。舉例來說，銅氧化物例如是Cu2O3、Cu2O4、CuO或Cu2O。銅氧化物層104的形成方法例如是氧化法、物理氣相沈積法或化學氣相沈積法。當採用氧化法形成銅氧化物層104時，會先在第一電極102上形成銅金屬層，再對銅金屬層進行氧化製程而形成銅氧化物層104。 Next, referring to FIG. 1B, a copper oxide layer 104 is formed on the first electrode 102. The copper oxide layer 104 is, for example, a compound represented by Cu x O y , where x is from 1 to 4, and y is from 1 to 4. For example, the copper oxide is, for example, Cu 2 O 3 , Cu 2 O 4 , CuO or Cu 2 O. The method of forming the copper oxide layer 104 is, for example, an oxidation method, a physical vapor deposition method, or a chemical vapor deposition method. When the copper oxide layer 104 is formed by an oxidation method, a copper metal layer is first formed on the first electrode 102, and then the copper metal layer is subjected to an oxidation process to form a copper oxide layer 104.
接著，請參照圖1C，在銅氧化物層104上形成可變電阻層106。可變電阻層106的材料例如是絕緣材料或半導體材料，其中絕緣材料可為無機絕緣材料或有機絕緣材料。絕緣材料例如是氧化鉿、氧化鎂、氧化鋯或氧化鋁。半導體材料例如是氧化鋅、氧化鎳或氧化鈦。可變電阻層106的材料可為高介電常數材料。高介電常數材料例如是氧化鉿、氧化鎂、氧化鋯或氧化鋁。可變電阻層106的材料例如是金屬氧化物，如氧化銦錫、氟掺雜氧化錫、鋁掺雜氧化鋅、氧化鉿、氧化鎂、氧化鋯、氧化鋁、氧化鋅、氧化鎳或氧化鈦。可變電阻層106的形成方法例如是物理氣相沈積法或化學氣相沈積法。 Next, referring to FIG. 1C, a variable resistance layer 106 is formed on the copper oxide layer 104. The material of the variable resistance layer 106 is, for example, an insulating material or a semiconductor material, wherein the insulating material may be an inorganic insulating material or an organic insulating material. The insulating material is, for example, cerium oxide, magnesium oxide, zirconium oxide or aluminum oxide. The semiconductor material is, for example, zinc oxide, nickel oxide or titanium oxide. The material of the variable resistance layer 106 may be a high dielectric constant material. The high dielectric constant material is, for example, cerium oxide, magnesium oxide, zirconium oxide or aluminum oxide. The material of the variable resistance layer 106 is, for example, a metal oxide such as indium tin oxide, fluorine-doped tin oxide, aluminum-doped zinc oxide, cerium oxide, magnesium oxide, zirconium oxide, aluminum oxide, zinc oxide, nickel oxide or titanium oxide. . The method of forming the variable resistance layer 106 is, for example, a physical vapor deposition method or a chemical vapor deposition method.
然後，請參照圖1D，在可變電阻層106上形成第二電極108，且第一電極102、銅氧化物層104、可變電阻層106與第二電極108形成阻變性記憶體110。第二電極108的材料例如是導體材料，如鉑、鎢、鋁、鈦、錫、鉻、鉭、鎳、碳、氧化銦錫、氟摻雜氧化錫或鋁摻雜氧化鋅。第二電極108的形成方法例如是物理氣相沈積法或化學氣相沈積法。 Then, referring to FIG. 1D, the second electrode 108 is formed on the variable resistance layer 106, and the first electrode 102, the copper oxide layer 104, the variable resistance layer 106 and the second electrode 108 form the resistive memory 110. The material of the second electrode 108 is, for example, a conductor material such as platinum, tungsten, aluminum, titanium, tin, chromium, ruthenium, nickel, carbon, indium tin oxide, fluorine-doped tin oxide or aluminum-doped zinc oxide. The method of forming the second electrode 108 is, for example, a physical vapor deposition method or a chemical vapor deposition method.
此外，雖然上述實施例是以銅氧化物層104形成在第一電極102與可變電阻層106之間為例進行說明，但本發明並不以此為限。請同時參照圖1及圖2，圖2的阻變性記憶體110a與圖1的阻變性記憶體110的差異在於：阻變性記憶體110a中的銅氧化物層104a是形成在第二電極108與可變電阻層106之間。亦即，阻變性記憶體110a是 在基板100上依序形成第一電極102、可變電阻層106、銅氧化物層104a與第二電極108。此外，圖2中與圖1相同或相似的構件的材料與形成方法已於上述實施例中進行詳盡地說明，故於此不再贅述。 In addition, although the above embodiment is described by taking the copper oxide layer 104 between the first electrode 102 and the variable resistance layer 106 as an example, the present invention is not limited thereto. Referring to FIG. 1 and FIG. 2 simultaneously, the difference between the resistive memory 110a of FIG. 2 and the resistive memory 110 of FIG. 1 is that the copper oxide layer 104a in the resistive memory 110a is formed on the second electrode 108. Between the variable resistance layers 106. That is, the resistive memory 110a is The first electrode 102, the variable resistance layer 106, the copper oxide layer 104a, and the second electrode 108 are sequentially formed on the substrate 100. In addition, the materials and forming methods of the members of FIG. 2 which are the same as or similar to those of FIG. 1 have been described in detail in the above embodiments, and thus will not be described again.
以下，藉由圖1D與圖2來介紹上述實施例的阻變性記憶體110、100a的結構與特點。 Hereinafter, the structure and characteristics of the resistive memory 110, 100a of the above embodiment will be described with reference to FIGS. 1D and 2.
請同時參照圖1D及圖2，阻變性記憶體110包括第一電極102、銅氧化物層104、可變電阻層106與第二電極108。第二電極108設置於第一電極102上。可變電阻層106設置於第一電極102與第二電極108之間。銅氧化物層104設置於第一電極102與可變電阻層106之間。圖2中的阻變性記憶體110a與圖1中的阻變性記憶體110的差異在於：銅氧化物層104a設置於第二電極108與可變電阻層106之間。此外，阻變性記憶體110、110a中各構件的材料與形成方法已於上述實施例中進行詳盡地說明，故於此不再贅述。 Referring to FIG. 1D and FIG. 2 simultaneously, the resistive memory 110 includes a first electrode 102, a copper oxide layer 104, a variable resistance layer 106 and a second electrode 108. The second electrode 108 is disposed on the first electrode 102. The variable resistance layer 106 is disposed between the first electrode 102 and the second electrode 108. The copper oxide layer 104 is disposed between the first electrode 102 and the variable resistance layer 106. The difference between the resistive memory 110a of FIG. 2 and the resistive memory 110 of FIG. 1 is that the copper oxide layer 104a is disposed between the second electrode 108 and the variable resistance layer 106. In addition, the materials and forming methods of the members in the resistive memory 110, 110a have been described in detail in the above embodiments, and thus will not be described again.
在對阻變性記憶體110進行操作時，將高阻態切換至低阻態稱為SET操作，反之則稱為RESET操作，且藉由SET操作與RESET操作進行資料的儲存。在對阻變性記憶體110進行SET操作時，可藉由將銅氧化物層104中的銅離子擴散到可變電阻層106中，而在可變電阻層106中形成導電路徑，以降低可變電阻層106的電阻值，藉此切換至低阻態。反之，在對阻變性記憶體110進行RESET操作時，可變電阻層106中的導電路徑會消失，以提高可 變電阻層106的電阻值，藉此切換至高阻態。其中，在進行RESET操作之後，由於銅氧化物層104可降低銅離子在導電路徑消失後殘留在可變電阻層106中的殘留量，因此可避免漏電流的情況產生。此外，由於阻變性記憶體110a的操作方式與阻變性記憶體110相似，故於此不再贅述。 When the resistive memory 110 is operated, switching the high impedance state to the low resistance state is called SET operation, otherwise it is called RESET operation, and the data is stored by the SET operation and the RESET operation. When the SET operation is performed on the resistive memory 110, a conductive path can be formed in the variable resistance layer 106 by diffusing copper ions in the copper oxide layer 104 into the variable resistance layer 106 to reduce the variable The resistance value of the resistance layer 106 is thereby switched to a low resistance state. On the contrary, when the RESET operation is performed on the resistive memory 110, the conductive path in the variable resistance layer 106 disappears to improve The resistance value of the variable resistance layer 106 is thereby switched to a high resistance state. Here, after the RESET operation, since the copper oxide layer 104 can reduce the residual amount of copper ions remaining in the variable resistance layer 106 after the conductive path disappears, leakage current can be avoided. In addition, since the operation mode of the resistive memory 110a is similar to that of the resistive memory 110, it will not be described herein.
基於上述實施例可知，由於阻變性記憶體110、110a分別具有銅氧化物層104、104a，所以在對阻變性記憶體110、110a進行操作時，銅氧化物層104、104a可分別調節銅離子在可變電阻層106中擴散與分布的情況，且可降低銅離子在導電路徑消失後殘留在可變電阻層106中的殘留量，所以可避免漏電流的情況產生。藉此，阻變性記憶體110、110a可達成高元件可靠度、高位元訊號比以及更長的位元儲存時間，而具有較佳的電阻切換特性及操作效能。 Based on the above embodiments, since the resistive memory 110, 110a has the copper oxide layers 104, 104a, respectively, when the resistive memory 110, 110a is operated, the copper oxide layers 104, 104a can respectively adjust the copper ions. The diffusion and distribution in the variable resistance layer 106 can reduce the residual amount of copper ions remaining in the variable resistance layer 106 after the conductive path disappears, so that leakage current can be avoided. Thereby, the resistive memory 110, 110a can achieve high component reliability, high bit signal ratio and longer bit storage time, and has better resistance switching characteristics and operational efficiency.
綜上所述，上述實施例至少具有下列特點。上述實施例所揭露之阻變性記憶體具有較佳的電阻切換特性及操作效能。此外，上述實施例所揭露之阻變性記憶體的製造方法可製作出高效能的阻變性記憶體。 In summary, the above embodiment has at least the following features. The resistive memory disclosed in the above embodiments has better resistance switching characteristics and operational efficiency. In addition, the method for manufacturing a resistive memory disclosed in the above embodiments can produce a high-performance resistive memory.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，故本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
100‧‧‧基底 100‧‧‧Base
102‧‧‧第一電極 102‧‧‧First electrode
104、104a‧‧‧銅氧化物層 104, 104a‧‧‧ copper oxide layer
106‧‧‧可變電阻層 106‧‧‧Variable Resistance Layer
108‧‧‧第二電極 108‧‧‧second electrode
110、110a‧‧‧阻變性記憶體 110, 110a‧‧‧Resistive memory
圖1A至圖1D為本發明之一實施例之阻變性記憶體的製造流程剖面圖。 1A to 1D are cross-sectional views showing a manufacturing process of a resistive memory according to an embodiment of the present invention.
圖2為本發明之另一實施例之阻變性記憶體的剖面圖。 2 is a cross-sectional view of a resistive memory according to another embodiment of the present invention.
100‧‧‧基底 100‧‧‧Base
102‧‧‧第一電極 102‧‧‧First electrode
104‧‧‧銅氧化物層 104‧‧‧ copper oxide layer
106‧‧‧可變電阻層 106‧‧‧Variable Resistance Layer
108‧‧‧第二電極 108‧‧‧second electrode
110‧‧‧阻變性記憶體 110‧‧‧Resistive memory
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| TWI569487B (en) * | 2014-10-23 | 2017-02-01 | 國立高雄應用科技大學 | Resistive random access memory structure having a dissociation buffer layer and manufacturing method thereof |
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