TW201314779A - Method of repairing defect of oxide semiconductor layer - Google Patents

Abstract

A method of repairing defect of oxide semiconductor layer includes the following steps. A substrate is provided, and an oxide semiconductor layer is formed on the substrate. The substrate is then loaded into a reaction chamber, and at least one organic gas is introduced to the reaction chamber so that an organic gaseous environment is formed in the reaction chamber. Subsequently, an annealing process is performed on the oxide semiconductor layer to repair defect under the organic gaseous environment.

Description

Method of repairing defects of an oxide semiconductor layer

The present invention relates to a method of repairing defects of an oxide semiconductor layer, and more particularly to a method of repairing defects of an oxide semiconductor layer by an annealing process in an organic gas environment.

Currently, thin film transistors used in the display industry can be distinguished according to the semiconductor layer materials used, including amorphous silicon TFTs (a-Si TFTs), polysilicon TFTs, and oxide semiconductors. Thin film transistor (oxide semiconductor TFT). The amorphous germanium thin film transistor is affected by the characteristics of the amorphous germanium semiconductor material, so that its electron mobility cannot be greatly and effectively improved by the adjustment of the process or component design, so it cannot meet the future display of higher specification displays. demand. The process of polycrystalline germanium thin film transistors is complicated (relatively costly) and there is a problem that the crystallization process leads to poor uniformity of crystallinity in the application of large-sized panels. Therefore, polycrystalline germanium thin film transistors are still mainly used in small-sized panel applications. . Oxide semiconductor thin film transistors are applications of newly emerging oxide semiconductor materials in recent years. Such materials are generally amorphous structures and are not suitable for the problem of poor uniformity on large-sized panels. The electron mobility of the oxide semiconductor thin film transistor is generally 10 times higher than that of the amorphous germanium thin film transistor, which can meet the needs of the currently available high-profile displays.

In general, after the formation of the oxide semiconductor layer, the oxide semiconductor layer is subjected to at least one plasma process to lower the resistance of the oxide semiconductor layer. In addition, when the pattern of source and drain is defined later, it is often achieved by using a plasma process. However, the plasma process causes defects in the oxide semiconductor layer and causes Drain induced barrier lowering (DIBL) problems, thereby causing instability of the element characteristics of the oxide semiconductor thin film transistor, which affects the oxide. Development of semiconductor thin film transistors.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method of repairing defects of an oxide semiconductor layer to improve stability of element characteristics of an oxide semiconductor thin film transistor.

A preferred embodiment of the present invention provides a method of repairing defects of an oxide semiconductor layer, comprising the following steps. First, a substrate is provided, and an oxide semiconductor layer is formed on the substrate. Then, the substrate is loaded into a reaction chamber, and at least one organic gas is introduced into the reaction chamber to form an organic gas environment in the reaction chamber. Subsequently, the oxide semiconductor layer is subjected to an annealing process in an organic gas atmosphere to repair defects of the oxide semiconductor layer.

The present invention will be further understood by those of ordinary skill in the art to which the present invention pertains. .

Please refer to Figures 1 to 3. 1 to 3 are schematic views showing a method of repairing defects of an oxide semiconductor layer according to a preferred embodiment of the present invention. As shown in Fig. 1, a substrate 30 is first provided. In this embodiment, the substrate 30 can be an array substrate of a display panel, which can be, for example, a glass substrate, but is not limited thereto. Next, an oxide semiconductor layer 32 is formed on the substrate 30. In the present embodiment, the oxide semiconductor layer 30 may include, for example, an indium gallium zinc oxide (IGZO) semiconductor layer which can serve as a semiconductor channel layer of an oxide semiconductor thin film transistor. The oxide semiconductor layer 30 is not limited to an indium gallium zinc oxide semiconductor layer, and may be, for example, a zinc oxide (ZnO) semiconductor layer, a zinc magnesium oxide (ZnMgO) semiconductor layer, a tin antimony oxide (SnSbO ₂ ) semiconductor layer, or An oxide having semiconductor characteristics such as a zinc selenide oxide (ZnSeO) semiconductor layer or a zinc zirconium oxide (ZnZrO) semiconductor layer.

As shown in FIG. 2, substrate 30 is then loaded into a reaction chamber 40 having at least one gas inlet 42 therein. Thereafter, at least one organic gas 44 is introduced into the reaction chamber 40 via the gas inlet 42 to form an organic gas atmosphere in the reaction chamber 40. In the present embodiment, the organic gas 44 may include, for example, Propylene Glycol Monomethyl Ether (PGME) vapor, Propylene Glycol Monomethyl Ether Acetate (PGMEA) vapor or N-methylpyrrolidone ( At least one of N-methyl pyrrolidinone, NMP), but not limited thereto. It is worth noting that when a different organic gas 44 is introduced, the volume concentration of the introduced gas (i.e., the ratio of the volume of the organic gas 44 that is introduced to the volume of the reaction chamber) can also be adjusted as needed. For example, if the organic gas 44 is a propylene glycol methyl ether (PGME) vapor, the volume concentration of the propylene glycol methyl ether (PGME) is preferably 1.6% or less or 13.5% or more; if the organic gas 44 is selected The vapor concentration of propylene glycol methyl ether acetate (PGMEA), the volume concentration of propylene glycol methyl ether acetate (PGMEA) is generally preferably 1.5% or more or 7% or more; if the organic gas 44 is N-methylpyrrolidone The vapor concentration of (NMP), the volume concentration of N-methylpyrrolidone (NMP) is preferably preferably 1.3% or more and 9.5% or more. In the present invention, the manner in which the organic gas environment is formed has different embodiments. For example, in the first embodiment of the present embodiment, the organic solvent may be directly heated to form a vapor, and the vapor of the organic solvent may be introduced into the reaction chamber 40 through the gas inlet 42 to form an organic gas environment, or The organic solvent is directly introduced into the reaction chamber 40, and the organic solvent is heated in the reaction chamber 40 to form an organic gas atmosphere. Further, if the vapor of the above organic solvent is used as the organic gas 44, the temperature of the vapor of the organic solvent is preferably controlled to be preferably 250 ° C or less to avoid an explosion. If a vapor of another organic solvent is used, the temperature can be adjusted depending on the auto-ignition temperature of the organic solvent or other properties. In addition, in the second embodiment of the present embodiment, a carrier gas may be used to attach molecules of the organic solvent to the carrier gas through the organic solvent, and then the carrier gas is passed through the gas inlet 42. It is introduced into the reaction chamber 40 to form an organic gas atmosphere. In this embodiment, the temperature of the carrier gas can reach above 250 °C.

As shown in FIG. 3, the oxide semiconductor layer 32 is then subjected to an annealing process in an organic gas atmosphere to repair the defects of the oxide semiconductor layer 32. In this embodiment, the process temperature of the annealing process is generally between 200 ° C and 400 ° C, and is generally preferably between 220 ° C and 250 ° C, but not limited thereto; the annealing process is at atmospheric pressure The process is performed below, but not limited thereto; the process time of the annealing process is generally between 1 hour and 2 hours, but not limited thereto. In the present embodiment, only one substrate 30 is loaded in the reaction chamber 40, but not limited thereto. For example, a plurality of substrates 30 can be loaded at a time in the reaction chamber 40, whereby the annealing process can repair the oxide semiconductor layers 32 on the plurality of substrates 30 at a time.

Please refer to Figures 4 and 5. Figure 4 is a graph showing the relationship between the gate-source voltage (Vgs) and the gate current (Ids) of the oxide semiconductor thin film transistor before the annealing process, and Figure 5 shows the oxide semiconductor thin film. The relationship between the gate-source voltage and the drain current after the crystal is subjected to the annealing process of the first embodiment of the present embodiment. As shown in Figure 4, the drain voltage (Vd) is 10 volts (as shown by the six different samples shown in the six solid lines in Figure 4), and the drain voltage is 0.1 volts. Under the condition (as shown by the six different samples depicted by the dotted line in Figure 4), the gate-source voltage and 汲 of the samples of the six oxide semiconductor thin film transistors before the annealing process is performed The relationship between the polar currents shows a significant non-uniformity and the bungee leads to a decrease in the energy barrier. In contrast, as shown in Figure 5, either in the case of a drain voltage of 10 volts (as shown by the six different samples depicted in the six solid lines in Figure 5), or in 汲In the case where the pole voltage is 0.1 volt (as shown by six different samples shown by the six broken lines in Fig. 5), after the annealing process of the first embodiment of the present embodiment is performed (i.e., in the reaction) The furnace is directly introduced into the vapor of the organic solvent and then annealed. The relationship between the gate-source voltage and the drain current of the samples of the six oxide semiconductor thin film transistors shows that the uniformity is significantly improved. There is no bungee that causes the problem of energy barrier decline. Therefore, the annealing process of the first embodiment of the present embodiment has been confirmed to effectively improve the stability of the element characteristics of the oxide semiconductor thin film transistor.

Please refer to Figure 6 and Figure 7. FIG. 6 is a diagram showing the relationship between the gate-source voltage and the drain current of the oxide semiconductor thin film transistor before the annealing process, and FIG. 7 is an oxide semiconductor thin film transistor for performing the embodiment. A diagram showing the relationship between the gate-source voltage and the drain current after the annealing process of the second embodiment. As shown in Figure 6, in the case of a drain voltage of 10 volts (as shown by the four different samples shown in the four solid lines in Figure 6), and at a drain voltage of 0.1 volts ( The relationship between the gate-source voltage and the drain current of the samples of the four oxide semiconductor thin film transistors is shown before the four different samples shown in the four dotted lines in Figure 6). There is obvious unevenness, and there is a problem that the bungee leads to the decline of energy barrier. In contrast, as shown in Figure 7, either in the case of a drain voltage of 10 volts (as shown by the four different samples depicted in the four solid lines in Figure 7), or in the bungee In the case where the voltage is 0.1 volt (as shown by four different samples shown by the four broken lines in Fig. 7), after the annealing process of the second embodiment of the present embodiment is performed (i.e., using oxidized second) Nitrogen is used as a carrier gas to pass the organic solvent to the carrier gas through the organic solvent, and then the carrier gas is introduced into the reaction chamber to perform an annealing process. The gate-source of the sample of the four oxide semiconductor thin film transistors The relationship between the pole voltage and the drain current shows that the uniformity is significantly improved without the bungee causing the energy barrier to fall. Therefore, the annealing process of the second embodiment of the present embodiment has been confirmed to effectively improve the stability of the element characteristics of the oxide semiconductor thin film transistor. It should be noted that the carrier gas used in the present invention is not limited to nitrous oxide, but may be other suitable gases.

In summary, the method for repairing the defects of the oxide semiconductor layer of the present invention can effectively repair the defects of the oxide semiconductor layer by annealing the oxide semiconductor layer in an organic gas environment, thereby effectively improving the oxide semiconductor film. The stability of the element characteristics of the transistor. It is to be noted that the method of repairing the oxide semiconductor layer of the present invention can be carried out at any time after the formation of the oxide semiconductor layer, and is preferably performed after the plasma process, whereby defects due to the plasma process can be repaired.

The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.

30. . . Substrate

32. . . Oxide semiconductor layer

40. . . Reaction chamber

42. . . Gas inlet

44. . . Organic gas

1 to 3 are schematic views showing a method of repairing defects of an oxide semiconductor layer according to a preferred embodiment of the present invention.

Figure 4 is a graph showing the relationship between the gate-source voltage and the drain current of the oxide semiconductor thin film transistor before the annealing process.

FIG. 5 is a diagram showing the relationship between the gate-source voltage and the drain current of the oxide semiconductor thin film transistor after performing the annealing process of the first embodiment of the present embodiment.

Figure 6 is a graph showing the relationship between the gate-source voltage and the drain current of the oxide semiconductor thin film transistor before the annealing process.

FIG. 7 is a graph showing the relationship between the gate-source voltage and the drain current of the oxide semiconductor thin film transistor after performing the annealing process of the second embodiment of the present embodiment.

30. . . Substrate

32. . . Oxide semiconductor layer

40. . . Reaction chamber

42. . . Gas inlet

44. . . Organic gas

Claims (8)

A method for repairing defects of an oxide semiconductor layer, comprising: providing a substrate, and forming an oxide semiconductor layer on the substrate; loading the substrate into a reaction chamber, and introducing at least one organic gas into the reaction chamber; So that an atmosphere of the organic gas is formed in the reaction chamber; and an annealing process is performed on the oxide semiconductor layer in the organic gas environment to repair defects of the oxide semiconductor layer. A method of repairing a defect of an oxide semiconductor layer as described in claim 1, wherein a process temperature of the annealing process is substantially between 200 ° C and 400 ° C. A method of repairing a defect of an oxide semiconductor layer as described in claim 1, wherein the annealing process is performed under normal pressure. A method of repairing a defect of an oxide semiconductor layer as described in claim 1, wherein one of the annealing processes is substantially between 1 hour and 2 hours. A method of repairing defects of an oxide semiconductor layer according to claim 1, wherein the organic gas comprises Propylene Glycol Monomethyl Ether (PGME) vapor, Propylene Glycol Monomethyl Ether Acetate (PGMEA) Vapor or vapor of N-methyl pyrrolidinone (NMP). The method of repairing a defect of an oxide semiconductor layer according to claim 1, further comprising introducing the organic gas into the reaction chamber using a carrier gas to form the organic gas environment. The method of repairing a defect of an oxide semiconductor layer according to claim 1, further comprising introducing the organic gas directly into the reaction chamber to form the organic gas environment. A method of repairing a defect of an oxide semiconductor layer according to claim 1, wherein the oxide semiconductor layer comprises an indium gallium zinc oxide (IGZO) semiconductor layer.