201248922 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種發光二極體(Light Emitting Diode ; LED)元 件結構及其製造方法，特別是一種具有高反射性之布拉格反射層 的水平發光二極體之結構及其製造方法。 【先前技術】 傳統的發光二極體其活性層產生的光往下入射至砷化 鎵基板時，由於砷化鎵能隙較小，入射光會被砷化鎵基板 吸收’而降低發光效率。為了避免基板的吸光，傳統上有 一些文獻揭露出提昇發光二極體亮度的技術，例如加入布 拉格反射結構(Distributed Bragg Reflector ; DBR)於砷化鎵 基板上，藉以反射入射向砷化鎵基板的光，並減少砷化鎵 基板吸收。然而此種DBR反射結構是利用四元磊晶成長材 料堆疊而成’疊層間的折射率差異不大，只能有效地反射 較接近垂直人射於珅化鎵基板的光，反射率約為8〇%，並 且反射光的波長範圍很小，效果並不大。 此外’電極形成在不同側，在封裝過程易造成電極與基 板黏著不佳，導致電性不良，阻值增高。 【發明内容】201248922 VI. Description of the Invention: [Technical Field] The present invention relates to a light emitting diode (LED) element structure and a method of fabricating the same, and more particularly to a horizontally illuminating Bragg reflecting layer having high reflectivity The structure of the diode and its manufacturing method. [Prior Art] When the light generated by the active layer of the conventional light-emitting diode is incident on the gallium arsenide substrate, since the gallium arsenide energy gap is small, the incident light is absorbed by the gallium arsenide substrate, and the luminous efficiency is lowered. In order to avoid the light absorption of the substrate, there have been some literatures that have revealed techniques for improving the brightness of the light-emitting diode, such as adding a Bragg Reflector (DBR) to the gallium arsenide substrate, thereby reflecting the incident on the gallium arsenide substrate. Light and reduce the absorption of gallium arsenide substrates. However, such a DBR reflective structure is formed by stacking quaternary epitaxial growth materials. The difference in refractive index between the laminates is not large, and the light which is relatively close to the vertical human being incident on the gallium arsenide substrate can be effectively reflected, and the reflectance is about 8 〇%, and the wavelength range of the reflected light is small, and the effect is not large. In addition, the electrodes are formed on different sides, which tends to cause poor adhesion between the electrodes and the substrate during the packaging process, resulting in poor electrical properties and increased resistance. [Summary of the Invention]
』你敌供一發光二極體元件結 上表面具有一第一區域及一第 ’位於導電成長基板的第一區 ，包括：一反射層，位於第一 十生之第一半導體層，位於反射 半導體層之上；以及一具有第 4 201248922 一導電特性之第二半導體層，位於活性層之上；一第一電 極位於第二半導體層上；以及一第二電極位於第二區域 上，透過導電成長基板與半導體磊晶疊層電性連結，其中 第一電極和第二電極位於導電成長基板的同一側。^ 【實施方式】 本發明提供一種電極位在同側之水平式發光二極體結 構及其製造方法。參照第1A圖與第1B圖，係依照本發明 第一實施例所繪示的一種第一電極和第二電極在同側之水 平式發光二極體結構上視圖以及沿著v_v，虛線的側視剖 面圖。發光二極體結構1〇〇包括一導電成長基板1〇2，具 有一上表面103’定義有一第一區域1A及一第二區域1B、 半導體蠢晶疊層101位於第一區域1A上，其中所述之 半導體蠢晶疊層101包括依序堆疊於第一區域1A上的一 反射層104、一 η型半導體層（例：n_ciadding層）1〇6、一活 性層（actWe layer)108、以及一 p 型半導體層（例·· p_cladding 層）110、一透明導電層112位於所述之p型半導體層110 上’一第一電極114位於透明導電層112上、一疊層保留 部116位於導電成長基板102之第二區域1B上，一第二電 極118形成於導電成長基板102之第二區域1B上並包覆疊 層保留部116。 第1C圖係為依本發明第一實施例之半導體磊晶疊層 結構示意圖。本發明所揭露的水平式發光二極體結構製程 方式，先提供一導電成長基板102，在本發明第一實施例 中’導電成長基板102具有導電性，用以成長或承载一半 導體磊晶疊層101於其上。構成所述導電成長基板101的 201248922 材料包含但不限於錯（Ge )、神化鎵（GaAs )、碌化銦 (InP )、匕錄（GaP)、碳化石夕（SiC )、石夕（Si )、IU匕i家 (GaN )之一種或其組合。所述之導電成長基板具有一上表 面103並定義有第一區域1A及第二區域1B。 接著於導電成長基板上表面103上形成一反射層 104,此反射層104為一種布拉格反射層，係由複數個容易 氧化的半導體層與不容易氧化半導體層交互堆疊所組成。 例如珅化紹(AlAs)/神化銘鎵(AlGaAs)的交互堆疊、珅化紹 (AlAs)/珅化鎵(GaAs)的交互堆疊、珅化鋁（AlAs)/填化铭鎵 銦(AlGalnP)的交互堆疊、或砷化鋁(AlAs)/磷化銦鎵(InGaP) 的交互堆疊所組成，其中砷化鋁為容易氧化的半導體層， 其它和砷化鋁匹配的則為不容易氧化的半導體層。 接著於反射層104之上，形成一 n型半導體層ι〇6，η 型半導體層106的材料包括但不限於磷化鋁鎵銦、神化 鎵、或磷化銦鎵。磷化鋁鎵銦其組成為（AlxGa^ksInwP， 其中之0.5僅為例示’例如（A lxGabjJylriyP，其中X及y值 僅需0<x<l，y<l即可。 形成一活性層108於η型半導體層106之上，活性層 的材料包括但不限於磷化鋁鎵銦，其組成為（A UGahVsIno.sP，其中之0.5僅為例示。以發光二極體為例， 可以藉由改變活性層108裡的其中一層或多層的物理及化 學組成，調整發出的光波長。常用的材料為碟化銘鎵銦系 列、填化I呂銦系列、氮化I呂鎵銦（AlGalnN)系列、氧化鋅(zn〇) 系列。可為單異質結構(single heterostructure, SH )，雙異質 結構（double heterostructure, DH )，雙側雙異質結 6 201248922 (double-side double heterostructure, DDH)，多層里子井結 構(multi-quantum well, MWQ)。以多層量子井結構為例’ 其具有多個阻障層及量子井層交替堆疊，其中阻障層係為 (AlyGauksIi^P，0.5SyS0.8;量子井層係為 In〇.5Ga〇_5P。 一 P型半導體層110形成於所述活性層之上’例 如為p型磷化鎵(GaP)，其材料包括但不限於磷化鋁鎵銦 (InGaAlP)，其組成為（AlxGai-OojIno.sP，其中之 0.5 僅為例 示’（AlxGadylriyP，其中X及y值僅需0<X<1 ’ y<l即可。 其中η型半導體層1〇6厚度約為3μΓη、p变半導體層11〇 厚度約為ΙΟμιη，活性層1108的厚度約為〇.3~1.5μηι。 利用電子束蒸鍍或濺鍍形成一透明導電層112覆蓋ρ 型半導體層110,其中透明導電層112的材質可以為金屬 氧化物’例如銦錫氧化物（ΙΤΟ) ’鎘錫氧化物（CTO)、 銻氧化錫、氧化銦鋅（ΙΖΟ)、氧化鋅鋁（ΑΖΟ)、氧化鎵鋅 (GZO)、氧化鋅(ζη〇)及鋅錫氧化物中的任一種；其厚度 約為 0.005μιη〜〇.6μηι。 參照第1D圖，於第二區域1Β上的半導體磊晶疊層進 行圖案化蚀刻，形成一露出部120及一疊層保留部116， 露出部120為蝕刻半導體磊晶疊層後曝露出導電成長基板 102所形成，其中疊層保留部Πό為蝕刻半導體磊晶疊層 時所保留之部分半導體磊晶疊層所形成。疊層保留部116 其組成可以包含和半導體磊晶疊層1〇1為完全相同的組成 材料，例如同時具有反射層104、η型半導體層106、活性 層108、ρ型半導體層110或透明導電層112 ;也可以僅具 有反射層104;或具有半導體蠢晶疊層1〇1的其中數層， 201248922 例如具有反射層104及n型半導體層1〇6之兩層磊晶結 構；反射層104、η型半導體層1〇6及活性層1〇8之三層磊 晶結構；反射層104、η型半導體層1〇6、活性層1〇8及ρ 型半導體層110之四層磊晶結構。 清參閱第2Α圖，第一電極114形成於透明導電層112 上，第二電極118形成於第二區域1Β上，完全包覆疊層保 留部116並覆蓋部分的露出部12〇。第二電極118和露出 部120直接接觸，藉由和導電成長基板1〇2的直接接觸， 透過導電基板102和半導體磊晶疊層1〇1電性連結；完成 此發光二極體結構1〇〇。第二電極118也可以部分覆蓋疊 層保留部116並部分覆蓋露出部12〇，如第2Β圖及第2C 圖所示。疊層保留部116之功能為增強第二電極118和導 電成長基板102的黏著力，避免第二電極U8因黏著性不 佳而剝離。 第3圖係為本發明第二實施例之水平式發光二極體結 構1〇〇1之側視示意圖。半導體磊晶疊層1〇11的結構及其 製程步驟和第一實施例的半導體磊晶疊層1〇1相同，其不 同處在於第二區域11Β上的半導體磊晶疊層1〇11於圖^化 蝕刻後，形成一露出部12〇1及一疊層保留部1161，其中 露出部1201為蝕刻半導體磊晶疊層1〇u後，曝露出反射 層1041所形成。疊層保留部1161為蝕刻半導體磊晶疊層 wn時所保留之部分半導體磊晶疊層1011所形成。疊層 保留部1161其組成可以僅具有η型半導體層贿^具 有其中數層之半導體蟲晶疊層,例如具有η型半導體 層1061及活性層1〇81之二層磊晶結構；η型半導體層 8 201248922 1061、活性層1081及p型半導體層lioi之三層磊晶結構； η型半導體層1061、活性層1081、ρ型半導體層iioi及透 明導電層1121之四層結構。 最後’第一電極1141形成於透明導電層1121上，第 二電極1181形成於第二區域11Β上，完全包覆疊層保留部 1161並覆蓋部分的露出部1201。第二電極1181和露出部 1201直接接觸，藉由反射層1〇41及導電成長基板丨〇21和 半導體磊晶疊層1011電性連結；完成此發光二極體結構 1001。第二電極1181也可以部分覆蓋疊層保留部1161並 部分覆蓋露出部1201。所述疊層保留部ι161之功能為增 強第二第二電極1181和導電成長基板1〇21的黏著力，避 免第二電極1181因黏著性不佳而剝離。 第4圖係為本發明第三實施例之水平式發光二極體結 構1002之側視示意圖。半導體蠢晶疊層1〇12的結構及其 製程步驟和第一實施例和第二實施例的半導體磊晶疊層 101、1011相同，其不同處在於第二區域111Β上的半導體 磊晶疊層1012於圖案化蝕刻後，形成一露出部12〇2及一 疊層保留部1162，其中露出部1202為蝕刻半導體磊晶疊 層1012後曝露出η型半導體層1062所形成，疊層保留部 1162為触刻半導體磊晶疊層1〇12時所保留之部分半導體 磊晶疊層1012所形成。疊層保留部1162其組成可以僅為 η型半導體層1062;或具有其中數層之半導體磊晶疊層 1012，例如„型半導體層1062及活性層1〇82之二層磊晶 結構；η型半導體層1062、活性層1082及ρ型半導體層 1102之三層磊晶結構；η型半導體層1062、活性層1〇82、 9 201248922 P型半導體層1102及透明導電層1122之四層結構。 最後，第一電極1142形成於透明導電層1122上’第 二電極1182形成於第二區域111B上’完全包覆疊層保留 部1162並覆蓋部分的露出部丨202。第二電極1182和覆蓋 之部分露出部1202直接接觸，藉由η型半導體層1062、 反射層1042、及導電成長基板1022和半導體磊晶疊層1012 電性連結；完成此發光二極體結構1002。第二電極1182 也可以部分覆蓋疊層保留部1162並部分覆蓋露出部 1202。疊層保留部1162之功能為增強第二電極1182和導 電成長基板1022的黏著力，避免第二電極1182因黏著性 不佳而剝離。 如第5Α圖所示，上述第一實施例中反射層104可為 布拉格反射層，由數對第三半導體層l〇4c與第四半導體層 104b交互堆疊所組成。圖中以三對第三半導體層i〇4c與 第四半導體層104b交互堆疊來做說明，此對數無任何限 制。第三半導體層l〇4c可為砷化鋁(A1As)e第四半導體層 l〇4b可為钟化鋁鎵、砷化鎵、磷化鋁鎵銦、或磷化銦鎵所 組成。如第5B圖所示，由於第三半導體層1〇4c的特性較 第四半導體層l〇4b易於氧化，故在製程階段將水氣通入此 發光二極體，在高溫約300°c〜8〇〇〇c下，第三半導體層1〇4c 會由外向内開始氧化，形成氧化鋁(八匕仏丨層1〇4a，其中爪 及n為整數。中間部分仍為未氧化的第三半導體層104c。 第二半導體層l〇4c的氧化速率隨著溫度越高越快，也隨著 銘含量越高越快。經過氧化的製程，於本實施例中，氧化 紹的折射係數為1.6 ’而第四半導體層1Q4b，如低銘含量 201248922 之石申化IS鎵層或填化紹鎵銦層，其折射係數大於3，二者 折射係數差異很大，因而所形成之反射層1 〇4可使波長範 圍580-630奈米之間的反射率幾乎達到接近1〇〇%，可以有 效的反射活性層108所發出的光。雖然在本實施例中，反 射層104是位於導電成長基板102與η型半導體層106之 間’但並非用以限制本發明。本實施例的布拉格反射層也 可以放置於η型半導體層106内，以達到本發明所欲達成 之效果。 請參照第6Α與6Β圖，其所繪示為本發明第四實施例 發光二極體結構200之的上視圖以及沿著W-W，虛線的剖 面圖。本實施例之水平式發光二極體結構200包括一導電 成長基板202具有一上表面203定義有第一區域2Α及一 第二區域2Β、一半導體磊晶疊層201位於導電成長基板202 之第一區域2Α上’包括依序堆疊於導電成長基板202之 反射層204、η型半導體層206、活性層（active layer)208、 及p型半導體層210。一透明導電層212位於p型半導體 層210上。一第一電極214形成於透明導電層212上，一 疊層保留部216形成於導電成長基板202之第二區域2B 上，第二電極218形成於導電成長基板202上並覆蓋疊層 保留部216。反射層204可為布拉格反射層，包括第三半 導體層204c與第四半導體層204b交互堆疊。本實施例係 以三對第三半導體層204c與第四半導體層204b所形成之 反射層204來做說明。為了縮短氧化的時間，本實施例由 發光二極體結構200的上表面蝕刻至導電成長基板202， 形成複數個孔洞240，使得反射層204可藉由孔洞240增 加第三半導體層204c氧化的面積。因此經由蝕刻孔洞的影 201248922 響，第三半導體層204c除了會在四周圍由外而内開始氧 化，在複數孔洞204會由内而外開始氧化，形成氧化銘 (AlxOy)層204a。最後，第一電極224形成在透明導電層212 上，以及第二電極218形成在導電成長基板202並包覆疊 層保留部216上完成此發光二極體結構200。本實施例中 發光二極體結構内具有複數個孔洞’雖然犠牲部分的 活性層面積，但增加高反射率反射層的面積，以達成更高 的反射率。而由於以含有氧化紹層所形成之布拉格反射層 可以提升可見光波長580-630奈米的反射率，故可增加發 光二極體的發光效率。此外，本實施例中的孔洞240也可 由發光二極體結構200的上表面蝕刻，但未蝕刻至導電成 長基板202，只露出部分的反射層204側壁（圖未示）。第一 實施例至第三實施例的半導體磊晶疊層101、1011、1012 也可形成複數個孔洞，使得反射層104、1041、1042除了 四周圍進行氧化外，可藉由孔洞同時進行氧化。 請參照第7A圖，本發明的第五實施例所揭示之水平 • 式發光二極體結構300包括一導電成長基板302具有一上 表面303定義有有一第一區域3A及一第二區域3B，一半 導體磊晶疊層301位於導電成長基板302之第一區域3A 上，其中半導體磊晶疊層301包括依序堆疊於導電成長基 板302之上的反射層304、n型半導體層306、活性層（active layer)308、p型半導體層310。一透明導電層312位於p型 半導體層310上。一第一電極314形成於透明導電層312 上，一凹部326形成於導電成長基板302之第二區域3B 上，第二電極318形成於導電成長基板302上並覆蓋凹部 12 201248922 326。半導體磊晶疊層301之組成及其製造步驟如實施例一 及實施例四所述。當完成半導體磊晶疊層3〇1的製作後， 蝕刻在第二區域3B上的半導體磊晶疊層3〇1至曝露出導電 成長基板302。接著圖案化蝕刻曝露出的導電成長基板第 二區域3B ’形成一凹部326，接著形成第二電極318於第 二區域B上’並覆蓋凹部326及覆蓋部分的露出部320。 第二電極318直接和導電成長基板3〇2接觸，透過導電導 電成長基板302和半導體磊晶疊層301電性連結。第二電 極318也可以部分覆蓋凹部326並部分覆蓋露出部320， 如第7B圖所示。凹部326之功能為增強第二電極318和導 電成長基板302的黏著力，避免第二電極318因黏著性不 佳而剝離。 請參照第8圖’本發明的第六實施例所揭示之水平式 發光二極體結構400包括：一導電成長基板4〇2具有一上表 面403定義有一第一區域4A及一第二區域4B、一半導體 磊晶疊層401形成於第一區域4A上，其中半導體磊晶疊 層401包括依序堆疊於導電成長基板4〇2上的反射層4〇4、 η型半導體層406、活性層（active layer)408、ρ变半導體層 410。一透明導電層412位於p型半導體層41〇上，一第一 電極414形成於透明導電層412上，一凹部426形成於導 電成長基板402之第二區域4B上，第二電極418形成於導 電成長基板402上並覆蓋凹部426。半導體磊晶疊層401 之組成及其製造步驟如第一實施例至第五實施例所述。當 完成半導體磊晶疊層401的製作後，蝕刻在第二區域4B 上的半導體磊晶疊層401至曝露出導電成長基板4〇2。接 著圖案化姓刻曝露出的導電成長基板第二區域4B，形成一 13 201248922 凹部426,接著形成第二電極418於第二區域B上，並覆 蓋凹部426及覆蓋部分的露出部420, η型電極418直接和 導電成長基板402接觸，透過導電成長基板402和半導體 磊晶疊層401電性連結。第二電極418也可以部分覆蓋凹 部426並部分覆蓋露出部420。凹部426之功能為增強第 二電極418和導電成長基板402的黏著力，避免第二電極 418因黏著性不佳而剝離。 本實施例之反射層404具有第三半導體層404c與第四 半導體層404c交互堆疊。為了要縮短氧化的時間，由發光 二極體結構400的上表面蝕刻至導電成長基板402，形成 複數個孔洞440，使得反射層404可藉由孔洞440以内而 外進行氧化形成氧化鋁(Alx〇y)層404a。第一電極424形成 在透明導電層412上，以及第二電極418形成在導電成長 基板402並包覆凹部426上，完成此發光二極體結構400。 本實施例中發光二極體結構内具有複數個孔洞440,雖然 犠牲部分的活性層面積，但增加高反射率反射層的面積。 實施例中的孔洞44〇也可由發光二極體結構400的上表面 姓刻’但不敍刻至導電成長基板4〇2，只需露出反射層 4〇4 ’藉由氧化的作用，形成氧化鋁(Alx〇y)層。 應注意的是’以上各實施例並未依照實際製品之比例 緣製。本發明所列舉之各實施例僅用以說明本發明，並非 用以限制本發明之範圍。任何人對本發明所作之任何顯而 易知之修飾或變更皆不脫離本發明之精神與範圍。 201248922 【圖式簡單說明】 第1A圖為本發明發光二極體元件之第一實施例上視 圖； 第1B圖為本發明發光二極體元件之第一實施例側視 剖面示意圖； 第1C圖為本發明發光二極體元件之第一實施例半導 體磊晶疊層側視剖面示意圖； 第1D圖為本發明發光二極體元件之第一實施例具疊 層保留部側視剖面示意圖； 第2A〜第CB圖係分別為本發明發光二極體元件之第 一實施例之不同形狀第二電極側視剖面示意圖； 第3圖為本發明發光二極體元件之第二實施例側視剖 面示意圖； 第4圖為本發明發光二極體元件之第三實施例側視剖 面不意圖， 第5A圖係為本發明發光二極體元件具有第三半導體 層與第四半導體層交互堆疊組成之側視剖面示意圖； 第5B圖係為本發明發光二極體元件經濕氧製程後之 剖面示意圖； 第6A圖係為本發明第四實施例發光二極體結構之的 上視圖， 第6B圖係本發明第四實施例發光二極體結構沿著 15 201248922 λν_\ν’虛線的剖面圖。 第7圖係為本發明第五實施例發光二極體結構之的上 視圖； 第8圖係為本發明第六實施例發光二極體結構之具有 可氧化的高鋁含量半導體層與不容易氧化半導體層堆疊組 成之側視剖面示意圖。 【主要元件符號說明】 100、 200、300、400水平式發光二極體結構 101、 201、301、401半導體磊晶疊層 102、 202、302、402導電成長基板 104、204、304、404 反射層 106、206、306、406 η 型半導體層 108、208、308、408 活性層 110、210、310、410 ρ 型半導體層 112、212、312、412透明導電層 114、214、314、414 第一電極 116、216、316、416疊晶保留部 118、218、318、418 第二電極 ΙΑ、2Α、3Α、4Α 第一區域 IB、2Β、3Β、4Β 第二區域 240孔洞 326、426 凹部 104a氧化鋁層 l〇4b第四半導體層 104c第三半導體層 16The upper surface of the junction of the light-emitting diode component has a first region and a first region located on the conductive growth substrate, comprising: a reflective layer located in the first semiconductor layer of the first ten generation, located at the reflection Above the semiconductor layer; and a second semiconductor layer having a conductive property of 4 201248922, located above the active layer; a first electrode on the second semiconductor layer; and a second electrode on the second region, transmitting through the conductive layer The growth substrate is electrically connected to the semiconductor epitaxial layer, wherein the first electrode and the second electrode are located on the same side of the conductive growth substrate. [Embodiment] The present invention provides a horizontal light-emitting diode structure having electrodes on the same side and a method of manufacturing the same. Referring to FIG. 1A and FIG. 1B, a top view of a horizontal LED structure on the same side of a first electrode and a second electrode according to a first embodiment of the present invention, and a side along a line of v_v, a dotted line View the section. The light emitting diode structure 1A includes a conductive growth substrate 1〇2 having an upper surface 103 ′ defining a first region 1A and a second region 1B, and the semiconductor dummy layer 101 is located on the first region 1A, wherein The semiconductor doped layer stack 101 includes a reflective layer 104 sequentially stacked on the first region 1A, an n-type semiconductor layer (eg, n_ciadding layer) 1〇6, an active layer (actWe layer) 108, and A p-type semiconductor layer (eg, p_cladding layer) 110, a transparent conductive layer 112 is disposed on the p-type semiconductor layer 110. A first electrode 114 is on the transparent conductive layer 112, and a stacked retention portion 116 is electrically conductive. On the second region 1B of the growth substrate 102, a second electrode 118 is formed on the second region 1B of the conductive growth substrate 102 and covers the laminate retention portion 116. Fig. 1C is a schematic view showing the structure of a semiconductor epitaxial laminate according to the first embodiment of the present invention. In the horizontal LED structure process disclosed in the present invention, a conductive growth substrate 102 is first provided. In the first embodiment of the present invention, the conductive growth substrate 102 has conductivity for growing or carrying a semiconductor epitaxial stack. Layer 101 is thereon. The 201248922 material constituting the conductive growth substrate 101 includes, but is not limited to, a (Ge), a gallium (GaAs), an indium (InP), a ruthenium (GaP), a carbonized stone (SiC), a stone (Si) , one or a combination of IU匕i (GaN). The conductive growth substrate has an upper surface 103 and defines a first region 1A and a second region 1B. Then, a reflective layer 104 is formed on the upper surface 103 of the conductive growth substrate. The reflective layer 104 is a Bragg reflection layer composed of a plurality of easily oxidized semiconductor layers and a stack of electrodes which are not easily oxidized. For example, the alternating stacking of AlAs/AlGaAs, the alternating stacking of AlAs/GaAs, and the AlAs/AlGalnP Interactive stacking, or an alternating stack of aluminum arsenide (AlAs)/indium gallium phosphide (InGaP), in which aluminum arsenide is a semiconductor layer that is easily oxidized, and other semiconductors that are matched with aluminum arsenide are semiconductors that are not easily oxidized. Floor. Next, over the reflective layer 104, an n-type semiconductor layer ι6 is formed. The material of the n-type semiconductor layer 106 includes, but is not limited to, aluminum gallium phosphide, gallium arsenide, or indium gallium phosphide. The composition of aluminum gallium indium phosphide is (AlxGa^ksInwP, wherein 0.5 is only exemplified 'for example (A lxGabjJylriyP, wherein X and y values only need 0 lt; x < l, y < l. Form an active layer 108 Above the n-type semiconductor layer 106, the material of the active layer includes, but is not limited to, aluminum gallium indium phosphide, and its composition is (A UGahVsIno.sP, wherein 0.5 is only an example. Taking the light-emitting diode as an example, it can be changed by The physical and chemical composition of one or more layers in the active layer 108 adjusts the wavelength of the emitted light. Commonly used materials are the dish indium gallium indium series, the filled Ilu indium series, the nitrided indium gallium indium (AlGalnN) series, zinc oxide. (zn〇) series, which can be single heterostructure (SH), double heterostructure (DH), double-sided double heterostructure (2012H), double-sided double heterostructure (DDH), multi-layer lining structure ( Multi-quantum well, MWQ). Take a multi-layer quantum well structure as an example. It has multiple barrier layers and quantum well layers alternately stacked. The barrier layer is (AlyGauksIi^P, 0.5SyS0.8; quantum well layer system). For In〇.5Ga〇_5P. One P half The bulk layer 110 is formed on the active layer 'for example, p-type gallium phosphide (GaP), and the material thereof includes, but is not limited to, aluminum gallium indium phosphide (InGaAlP), and its composition is (AlxGai-OojIno.sP, wherein 0.5 For the sake of exemplification '(AlxGadylriyP, where the X and y values only need 0 < X < 1 ' y < l. wherein the n-type semiconductor layer 1 〇 6 thickness is about 3 μ Γ η, the p-variable semiconductor layer 11 〇 thickness is about ΙΟ μιη, The thickness of the active layer 1108 is about 0.3 to 1.5 μm. The transparent conductive layer 112 is formed by electron beam evaporation or sputtering to cover the p-type semiconductor layer 110. The transparent conductive layer 112 may be made of a metal oxide such as indium. Tin oxide (ΙΤΟ) 'CdTe oxide (CTO), antimony tin oxide, indium zinc oxide (ΙΖΟ), zinc aluminum oxide (ΑΖΟ), gallium zinc oxide (GZO), zinc oxide (ζη〇) and zinc tin oxide Any one of the thicknesses; the thickness is about 0.005 μm to 〇.6 μηι. Referring to FIG. 1D, the semiconductor epitaxial layer on the second region 1 进行 is patterned and etched to form an exposed portion 120 and a stacked portion. 116, the exposed portion 120 is exposed to the semiconductor epitaxial stack after etching The substrate 102 is formed, wherein when the stack retention portion retained Πό etching semiconductor epitaxial semiconductor epitaxial laminate stack part is formed. The laminate retention portion 116 may have a composition material that is identical to the semiconductor epitaxial laminate 101, for example, having a reflective layer 104, an n-type semiconductor layer 106, an active layer 108, a p-type semiconductor layer 110, or a transparent conductive The layer 112 may also have only the reflective layer 104; or a plurality of layers having the semiconductor doped layer stack 1〇1, 201248922, for example, two layers of epitaxial structures having the reflective layer 104 and the n-type semiconductor layer 1〇6; the reflective layer 104 Three layers of epitaxial structures of the n-type semiconductor layer 1〇6 and the active layer 1〇8; four layers of epitaxial structures of the reflective layer 104, the n-type semiconductor layer 1〇6, the active layer 1〇8, and the p-type semiconductor layer 110 . Referring to Fig. 2, the first electrode 114 is formed on the transparent conductive layer 112, and the second electrode 118 is formed on the second region 1?, completely covering the laminated retention portion 116 and covering the exposed portion 12 of the portion. The second electrode 118 and the exposed portion 120 are in direct contact with each other, and are electrically connected to the semiconductor epitaxial layer stack 1 through the direct contact with the conductive growth substrate 1〇2; the light emitting diode structure is completed. Hey. The second electrode 118 may also partially cover the layer remaining portion 116 and partially cover the exposed portion 12A as shown in Figs. 2 and 2C. The function of the lamination holding portion 116 is to enhance the adhesion of the second electrode 118 and the conductive growth substrate 102, and to prevent the second electrode U8 from being peeled off due to poor adhesion. Fig. 3 is a side elevational view showing the horizontal light emitting diode structure 1〇〇1 of the second embodiment of the present invention. The structure of the semiconductor epitaxial layer stack 11 and the process steps thereof are the same as those of the semiconductor epitaxial layer stack 1〇1 of the first embodiment, except that the semiconductor epitaxial layer stack 1〇11 on the second region 11Β is in the figure. After the etching, an exposed portion 12〇1 and a stacked remaining portion 1161 are formed, wherein the exposed portion 1201 is formed by etching the reflective layer 1041 after etching the semiconductor epitaxial layer 1〇u. The laminate retention portion 1161 is formed by a portion of the semiconductor epitaxial laminate 1011 retained when the semiconductor epitaxial stack wn is etched. The laminate retention portion 1161 may have a composition having only an n-type semiconductor layer, a semiconductor crystallite laminate having a plurality of layers thereof, for example, a two-layer epitaxial structure having an n-type semiconductor layer 1061 and an active layer 1 81; an n-type semiconductor Layer 8 201248922 1061, active layer 1081 and p-type semiconductor layer lioi three-layer epitaxial structure; n-type semiconductor layer 1061, active layer 1081, p-type semiconductor layer iioi and transparent conductive layer 1121 four-layer structure. Finally, the first electrode 1141 is formed on the transparent conductive layer 1121, and the second electrode 1181 is formed on the second region 11?, completely covering the laminated remaining portion 1161 and covering the exposed portion 1201 of the portion. The second electrode 1181 is in direct contact with the exposed portion 1201, and is electrically connected by the reflective layer 1〇41 and the conductive growth substrate 丨〇21 and the semiconductor epitaxial laminate 1011. The light emitting diode structure 1001 is completed. The second electrode 1181 may also partially cover the laminate retaining portion 1161 and partially cover the exposed portion 1201. The function of the layer remaining portion ι 161 is to enhance the adhesion of the second second electrode 1181 and the conductive growth substrate 1 21 to prevent the second electrode 1181 from being peeled off due to poor adhesion. Fig. 4 is a side elevational view showing a horizontal light emitting diode structure 1002 of a third embodiment of the present invention. The structure of the semiconductor dummy layer stack 12 and the process steps thereof are the same as those of the semiconductor epitaxial layers 101, 1011 of the first embodiment and the second embodiment, except that the semiconductor epitaxial layer stack on the second region 111 is formed. After the pattern etching, an exposed portion 12〇2 and a stacked remaining portion 1162 are formed. The exposed portion 1202 is formed by etching the semiconductor epitaxial layer 1012 and exposing the n-type semiconductor layer 1062. The stacked remaining portion 1162 is formed. A portion of the semiconductor epitaxial stack 1012 retained by the semiconductor epitaxial stack 1 〇 12 is formed. The layer-retaining portion 1162 may be composed of only the n-type semiconductor layer 1062; or a semiconductor epitaxial layer 1012 having a plurality of layers thereof, for example, a two-layer epitaxial structure of the s-type semiconductor layer 1062 and the active layer 1 〇 82; The semiconductor layer 1062, the active layer 1082, and the p-type semiconductor layer 1102 have three layers of epitaxial structure; the n-type semiconductor layer 1062, the active layer 1〇82, 9 201248922, the P-type semiconductor layer 1102, and the transparent conductive layer 1122 have a four-layer structure. The first electrode 1142 is formed on the transparent conductive layer 1122. The second electrode 1182 is formed on the second region 111B to completely cover the laminate remaining portion 1162 and cover the exposed portion 202 of the portion. The second electrode 1182 and the covered portion The exposed portion 1202 is in direct contact, and is electrically connected by the n-type semiconductor layer 1062, the reflective layer 1042, and the conductive growth substrate 1022 and the semiconductor epitaxial layer stack 1012; the light emitting diode structure 1002 is completed. The second electrode 1182 may also be partially The laminate retention portion 1162 is covered and partially covers the exposed portion 1202. The function of the laminate retention portion 1162 is to enhance the adhesion of the second electrode 1182 and the conductive growth substrate 1022, thereby avoiding the adhesion of the second electrode 1182. Preferably, as shown in FIG. 5, the reflective layer 104 in the first embodiment described above may be a Bragg reflective layer, which is composed of a plurality of pairs of third semiconductor layers 104c and fourth semiconductor layers 104b stacked alternately. The three pairs of third semiconductor layers i 〇 4 c and the fourth semiconductor layer 104 b are alternately stacked for illustration, and the logarithm is not limited. The third semiconductor layer 10 4 c may be an aluminum arsenide (A1As) e fourth semiconductor layer 10 4b It may be composed of galvanic aluminum gallium, gallium arsenide, aluminum gallium phosphide, or indium gallium phosphide. As shown in FIG. 5B, since the third semiconductor layer 1 〇 4c has characteristics better than the fourth semiconductor layer 〇 4b It is easy to oxidize, so water vapor is introduced into the light-emitting diode during the process, and at a high temperature of about 300 ° C to 8 ° C, the third semiconductor layer 1 〇 4c starts to oxidize from the outside to the inside to form aluminum oxide ( The gossip layer 1〇4a, wherein the claws and n are integers. The middle portion is still the unoxidized third semiconductor layer 104c. The oxidation rate of the second semiconductor layer 10c4c is higher as the temperature is higher, and also The higher the content, the faster the content. In the oxidation process, in this embodiment, the refractive index of the oxidation is 1.6' and the fourth semiconductor layer 1Q4b, such as the low-content 201248922 stone Shenhua IS gallium layer or filled with gallium indium layer, the refractive index is greater than 3, the refractive index of the two is very different, so the formed reflective layer 1 〇4 can make the reflectance between the wavelength range of 580-630 nm almost close to 1%, and can effectively reflect the light emitted by the active layer 108. Although in the present embodiment, the reflective layer 104 is located in the conductive growth. The substrate 102 and the n-type semiconductor layer 106 are 'but are not intended to limit the invention. The Bragg reflection layer of this embodiment can also be placed in the n-type semiconductor layer 106 to achieve the desired effect of the present invention. Referring to Figures 6 and 6, there is shown a top view of a light emitting diode structure 200 and a cross-sectional view along the line W-W, in accordance with a fourth embodiment of the present invention. The horizontal light emitting diode structure 200 of the present embodiment includes a conductive growth substrate 202 having an upper surface 203 defining a first region 2 and a second region 2, and a semiconductor epitaxial layer 201 being disposed on the conductive growth substrate 202. A region 2 includes a reflective layer 204, an n-type semiconductor layer 206, an active layer 208, and a p-type semiconductor layer 210 which are sequentially stacked on the conductive growth substrate 202. A transparent conductive layer 212 is on the p-type semiconductor layer 210. A first electrode 214 is formed on the transparent conductive layer 212, a laminated retention portion 216 is formed on the second region 2B of the conductive growth substrate 202, and a second electrode 218 is formed on the conductive growth substrate 202 and covers the laminate retention portion 216. . The reflective layer 204 can be a Bragg reflective layer comprising a third semiconductor layer 204c and a fourth semiconductor layer 204b alternately stacked. This embodiment is described by the reflection layer 204 formed by the three pairs of the third semiconductor layer 204c and the fourth semiconductor layer 204b. In order to shorten the oxidation time, the upper surface of the light emitting diode structure 200 is etched to the conductive growth substrate 202 to form a plurality of holes 240, so that the reflective layer 204 can increase the area of oxidation of the third semiconductor layer 204c by the holes 240. . Therefore, by etching the shadow of the hole 201248922, the third semiconductor layer 204c starts to be oxidized from the outside in the periphery, and the plurality of holes 204 are oxidized from the inside to the outside to form an AlxOy layer 204a. Finally, the first electrode 224 is formed on the transparent conductive layer 212, and the second electrode 218 is formed on the conductive growth substrate 202 and over the cladding retention portion 216 to complete the LED structure 200. In this embodiment, the plurality of holes in the structure of the light-emitting diode have an active layer area of the salient portion, but increase the area of the high-reflectivity reflective layer to achieve a higher reflectance. Since the Bragg reflection layer formed by the oxide layer can increase the reflectance of the visible light wavelength of 580-630 nm, the luminous efficiency of the light-emitting diode can be increased. In addition, the holes 240 in this embodiment may also be etched from the upper surface of the LED structure 200, but are not etched to the conductive substrate 202, and only a portion of the sidewalls of the reflective layer 204 (not shown) are exposed. The semiconductor epitaxial laminates 101, 1011, and 1012 of the first to third embodiments may also form a plurality of holes such that the reflective layers 104, 1041, and 1042 may be simultaneously oxidized by the holes in addition to the oxidation around the periphery. Referring to FIG. 7A, a horizontal light emitting diode structure 300 according to a fifth embodiment of the present invention includes a conductive growth substrate 302 having an upper surface 303 defined with a first region 3A and a second region 3B. A semiconductor epitaxial layer stack 301 is disposed on the first region 3A of the conductive growth substrate 302. The semiconductor epitaxial layer stack 301 includes a reflective layer 304, an n-type semiconductor layer 306, and an active layer stacked on the conductive growth substrate 302. (active layer) 308, p-type semiconductor layer 310. A transparent conductive layer 312 is on the p-type semiconductor layer 310. A first electrode 314 is formed on the transparent conductive layer 312, a recess 326 is formed on the second region 3B of the conductive growth substrate 302, and a second electrode 318 is formed on the conductive growth substrate 302 and covers the recess 12 201248922 326. The composition of the semiconductor epitaxial layer stack 301 and the manufacturing steps thereof are as described in the first embodiment and the fourth embodiment. After the fabrication of the semiconductor epitaxial laminate 3?1 is completed, the semiconductor epitaxial laminate 3?1 on the second region 3B is etched to expose the conductive growth substrate 302. The conductive grown substrate second region 3B' is then patterned to form a recess 326, and then a second electrode 318 is formed on the second region B and covers the recess 326 and the exposed portion 320 of the cover portion. The second electrode 318 is in direct contact with the conductive growth substrate 3〇2, and is electrically connected to the conductive epitaxial growth substrate 302 and the semiconductor epitaxial laminate 301. The second electrode 318 may also partially cover the recess 326 and partially cover the exposed portion 320 as shown in Fig. 7B. The function of the recess 326 is to enhance the adhesion of the second electrode 318 and the conductive growth substrate 302, and to prevent the second electrode 318 from being peeled off due to poor adhesion. Referring to FIG. 8 , the horizontal light emitting diode structure 400 disclosed in the sixth embodiment of the present invention includes: a conductive growth substrate 4 〇 2 having an upper surface 403 defining a first region 4A and a second region 4B. A semiconductor epitaxial layer stack 401 is formed on the first region 4A, wherein the semiconductor epitaxial layer stack 401 includes a reflective layer 4〇4, an n-type semiconductor layer 406, and an active layer which are sequentially stacked on the conductive growth substrate 4〇2. (active layer) 408, ρ variable semiconductor layer 410. A transparent conductive layer 412 is disposed on the p-type semiconductor layer 41, a first electrode 414 is formed on the transparent conductive layer 412, a recess 426 is formed on the second region 4B of the conductive growth substrate 402, and the second electrode 418 is formed on the conductive layer. The substrate 402 is grown and covered with a recess 426. The composition of the semiconductor epitaxial layer stack 401 and the manufacturing steps thereof are as described in the first to fifth embodiments. After the fabrication of the semiconductor epitaxial layer stack 401 is completed, the semiconductor epitaxial layer stack 401 on the second region 4B is etched to expose the conductive growth substrate 4〇2. Then, the conductive growth substrate second region 4B exposed by the surname is patterned to form a 13 201248922 recess 426, and then the second electrode 418 is formed on the second region B, and covers the recess 426 and the exposed portion 420 of the cover portion, n-type The electrode 418 is in direct contact with the conductive growth substrate 402, and is electrically connected to the semiconductor epitaxial laminate 401 through the conductive growth substrate 402. The second electrode 418 may also partially cover the recess 426 and partially cover the exposed portion 420. The function of the recess 426 is to enhance the adhesion of the second electrode 418 and the conductive growth substrate 402, and to prevent the second electrode 418 from being peeled off due to poor adhesion. The reflective layer 404 of this embodiment has a third semiconductor layer 404c and a fourth semiconductor layer 404c alternately stacked. In order to shorten the oxidation time, the upper surface of the light emitting diode structure 400 is etched to the conductive growth substrate 402 to form a plurality of holes 440, so that the reflective layer 404 can be oxidized by the holes 440 to form aluminum oxide (Alx〇). y) layer 404a. The first electrode 424 is formed on the transparent conductive layer 412, and the second electrode 418 is formed on the conductive growth substrate 402 and covers the recess 426 to complete the LED structure 400. In the present embodiment, the light-emitting diode structure has a plurality of holes 440 therein, and the area of the high-reflectivity reflective layer is increased although the active layer area of the portion is sacrificed. The hole 44〇 in the embodiment may also be etched by the upper surface of the light-emitting diode structure 400 but not etched into the conductive growth substrate 4〇2, and only the exposed reflective layer 4〇4' is formed by oxidation to form oxidation. Aluminum (Alx〇y) layer. It should be noted that the above embodiments are not in accordance with the actual product ratio. The examples of the invention are intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art are possible without departing from the spirit and scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a top view of a first embodiment of a light-emitting diode element according to the present invention; FIG. 1B is a side cross-sectional view showing a first embodiment of the light-emitting diode element of the present invention; 2 is a side cross-sectional view of a semiconductor epitaxial layer stack of a first embodiment of the present invention; FIG. 1D is a side cross-sectional view of a first embodiment of a light emitting diode device according to the present invention; 2A to CB are respectively a side view of a second electrode of different shapes of the first embodiment of the light-emitting diode element of the present invention; and FIG. 3 is a side cross-sectional view of the second embodiment of the light-emitting diode element of the present invention; 4 is a side view of a third embodiment of the light-emitting diode element of the present invention. FIG. 5A is a schematic diagram of the light-emitting diode element of the present invention having a third semiconductor layer and a fourth semiconductor layer alternately stacked. Figure 5B is a schematic cross-sectional view of the light-emitting diode component of the present invention after the wet oxygen process; Figure 6A is a top view of the light-emitting diode structure of the fourth embodiment of the present invention, FIG 6B a fourth embodiment of the present invention based light emitting diode structure along 15 201248922 λν_ \ ν 'cross-sectional view of a broken line in FIG. 7 is a top view of a structure of a light-emitting diode according to a fifth embodiment of the present invention; and FIG. 8 is a view showing an oxidizable high-aluminum content semiconductor layer of the light-emitting diode structure of the sixth embodiment of the present invention. A schematic cross-sectional view of a stack of oxidized semiconductor layers. [Description of main component symbols] 100, 200, 300, 400 horizontal LED structure 101, 201, 301, 401 semiconductor epitaxial stack 102, 202, 302, 402 conductive growth substrate 104, 204, 304, 404 reflection Layers 106, 206, 306, 406 n-type semiconductor layers 108, 208, 308, 408 active layers 110, 210, 310, 410 p-type semiconductor layers 112, 212, 312, 412 transparent conductive layers 114, 214, 314, 414 One electrode 116, 216, 316, 416 lamination retention portion 118, 218, 318, 418 second electrode ΙΑ, 2 Α, 3 Α, 4 Α first region IB, 2 Β, 3 Β, 4 Β second region 240 hole 326, 426 recess 104a Alumina layer 10b 4b fourth semiconductor layer 104c third semiconductor layer 16