201107924 六、發明說明： 【發明所屬之技術領域】 本發明係有關於-種可適性偏壓 偏壓通訊系_可適性偏壓電路。，尤指—麵以it應性地 【先前技術】 們的：：讀處可見’在任何可，到的地方都可找到他 2者科技進步，在·價格下，電子_的更加輕 ㈣、卻提供更㈣大的魏。部_是由於更小的電子元件 唾手可得，像是電晶體、晶片電容L，可改善規格的卿電 路架構也是提升上述電子裝置效能的—部分原因。 放大器幾乎是每-電子裝置中的關鍵元件。放大器的電子特性 =化把_常廣，像是增益、織、及雜㈣；其制範圍也相 §廣泛’像是主動濾波器(activefllter)、緩衝器、類比訊號轉數位訊 號(analog-to-digital)的轉換器、及rf收發器等。 目前’大部分使用在積體電路内的放大器係使用一個電晶體或 複數個電晶體以提供訊號放大的功能。在一些應用當中，像是用在 201107924 RF收發器的功率放大器，其中提供放大功能的電晶體之線性操作範 圍就疋重要的W)·考I，為了要達到提供放大功能的電晶體之線性 操作範圍，·壓電_接至辨獻如提供麵電流或偏壓電 壓給提供放大魏的電晶體。—般練，偏壓電流或偏壓電壓的設 計是要使提做大魏的電晶_雜操作細最大，但電流消耗 最少。 -種用以增加提供放大魏的電晶體的線性操作範圍的技術是 可適性偏壓(adaptivebiasing)，不像用固定的偏壓電流或偏壓電壓來 偏壓提供放大功麟體，可雜麟桃(令^ —it)基於輸人訊號的特性，像是減、她、頻轉調整偏壓電 流或驗糕的大小。可適性偏壓電路也可結合傳統偏壓電路，用 以提供微調偏壓電流或偏壓電壓的效果。 請參照第1圖，第1圖係先前技術的可適性偏壓電路的示意圖。 在第1圖中，該可適性祕電路偏壓一功率放大器電晶體qi，“而功 率放大器電晶體Q1係透過-輸出㈣電路輸出—輸出訊號。該可 適性偏壓電路有一偏壓電晶體Q2、一第一偏壓電阻反卜一第二偏 壓二極體D卜及-第二偏壓二極體D2。偏壓電晶 ，接至-供應電壓Vex，偏壓電晶體Q2的射極細接至功率放大 器電晶體Q1的基極。第-偏壓電阻則係墟在—偏壓電壓 和偏麗電晶體Q2的基極之間。第-偏壓二極體D1的正極係減至 偏壓電晶體Q2的基極，以及第一偏壓二極體D1的負極係輕接至第 201107924 二偏壓二極體D2的正極。第二偏壓二極體取的負極係捕至地。 田透a Κ：ι接收的輸入訊號的功率增加時，也就是在偏壓 電晶體Q2的射極的功率增加時，偏壓電晶體φ流出更多可適性偏 昼電流至功率放大ϋ電晶體Q1的基極輯持功率放大器電晶體^ 操作在線性範圍，讓功率放大料轉操作在線性翻的可適 性偏壓電流取決於功率放Α||電晶體本身的特性以及耗合至功率放 大器的匹配電路。 在某些情況下，當輸入功率增加時，由偏壓電晶體q2的射極 所提供的可適性偏壓電流無法爛足以使放A||操作在線性範圍， 因此’在上述情況下，將需要—觀善過的可雜偏壓電路以提供 對輸入功率更敏感的可適性偏壓電流。 請參照第4圖’第4圖係先前技術的偏壓電路4〇的示意圖。第 4圖所示的偏壓電路40係揭露在美國專利案第6,859，1G3號，名稱 為“用以改善射頻功率放大器的線性度的偏壓電路，，，偏壓電路40包 含被兩個二極體40卜402以及—電阻偏壓的一偏壓電晶體412，而 偏1電曰曰體412 &供偏壓電流給一功率放大器電晶體422。射頻訊 破從功率放大器電晶體422祕極輸入，該射頻訊號藉由電感4〇4 和偏壓電晶體412的射極部份隔離。電感4〇6、電容4〇5串接共振 腔電路傳導δ亥射頻§孔號的一苐一譜波至地。透過偏壓電晶體412， 偏壓電路40隨著一輸入訊號功率增加而放出更多可適性偏壓電- 7 201107924 流，但是卻不缺供_輸人·_錄妓的可触偏壓電流< m 第5圖，第5圖係先前技術的另一偏壓電路50的示意 圖。第5圖所示的偏屢電路5〇係财在美國專利案第明彻號， 名稱為“用以功率放大器的偏歷控制電路，，，偏屢電路50包含一純 =電路观，用以偏壓-功率放大器電晶體5〇1。偏魏路㈣ ^ :外的偏㈣路5〇4，偏㈣路5〇4係透過一控制電壓— 開啟J請，以及提供額外的_電流給功率放大器電晶體训。 祕電路50 _及_可能的功顿式：―較·^辨模式和一 南輸出功率模式’但如果需要更多功率模式，則必需外加更多的電 晶體。此外，該功賴式是藉由所蚊，也就是需 要額外的電路來提供控制電壓Vc〇m，並且決定何時切換控制電壓 Vcom。 【發明内容】 一種用以適應性地祕通⑽統的可適性偏壓電路，該可適性 偏壓電路包含-第-電晶體、—偏壓電路、U合胸、一筹 t電晶體及-第二齡模組。該第—電晶體具有—第—端，一第二 %輛接至i應電源，和—第三端；該偏壓電路耗接至該第一電曰 體2一端和_顧，_供,_—電晶體；^ 耦°模組具有一第一端輕接至該第一電晶體的第三端，和一第二 端係輕接至該通訊线之電子電路的輸人端，用叫合輸入訊娜 201107924 量的一部分至該第一電晶體的該第三端；該第二電晶體具有一第一 端搞接至該第一電晶體的第三端，一第二端係耦接至該供應電源， 和一第三端；及該第二耦合模組具有一第一端耦接至該第二電晶體 的第三端，和一第二端耦接至該電子電路的輸入端。 根據本發明概念，本發明更提出另一種用以適應性地偏壓通訊 系統的可適性偏壓電路，該可適性偏壓電路包含一偏壓二極體、一 Φ偏壓電路、一第一耦合模組、一第二電晶體及一第二耦合模組。該 偏壓二極體具有一第一端和一第二端；該偏壓電路耦接至該偏壓二 極體的第和-供應電源，用以提供―偏壓給該偏壓二極體；該 第-搞合模組具有-第-端祕至該偏壓二極體的第二端，和一第 二端麵接至該通訊系統之電子電路的輸人端，合輸入訊號能 量的-部分至該偏壓二極體的第二端；該第二電晶體具有一第一端 耗接至該偏壓二極體的第二端，一第二端_至該供應電源，和一 •第三端；及該第二搞合模組，具有一第一端輕接至該第二電晶體的 第三端，和一第二端耦接至該電子電路的輸入端。 【實施方式】 料照第2圖’第2圖係為本發明可適性偏壓電路·的第一 實施例的不意圖。可適性偏壓電路2〇〇偏壓 厂力率放大器電晶體Q1透過一扼流圈2^ 塾vccl ’以及透過一輸出匹配電路2〇3輸出一輸出訊號。功率放心 201107924 =::=::=: 可適性偏壓電路200包含一偏廢電晶體(第一電晶體 流增益電晶體(第二電晶體)Q3、一偏壓電路2〇7、―第一耗合模植 206、以及-第二輕合模组2〇5。偏壓電晶體Q2的集極係 第二供應電壓Vee2，驗電晶體Q2的射極係输至電流增益電晶 體Q3的基極，電流增益電晶體Q3的集極係搞接至一第四供應電壓 偏壓電路207偏壓偏壓電晶體Q2的基極。偏壓電路2〇7係麵 接至-第三供應電壓Vcc3和一參考電壓，偏壓電路2〇7可能是一 電流鏡或-賴分壓器(她agedivider)，兩者都是廣為人知且有許 多不同的變化。例如，偏壓電路2〇7可藉她接串聯三個接成二極 體形式的電晶體(diode-connected transistor)及一電阻建立一偏壓電 壓Vbias來實現。或是可藉由串聯二個接成二極體形式的電晶體， 或可藉由串聯二個接成二極體形式的電晶體以及一電阻來實現偏壓 電路207。 第一耦合模組206的第一端係耦接至偏壓電晶體Q2的射極， 以及第一耦合模組206的第二端耦接至功率放大器電晶體q】的基 極。如第2圖所示，第一耦合模組2〇6係由一電容235串聯一電阻 201107924 237組成，並耦接至偏壓電晶體Q2的射極。電容和電阻幻7 的串聯順序並不侷限於第2圖。另外，電阻237是非必須的，也可 由短路取代，在有串聯電阻237的情況下，第一轉合模组可包 含一並聯(shunt)電阻從電容235的第一端耦接至電阻237的第二 端；或是在沒有串聯電阻237的情況下，第一麵合模組2〇6可包含 一並聯(shunt)電阻從電容235的第一端耦接至電容故的第二端。 除此之外，-二極體電路，例如―二極體或―接成二極體形式的電 #晶體也可_在偏壓電晶體Q2的射極和功率放A||電晶體Q1的基 極之間作為第一耦合模組206。 第二耦合模組205的第一端係耦接至電流增益電晶體Q3的射 極以及第一麵合模組2〇5的第二端係輕接至功率放大器電晶體qi 的基極。第二耦合模組2〇5包含一電阻239，電阻239的第一端係 輕接至電流增益電gQ3的射極以及電阻现的第二端係麵接至 _功率放大器電晶體Q1的基極。第二耦合模組205可另包含一並聯 (shunt)電容，其並聯耦接電阻239，該並聯電容的第一端係耦接至 電流增益電晶體Q3的射極，以及該並聯電容的第二端係耦接至功 率放大器電晶體Q1的基極。另外亦可藉由一電感、一電感串聯耦 接一電阻、或短路實現第二耦合模組2〇5。 清參照第3圖，第3圖係為說明可適性偏壓電路2〇〇的第二實 施例的不意圖。該第二實施例類似於第2圖之第一實施例，所以以 下僅說明在兩實施例之間的差異。相較於第2圖之第一實施例，^ 11 201107924 該第一實施例中，偏壓電晶體Q2由輕接在偏壓電麼獨as和電流增 益電晶體Q3 極之間的—偏壓二極體D所取代。偏壓二極體d曰 可以是接成二極體形式的電晶體。 在第2 @之第—實施_操作中，當輸人減的功率增加時， 偏壓電晶體Q2透過第-輕合模組2〇6接收更多功率，以及產生更 多可適性驗(adaptive eurrem)舰至電流增魏晶體Q3的基極。 然後藉由電流增益電晶體Q3的電流增益放大可適性電流，並透過 第二耗合模組2〇5饋送至功率放大器電晶體Qi。同樣地在該第二籲 實施例的操作·中，當輸入訊號的功率增加時，偏壓二極體D透過第 一耦合模組206接收更多功率，以及產生更多可適性電流饋送至電 流增益電晶體Q3的基極。然後藉由電流增益電晶體Q3的電流增益 放大可適性電流，並透過第二耦合模組205饋送至功率放大器電晶 體Φ。 上述實施例也可應用在低雜訊放大器〇ow noise amplifler, LNA) 鲁 或混頻器(mixer)。功率放大器電晶體q卜偏壓電晶體Q2、以及電 流增益電晶體Q3可由金氧半場效電晶體(metai-oxide-semiconductor field-effect transistor, MOSFET)、金屬半導體場效電晶體 (metal-semiconductor field-effect transistor，MESFET)、雙極電晶體 (bipolar junction transistor, BJT)、或異質接面雙載子電晶體 (heterojunction bipolar transistor，HBT)實現。電容可由金屬-絕緣體_ 金屬電容(metal-insulator-metal capacitor，MIM)、金屬-氧化物-金屬電 12 201107924 容(metal-oxide-metal capacitor, MOM)、金氧半電晶體-電容 (MOSFET-capacitor，MOS-cap)、指插型電容(interdigitaieapacit〇r， IDC) '或接面電容(junctioncapacitor)實現。二極體可由接成二極體 形式的電晶體實現。另外，第一供應電源Vccl、第二供應電源Vcc2、 第二供應電源Vcc3、以及第四供應電源Vcc4可以獨立設計，也可 視需要結合至一或多個供應電源。 相較於先前技術，在第2圖和第3圖中的可適性偏壓電路2〇〇， 因為偏壓電晶體Q2或偏壓二極體D的可適性電流可藉由電流增益 電晶體Q3的電流增益而放大，所以可產生隨輸入功率增加而較靈 敏的偏壓電流。因此，功率放大器電晶體Q1的偏壓點可隨輸入功 率增加而較靈敏的從AB類放大器移至a類放大器。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍 所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖係先前技術的可適性偏壓電路的示意圖。 第2圖係本發明的可適性偏壓電路的第—實施例的示意圖。 第3圖係本發明的可適性偏壓電路的第二實施例的示意圖。 第4圖係先前技術的偏壓電路的示意圖。 第5圖係先前技術的另一偏壓電路的示意圖。 [S 1 13 201107924 【主要元件符號說明】 40、50、207、504 偏壓電路 200 可適性偏壓電路 202 輸入匹配電路 203 輸出匹配電路 204 扼流圈 205 第二耦合模組 206 第一搞合模組 235、405、C1 電容 237 ' 239 電阻 401、402 二極體 406、404 電感 502 初級偏壓電路 D 偏壓二極體 D1 第一偏壓二極體 D2 第二偏壓二極體 R1 第一偏壓電阻 Q1、422、501 功率放大器電晶體 Q2 > 412 偏壓電晶體 Q3 電流增益電晶體201107924 VI. Description of the Invention: [Technical Field] The present invention relates to an adaptive bias bias communication system-adaptive bias circuit. , especially - face to it [previous technology] Our:: reading can be seen 'anywhere, you can find him in two places, scientific and technological progress, at the price, the electronic _ is lighter (four), But provide more (four) big Wei. Part _ is due to the fact that smaller electronic components are readily available, such as transistors, wafer capacitors L, and the improved circuit architecture is also part of the reason for improving the performance of these electronic devices. Amplifiers are almost a key component in every electronic device. The electronic characteristics of the amplifier = _ Chang Guang, such as gain, weave, and miscellaneous (four); its range is also wide - like active filter (activefllter), buffer, analog signal to digital signal (analog-to -digital converter, rf transceiver, etc. At present, most of the amplifiers used in integrated circuits use a transistor or a plurality of transistors to provide signal amplification. In some applications, such as the power amplifier used in the 201107924 RF transceiver, the linear operating range of the transistor that provides the amplification function is important.) In order to achieve the linear operation of the transistor that provides the amplification function. Range, Piezoelectric_Connected to the splicing, such as providing a surface current or bias voltage to provide a transistor that amplifies Wei. As a general practice, the design of the bias current or the bias voltage is to make the electron crystal-micro-heavy operation of the Weiwei the largest, but the current consumption is the least. A technique for increasing the linear operating range of a transistor that provides amplifying Wei is adaptive biasing, unlike biasing a fixed bias current or a bias voltage to provide an amplification function. Peach (Let ^-it) is based on the characteristics of the input signal, such as subtraction, her, frequency adjustment bias current or the size of the cake. The adaptive bias circuit can also be combined with a conventional bias circuit to provide the effect of trimming the bias current or bias voltage. Please refer to FIG. 1. FIG. 1 is a schematic diagram of a prior art adaptive bias circuit. In Fig. 1, the adaptive circuit is biased to a power amplifier transistor qi, "and the power amplifier transistor Q1 is a through-output (four) circuit output-output signal. The adaptive bias circuit has a bias transistor Q2, a first bias resistor is opposite to a second bias diode Db and a second bias diode D2. The bias transistor is connected to the - supply voltage Vex, and the bias transistor Q2 is fired. Very finely connected to the base of the power amplifier transistor Q1. The first-bias resistor is between the bias voltage and the base of the polarized transistor Q2. The positive terminal of the first-bias diode D1 is reduced to The base of the biasing transistor Q2 and the negative electrode of the first biasing diode D1 are lightly connected to the positive pole of the biasing diode D2 of the 201107924. The negative pole of the second biasing diode is captured to the ground. Tian Pei a Κ: When the power of the input signal received by ι increases, that is, when the power of the emitter of the bias transistor Q2 increases, the bias transistor φ flows out more adaptive bias current to the power amplifier. The base of crystal Q1 is superimposed on the power amplifier transistor ^ operating in the linear range, allowing the power amplification material to operate online The adaptive bias current of the turn depends on the characteristics of the power amplifier || the transistor itself and the matching circuit that is consuming to the power amplifier. In some cases, when the input power increases, the emitter of the bias transistor q2 The available bias current is not suffocating enough to operate the A|| in a linear range, so 'in the above case, it would be necessary to look at the good bias circuit to provide more sensitivity to the input power. Appropriate bias current. Please refer to Fig. 4'. Fig. 4 is a schematic diagram of a prior art bias circuit 4A. The bias circuit 40 shown in Fig. 4 is disclosed in U.S. Patent No. 6,859,1G3. The name is "a bias circuit for improving the linearity of the RF power amplifier, and the bias circuit 40 includes a bias transistor 412 biased by the two diodes 402 and - resistors, and is biased. An electrical body 412 & bias current is applied to a power amplifier transistor 422. The RF signal is broken from the power amplifier transistor 422 secret input, and the RF signal is isolated by the emitter 4〇4 and the emitter portion of the bias transistor 412. The inductor 4〇6 and the capacitor 4〇5 are connected in series with the resonant cavity circuit to conduct the δH RF § hole number of the spectrum wave to the ground. Through the bias transistor 412, the bias circuit 40 emits more adaptive bias voltage as the input signal power increases, but there is no shortage of tactile bias for the input. Current < m Figure 5, Figure 5 is a schematic diagram of another bias circuit 50 of the prior art. The partial circuit 5 shown in Fig. 5 is in the U.S. patent No. Mingche, entitled "Equilibrium Control Circuit for Power Amplifier," and the partial circuit 50 includes a pure = circuit view for Bias-power amplifier transistor 5〇1. Wei Wei Road (4) ^ : External bias (four) way 5〇4, partial (four) way 5〇4 series through a control voltage - open J please, and provide additional _ current to power Amplifier transistor training. Secret circuit 50 _ and _ possible merits: "Comparative mode and a south output power mode' but if more power modes are required, more transistors must be added. The power is to provide the control voltage Vc〇m by the mosquito, that is, the extra circuit is required, and decide when to switch the control voltage Vcom. [Invention] An adaptive bias for adaptively secreting (10) The circuit, the adaptive bias circuit comprises - a first transistor, a bias circuit, a U-thoracic, a t-crystal, and a second-age module. The first transistor has a --end, a second % of the vehicle is connected to the i-supply power source, and the third terminal; the bias circuit is connected to the first One end of the electric body 2 and the _Gu, _ supply, _-transistor; ^ coupling module has a first end lightly connected to the third end of the first transistor, and a second end is lightly connected to the The input end of the electronic circuit of the communication line is connected to the third end of the first transistor by a part of the input input signal: 201107924; the second transistor has a first end connected to the first transistor a third end, the second end is coupled to the power supply, and a third end; and the second coupling module has a first end coupled to the third end of the second transistor, and a The second end is coupled to the input end of the electronic circuit. According to the inventive concept, the present invention further provides an adaptive bias circuit for adaptively biasing the communication system, the adaptive bias circuit including a a biasing diode, a Φ biasing circuit, a first coupling module, a second transistor and a second coupling module. The biasing diode has a first end and a second end; The biasing circuit is coupled to the first-supply power supply of the biasing diode to provide a bias voltage to the biasing diode; the first clamping mode Having a second end connected to the biasing diode, and a second end connected to the input end of the electronic circuit of the communication system, combining the portion of the input signal energy to the biasing pole a second end of the body; the second transistor has a first end consuming to the second end of the biasing diode, a second end _ to the supply power source, and a third end; and the first The second module is coupled to the third end of the second transistor, and the second end is coupled to the input end of the electronic circuit. [Embodiment] FIG. 2 2 is a schematic diagram of the first embodiment of the adaptive bias circuit of the present invention. The adaptive bias circuit 2 〇〇 bias factory power rate amplifier transistor Q1 through a choke 2^ 塾vccl ' And outputting an output signal through an output matching circuit 2〇3. Power assured 201107924 =::=::=: The adaptive bias circuit 200 includes a waste transistor (first transistor flow gain transistor (second power) Crystal) Q3, a biasing circuit 2〇7, a first consuming mold 206, and a second light combining module 2〇5. The collector of the bias transistor Q2 is the second supply voltage Vee2, the emitter of the electromagnet Q2 is sent to the base of the current gain transistor Q3, and the collector of the current gain transistor Q3 is connected to a fourth supply. The voltage bias circuit 207 biases the base of the bias transistor Q2. The bias circuit 2〇7 is connected to the third supply voltage Vcc3 and a reference voltage, and the bias circuit 2〇7 may be a current mirror or a herdivider, both of which are widely known. And there are many different changes. For example, the biasing circuit 2〇7 can be realized by connecting a diode-connected transistor in series with a diode and a resistor to establish a bias voltage Vbias. Alternatively, the bias circuit 207 can be implemented by connecting two transistors in the form of a diode in series, or by connecting two transistors in the form of a diode in series and a resistor. The first end of the first coupling module 206 is coupled to the emitter of the bias transistor Q2, and the second end of the first coupling module 206 is coupled to the base of the power amplifier transistor. As shown in FIG. 2, the first coupling module 2〇6 is composed of a capacitor 235 connected in series with a resistor 201107924 237 and coupled to the emitter of the bias transistor Q2. The series order of capacitance and resistance illusion 7 is not limited to Figure 2. In addition, the resistor 237 is optional and may be replaced by a short circuit. In the case of the series resistor 237, the first switching module may include a shunt resistor coupled from the first end of the capacitor 235 to the resistor 237. The second end module or the second side of the capacitor 235 may be coupled to the second end of the capacitor 235 from the first end of the capacitor 235. In addition, a diode circuit, such as a "diode" or an "electrical crystal" in the form of a diode, can also be used in the emitter of the bias transistor Q2 and the power amplifier A||transistor Q1 The base is used as the first coupling module 206. The first end of the second coupling module 205 is coupled to the emitter of the current gain transistor Q3 and the second end of the first surface module 2〇5 is lightly connected to the base of the power amplifier transistor qi. The second coupling module 2〇5 includes a resistor 239. The first end of the resistor 239 is connected to the emitter of the current gain electric gQ3, and the second end of the resistor is connected to the base of the power amplifier transistor Q1. . The second coupling module 205 can further include a shunt capacitor coupled in parallel with the resistor 239, the first end of the shunt capacitor is coupled to the emitter of the current gain transistor Q3, and the second of the shunt capacitor The end is coupled to the base of the power amplifier transistor Q1. Alternatively, the second coupling module 2〇5 can be realized by an inductor, an inductor coupled in series with a resistor, or a short circuit. Referring to Fig. 3, Fig. 3 is a schematic view showing a second embodiment of the adaptive bias circuit 2A. This second embodiment is similar to the first embodiment of Fig. 2, so only the differences between the two embodiments will be explained below. Compared with the first embodiment of FIG. 2, in the first embodiment, the bias transistor Q2 is biased between the bias voltage and the current gain transistor Q3. Substituted by diode D. The biasing diode d曰 may be a transistor in the form of a diode. In the second @第一-implementation_operation, when the power of the input reduction is increased, the bias transistor Q2 receives more power through the first-light coupling module 2〇6, and generates more adaptability tests (adaptive). The eurrem) ship to the base of the current crystal Q3. The current is then amplified by the current gain of the current gain transistor Q3 and fed to the power amplifier transistor Qi through the second consuming module 2〇5. Similarly, in the operation of the second embodiment, when the power of the input signal increases, the bias diode D receives more power through the first coupling module 206, and generates more adaptive current to the current. The base of the gain transistor Q3. The current is then amplified by the current gain of the current gain transistor Q3 and fed to the power amplifier transistor Φ through the second coupling module 205. The above embodiment can also be applied to a low noise amplifier, Low noise amplifler, LNA) or a mixer. The power amplifier transistor q and the current gain transistor Q3 may be metal-semiconductor field-effect transistors (MOSFETs), metal-semiconductor fields (metal-semiconductor fields). -effect transistor (MESFET), bipolar junction transistor (BJT), or heterojunction bipolar transistor (HBT). The capacitor can be metal-insulator-metal capacitor (MIM), metal-oxide-metal capacitor 12 201107924 metal-oxide-metal capacitor (MOM), metal oxide semi-transistor-capacitor (MOSFET- Capacitor, MOS-cap), finger-type capacitor (interdigitaieapacit〇r, IDC) 'or junction capacitor (junctioncapacitor). The diode can be realized by a transistor in the form of a diode. In addition, the first supply power source Vccl, the second supply power source Vcc2, the second supply power source Vcc3, and the fourth supply power source Vcc4 may be independently designed or combined with one or more supply power sources as needed. Compared with the prior art, the adaptive bias circuit 2 in FIGS. 2 and 3, because the bias current of the bias transistor Q2 or the bias diode D can be obtained by the current gain transistor Q3's current gain is amplified, so it produces a bias current that is sensitive as input power increases. Therefore, the bias point of the power amplifier transistor Q1 can be more sensitively moved from the class AB amplifier to the class a amplifier as the input power increases. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should fall within the scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic diagram of a prior art adaptive bias circuit. Figure 2 is a schematic illustration of a first embodiment of an adaptive bias circuit of the present invention. Figure 3 is a schematic illustration of a second embodiment of an adaptive bias circuit of the present invention. Figure 4 is a schematic illustration of a prior art bias circuit. Figure 5 is a schematic illustration of another bias circuit of the prior art. [S 1 13 201107924 [Description of main components] 40, 50, 207, 504 Bias circuit 200 Appropriate bias circuit 202 Input matching circuit 203 Output matching circuit 204 Choke 205 Second coupling module 206 First Fit module 235, 405, C1 capacitor 237 ' 239 resistor 401, 402 diode 406, 404 inductor 502 primary bias circuit D bias diode D1 first bias diode D2 second bias two Pole body R1 first bias resistor Q1, 422, 501 power amplifier transistor Q2 > 412 bias transistor Q3 current gain transistor
Vbias 偏壓電壓 201107924Vbias bias voltage 201107924
Vcc 供應電壓 Vcom 控制電壓 Vccl 第一供應電壓 Vcc2 第二供應電壓 Vcc3 第三供應電壓 Vcc4 第四供應電壓Vcc supply voltage Vcom control voltage Vccl first supply voltage Vcc2 second supply voltage Vcc3 third supply voltage Vcc4 fourth supply voltage