CN100563096C

CN100563096C - Linear bias circuit with adaptability

Info

Publication number: CN100563096C
Application number: CNB200510070804XA
Authority: CN
Inventors: 高启弘; 陈志纬; 林政民; 张云山; 王是琦
Original assignee: Richwave Technology Corp
Current assignee: Richwave Technology Corp
Priority date: 2005-05-17
Filing date: 2005-05-17
Publication date: 2009-11-25
Anticipated expiration: 2025-05-17
Also published as: CN1866730A

Abstract

An adaptive linear bias circuit is used to solve the problem that the conventional linear bias circuit easily causes the DC and AC characteristics of a power amplifier to drift or even deteriorate with temperature changes. The adaptive linear bias circuit includes: a reference voltage source, a first voltage source, a first passive component, a second passive component, a first active component, a second active component and a third active component. The present invention has bias current temperature compensation, gain and phase compensation characteristics to improve the linearity of the conventional power amplifier and reduce DC power consumption. At the same time, the present invention requires very few components and area, and reduces the complexity of the design to improve the yield and reduce the IC layout area to reduce the cost.

Description

The adaptive linear biasing circuit of a kind of tool

Technical field

The adaptive linear biasing circuit of a kind of tool refers to a kind of characteristic that bias current temperature-compensating, gain and phase compensation are provided especially, and has the adaptive bias circuit that improves power amplifier linearity (Linearity).

Background technology

In all kinds of different communication systems, no matter be transmitter or receiver, the linearity all is a basic and important specification.For transmitter, power amplifier then is an important and indispensable assembly, and is about communication distance, communication quality and stand-by time or the like, all inseparable with power amplifier.Generally speaking can provide one to be biased into power amplifier usually; but traditional bias circuit is when input power increases; can make the linearity of power amplifier become very poor; and traditional bias circuit is easily because of variation of temperature, makes the direct current of power amplifier drift about with the AC characteristic generation even the phenomenon of deterioration.

Below be the more known linear biasing circuit that is applied to power amplifier, as United States Patent (USP) 6,744, No. 321,6,333,677 etc.

Be with, as from the foregoing, above-mentioned known linear biasing circuit obviously has inconvenience and exists with disappearance, and can wait to be improved.

Summary of the invention

The technical problem to be solved in the present invention provides the adaptive linear biasing circuit of a kind of tool, comprises a reference voltage source, one first voltage source, one first resistance, one second resistance, one first NPN transistor, one second NPN transistor and one the 3rd NPN transistor.First resistance at first, the one end is electrically connected at the reference voltage source anode, and the other end electrically connects the first NPN transistor collector terminal.First NPN transistor, its collector terminal also is electrically connected at the base terminal of second NPN transistor and the 3rd NPN transistor, and its base terminal is electrically connected at the second NPN transistor emitter-base bandgap grading end, and its emitter-base bandgap grading end is electrically connected at an end of second resistance.Second NPN transistor, its collector terminal are electrically connected at the first voltage source anode.The 3rd NPN transistor, its collector terminal also are electrically connected at the first voltage source anode, and its emitter-base bandgap grading end is electrically connected at a power amplifier, and the 3rd NPN transistor provides one first bias current of power amplifier.The other end of second resistance is electrically connected at an earth terminal, and second resistance provides the bias current temperature-compensating of power amplifier.

Temperature compensation characteristic by the adaptive linear biasing circuit of above-mentioned tool, make the direct current and the AC characteristic of power amplifier, do not produce drift or deterioration along with variations in temperature, and the input power of this power amplifier increases and works in the AB class when amplifying (Class-AB) or category-B and amplifying (Class-B), and the adaptive linear biasing circuit of described tool also can provide the compensation for gain and phase place simultaneously.

Description of drawings

Fig. 1 is the schematic diagram of adaptive linear biasing circuit first embodiment of tool of the present invention.

Fig. 2 is the schematic diagram of adaptive linear biasing circuit second embodiment of tool of the present invention.

Fig. 3 is the functional block diagram of the adaptive linear biasing circuit of tool of the present invention.

Reference voltage source V ₃₀First voltage source V ₃₂

Second voltage source V ₃₄First resistance R ₃₁

Second resistance R ₃₂The first NPN transistor Q ₃₁

The second NPN transistor Q ₃₂The 3rd NPN transistor Q ₃₃

Power amplifier A ₃₁Reference voltage source V ₄₀

First voltage source V ₄₂Second voltage source V ₄₄

First resistance R ₄₁Second resistance R ₄₂

The first metal oxide semiconductcor field effect transistor Q ₄₁

The second metal oxide semiconductcor field effect transistor Q ₄₂

The 3rd metal oxide semiconductcor field effect transistor Q ₄₃

Power amplifier A ₄₁

Reference voltage source 50 first voltage sources 51

Second voltage source, 52 first passive components 53

Second passive component, 54 first driving components 55

Second driving component 56 the 3rd driving component 57

RF core circuit 500

Embodiment

See also shown in Figure 1ly, it is the schematic diagram of adaptive linear biasing circuit first embodiment of tool.By among the figure as can be known, comprise a reference voltage source V ₃₀, one first voltage source V ₃₂, one first resistance R ₃₁, one second resistance R ₃₂, one first NPN transistor Q ₃₁, one second NPN transistor Q ₃₂And one the 3rd NPN transistor Q ₃₃This first resistance R at first ₃₁, the one end is electrically connected at reference voltage source V ₃₀Anode, the other end electrically connect the first NPN transistor Q ₃₁Collector terminal.The first NPN transistor Q ₃₁, its collector terminal also is electrically connected at the second NPN transistor Q ₃₂And the 3rd NPN transistor Q ₃₃Base terminal, its base terminal is electrically connected at the second NPN transistor Q ₃₂The emitter-base bandgap grading end, its emitter-base bandgap grading end is electrically connected at second resistance R ₃₂An end.NPN transistor Q ₃₂, its collector terminal is electrically connected at first voltage source V ₃₂Anode.The 3rd NPN transistor Q ₃₃, its collector terminal also is electrically connected at first voltage source V ₃₂Anode, its emitter-base bandgap grading end is electrically connected at a power amplifier A ₃₁, the 3rd NPN transistor Q ₃₃Power amplifier A is provided ₃₁One first bias current.Second resistance R ₃₂The other end be electrically connected at an earth terminal.

See also shown in Figure 2ly, it is the schematic diagram of adaptive linear biasing circuit second embodiment of tool.By among the figure as can be known, comprise a reference voltage source V ₄₀, one first voltage source V ₄₂, one first resistance R ₄₁, one second resistance R ₄₂, one first metal oxide semiconductcor field effect transistor Q ₄₁, one second metal oxide semiconductcor field effect transistor Q ₄₂And one the 3rd metal oxide semiconductcor field effect transistor Q ₄₃First resistance R at first ₄₁, the one end is electrically connected at reference voltage source V ₄₀Anode, the other end electrically connect the first metal oxide semiconductcor field effect transistor Q ₄₁Drain electrode end.This first metal oxide semiconductcor field effect transistor Q ₄₁, its drain electrode end also is electrically connected at the second metal oxide semiconductcor field effect transistor Q ₄₂And the 3rd metal oxide semiconductcor field effect transistor Q ₄₃Gate terminal, its gate terminal is electrically connected at the second metal oxide semiconductcor field effect transistor Q ₄₂Source terminal, its source terminal is electrically connected at second resistance R ₄₂An end.The second metal oxide semiconductcor field effect transistor Q ₄₂, its drain electrode end is electrically connected at first voltage source V ₄₂Anode.The 3rd metal oxide semiconductcor field effect transistor Q ₄₃, its drain electrode end also is electrically connected at first voltage source V ₄₂Anode, its source terminal are electrically connected at a power amplifier A ₄₁, and the 3rd metal oxide semiconductcor field effect transistor Q ₄₃Power amplifier A is provided ₄₁One first bias current.Second resistance R ₄₂The other end be electrically connected at an earth terminal.

See also shown in Figure 3ly, it is the functional block diagram of the adaptive linear biasing circuit of tool.By among the figure as can be known, comprise one first passive component 53, be to be electrically connected at a reference voltage source 50 anodes; One first driving component 55 is to be electrically connected at this first passive component 53; One second driving component 56 is to be electrically connected at one first voltage source, 51 anodes, this first passive component 53 and this first driving component 55; One the 3rd driving component 57 is to be electrically connected at these first voltage source, 51 anodes, this second driving component 56 and a RF core circuit 500, and one first bias current of this RF core circuit 500 is provided; One second passive component 54 is to be electrically connected at this first driving component 55 and an earth terminal.So that the bias current temperature-compensating of this RF core circuit 500 to be provided, make the direct current and the AC characteristic of this RF core circuit 500 by this second passive component 54, do not produce the problem of drift even deterioration along with variations in temperature.

In sum, the adaptive linear biasing circuit of tool of the present invention has following advantage:

1, the adaptive linear biasing circuit of tool of the present invention is to utilize a bias current to come power amplifier is done temperature-compensating, the interchange of power amplifier and DC characteristic are not varied with temperature and produces drift even deterioration.

2, the adaptive linear biasing circuit of tool of the present invention provides linearization technique, improves the linearity of power amplifier.

3, utilize the adaptive linear biasing circuit of tool of the present invention also can reduce required bias current simultaneously, reduce the consumption of direct current power.

4, the adaptive linear biasing circuit of tool of the present invention can amass bodyization, and has high degree of integration.

5, the adaptive linear biasing circuit framework of tool of the present invention is simple and easy, so the required component number is few, and it is little to reach cloth tool area, reduces cost simultaneously.

All driving components of the present invention are the assembly of bipolarity junction transistor (BJT), heterojunction bipolar transistor (HBT), High Electron Mobility Transistor (HEMT), junction field effect transistor (JFET), metal-semiconductor field effect transistor (MESFET) or metal oxide semiconductcor field effect transistor (MOSFET).All passive components of the present invention are formed by transistor, diode, resistance, inductive impedance assembly or capacitive impedance assembly, and the adaptive linear biasing circuit of tool of the present invention also is used in the close assembly of effect of low noise amplifier or mixer.

Above-mentioned embodiment is used with explanation the present invention, and non-limiting the present invention.

Claims

1. An adaptive linearization bias circuit, characterized in that it comprises:

a first passive component, electrically connected to a positive terminal of a reference voltage source;

a first active component, electrically connected to the first passive component;

a second active component, electrically connected to the positive terminal of a first voltage source, the first passive component and the first active component;

A third active component, electrically connected to the positive terminal of the first voltage source, the second active component and a radio frequency core circuit, to provide a first bias current for the radio frequency core circuit; and

A second passive component electrically connected to the first active component and a grounding terminal;

Wherein, the second passive component provides temperature compensation for the bias current of the radio frequency core circuit, so that the DC and AC characteristics of the radio frequency core circuit do not drift or deteriorate as the temperature changes.

2. The adaptive linearization bias circuit according to claim 1, wherein the first active device, the second active device and the third active device are bipolar junction transistors, heterogeneous Components of junction bipolar transistors, high electron mobility transistors, junction field effect transistors, metal-semiconductor field effect transistors, or metal oxide semiconductor field effect transistors.

3. The adaptive linearization bias circuit as claimed in claim 1, wherein the first passive component and the second passive component are diodes, transistors, resistors, inductive impedances or capacitive impedances.

4. The adaptive linearization bias circuit according to claim 1, wherein the radio frequency core circuit is a power amplifier, a low noise amplifier and/or a mixer.

5. An adaptive linearization bias circuit, characterized in that it comprises:

a first resistor electrically connected to a positive terminal of a reference voltage source;

a first transistor, the collector terminal of which is electrically connected to the first resistor;

A second transistor, the collector terminal of which is electrically connected to the positive terminal of a first voltage source, the base terminal of which is electrically connected to the collector terminal of the first transistor, and the emitter terminal of which is electrically connected to the base terminal of the first transistor;

A third transistor, its collector terminal is electrically connected to the positive terminal of the first voltage source, its base terminal is electrically connected to the second transistor base terminal, its emitter terminal is electrically connected to a power amplifier, and the third transistor provides power a first bias current of the amplifier; and

A second resistor, one end of which is electrically connected to the emitter end of the first transistor, and the other end is electrically connected to a ground end;

Wherein, the second resistor is used to provide bias current temperature compensation of the power amplifier, so that the DC and AC characteristics of the power amplifier will not drift or deteriorate as the temperature changes.

6. The adaptive linearization bias circuit as claimed in claim 5, wherein the first, second and third transistors are NPN transistors or PNP transistors.

7. The adaptive linearization bias circuit as claimed in claim 5, wherein the power amplifier is a low noise amplifier and/or a mixer.

8. An adaptive linearization bias circuit, characterized in that it comprises:

a first field effect transistor, the drain terminal of which is electrically connected to the first resistor;

A second field effect transistor, its drain terminal is electrically connected to a positive terminal of a first voltage source, its gate terminal is electrically connected to the drain terminal of the first field effect transistor, and its source terminal is electrically connected to the first field effect transistor the gate terminal;

A third field effect transistor, its drain terminal is electrically connected to the positive terminal of the first voltage source, its gate terminal is electrically connected to the gate terminal of the second field effect transistor, its source terminal is electrically connected to a power amplifier, and the The third field effect transistor provides a first bias current of the power amplifier; and

a second resistor, one end of which is electrically connected to the source end of the first field effect transistor, and the other end is electrically connected to a ground end;

9. The adaptive linearization bias circuit according to claim 8, wherein the first, second and third field effect transistors are junction field effect transistors, metal-semiconductor field effect transistors, metal oxide semiconductor field effect transistor.

10. The adaptive linearization bias circuit as claimed in claim 8, wherein the power amplifier is a low noise amplifier and/or a mixer.