201015695 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種發光裝置與製造方法，其尤指一種具增加光取出 效率之交流發光裝置及其製造方法。 【先前技術】BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light-emitting device and a method of fabricating the same, and more particularly to an AC light-emitting device having an increased light extraction efficiency and a method of fabricating the same. [Prior Art]
按，光電產業之快速發展’光源之一的發光二極體(Light Emitting Diode ; LED)由於具有省電的焦點，其係已大量廣泛地應用於各種照明或需 光源之領域，且發光二極體於光電領域中佔有舉足輕重的地位，正因如此， 世界各國廠商莫不投入大量資源於相關技術的開發，而於2〇〇5之韓國漢城 半導體與美國III-N Technology的產品發表會更說明了交流式發光二極體 (AC LED)產品之發展趨勢，係成為全球性發光二極體廠商之開發趨勢。 惟’從交流式發光二極體之技術發展至今，主要之技術發展在於改善 交流式發光二極體之電性問題’例如：交流式發光二極體無法於交流電正負 半周訊號輸入時皆可發光（全時發光)之問題，因而發展出一種橋式交流式 發光一極體結構’其主要係利用惠斯登電橋(Wheatstone Bridge)的整流設 計概念，以使發光二極體於交流電正負半周訊號輸入時的每一瞬間僅有總 數1/2的交流式電發光二極體發光之現象得以改善，而能全時發光。 然而，現今交流式發光二極體結構中針對光學特性仍有其發展性，例 如:全反射問題的改善。由於交流式發光二極體之發光層產生光線後，大部 分光線是在交流式發光二極體結構中傳遞，而交流式發光二極體結構中的 光線需經折射的方式才能傳遞至交流式發光二極體結構外，但光線折射之 角度有限，當光線之入射角度超過能折射之角度範圍時，光線會發生全反 射，因而造成部分光線仍然在交流式發光二極體結構中，卻無法傳遞出交 流式發光二極體結構外，如此交流式發光二極體無法發揮原有之發光效能。 此外，交流式發光二極體之發光層照射至基板之光線中，部分光線為 直線前進，因而導致部分光線僅能被基板吸收或基板與發光層之間來回反 201015695 射，光線卻無法往交流式發光二極體之側面傳播，如此基板所吸收之光能 將轉為熱能發散，所以造成交流式發光二極體之發光效能降低並造成過熱。 、，綜合上述，交流式發光二極體之主要設計為光源之使用，如何提高其 發光效率為-主要課題，而交流式發光二極體之使用於人類之家庭式使用 較為廣泛’故解決上述之問題實為一最大之課題。 【發明内容】 一本發明之目的之一，在於本發明提供一種具增加光取出效率之交流發 ❹光^及其製造方法，係—基板具有複數凹槽以使交流發光裝 置之父流發光二極體增加光取出效率。 ，本發明之目的之-’在於本發明提供一種具增加光取出效率之交流發 光裝置及其製造方法，係藉由散射結構，以使交流發光裝置之交 流發光二極體增加光取出效率及電極之接觸面積。 為達上述所指稱之各目的與功效，本發明提供一種交流式覆晶發光 ^極體之結構及其製造方法，係—基板具有複數凹槽且於該複 凹槽之上叹置一第一發光二極體與一第二發光二極體，而第一 發光二極體與第二發光二極體經由一導體電性相接以使第一發 ❹，-㈣與第二發光二極體可完全使用於交流電供電狀態下並 可藉由基板所具有之複數凹槽提高第—發光 極體之光取出效率，因而提高交流發光裝置之發光效：。發先- 【實施方式】 兹為使貴審查委員對本發明之技術特徵及所達成之功效更有進一步 之瞭解與認識’謹纽紐之實施姻及合詳細之說明，說明如後： 為解決f知技術，使基板具有複數⑽，績決發光層騎至基板之 無法完全往發光二極體之側面傳播，降低了其發光效率，本發明係為 201015695 解決上述之問題以使基板可將光線反射至侧面。 首先，請參閱第一圖，其係為本發明之一較佳實施例之結構示意囷； 如圖所示，本發明係為一種具增加光取出效率之交流發光裝置1〇，其包 .含有一基板12、一第一發光二極體14與一第二發光二極體16。該基板12 '係具有複數凹槽I22，本發明之該複數凹槽122更可包含複數光子晶體結 構，該複數凹槽122並進一步具相同間隔距離或不同間隔距離，使發光二 極體内之光__產生變化，鱗高發光效率；該第—發光二極體14與 該第二發光二極體16設置於複數凹槽122上，且該第一發光二極體14與 Q 該第一發光一極體16之間透過一導體18電性相接；該第一發光二極體μ ，該第二發光二極體16為相隔設，所以該第一發光二極體14與該第二發 光二極體16之間具有一分隔空間124,因此導體18為一導線。其中，該第 —發光二極體14之第一電極150經導體18連接該第二發光二極體16之第 二電極Π2’使該第-發光二極體14與該第二發光二極體16可依該交流電 發光。 再者’該第-發光二極體14與該第二發光二極體16係包含一蠢晶堆 積層142、162、- N型半導趙層144、164與-發光層146、166以及一 p 料導體148、168，蟲晶堆積廣142、162係設置於該複數哺122上，該 ©第一發光二極體U與該第二發光二極體16從下而上依序為蟲晶堆積層 142、162、N型半導體層144、164、發光層146、166與p型半導體148、 168 ’且N型半導體潛144、164之上設置-第—電極15〇、17〇, p型半導 體層148、168之上設置-第二電極152、172，其中部分蟲晶堆積層142、 62會位於該複數凹槽122内，且該遙晶堆積層142、162之推雜濃度比該 N型半導體層144、164之摻雜濃度低。 又’本發明藉由基板12之複數凹槽122避免發光層146、166昭射至 基板12之光線直接被基板12所吸收，並可讓光線經基板12反射後往該第 '發光二鋪14與·二發光二鋪16 ,面_，吨高該第一發光 201015695 二極體14與該第二發光二極體16之光取出效率。 4參閱第二圖，其係為本發明之另一較佳實施例之結構示意圖；如圖 所不，本發明之此一實施例與第一圖之實施例不同之處係於此實施例進一 步包含-輯層20 ’係設於絲板12之上，且設置於該第—發光二極體 14與該第一發光二極體16之間的分隔空間I%内，以進一步絕緣該第一發 光一極體14與該第二發光二極體16之間的電性，而避免該第一發光二極 體14與該第二發光二極體16之間發生短路或漏電情況，因此導體π設置 於絕緣層20上，所以此時導體π為一導電層。 〇 請參’三圖，其係為本發明之另-較佳實施例之結構示意圖；如圖 所示’本發明之此一實施例與第二圖之實施例不同之處係於此實施例更於 該第-發光二極體14與該第二發光二極體16之上設置一散射結構154、 Π4 ’且散射結構154、174位於P型半導體層148、168之上，以提高光散 射效果及電極之接觸面積，進而提高發光效能。 請參閱第四A圖，其係為本發明之另一較佳實施例之結構示意圖；如 圓所示’本發明之此-實施例與第二圖之實施例不同之處係於第一發光二 極體14與第二發光二極趙16之p型半導體層148、168上更設置一能量轉 換層22 ’且能量轉換層22覆蓋第-發光二極體14與第二發光二極逋16， 〇 以藉由能量轉換層22提高交流發光裝置10之照度。此外，如四B圖所示， 能量轉換層22上更可設置散射結構222，以提高覆晶式交流發絲置 之光散射效果，進而提高發光效能。 請參閱第五A ®至第五D圓，其係為本發明之另—較佳實施例之電路 圓，如第五A圖所不，本發明之此一實施例係交流發光裝置1〇更包含一橋 式整流電路30，其耦接該第-發光二極體14與該第二發光二極體16，該 橋式整流電路30包含複數半導體遙晶層4〇(如第六人圖至第六㈣所示或 如第七A圖至第七C圖所示）。如第五β圖所示，該交紐光裝置1〇至少 包含-個以上之並聯電路，該並聯電路亦即並聯第五Α圖所示之橋式整流 201015695 電路30以及其所祕之該第一發光二極體14與該第二發光二極體μ如 第五c圖所示，該交流發光裝置1G至少包含—個以上;= 電=第五A圖所示之橋式整流電路3〇以及其所二= I 該第二發光二極體16。如第五D圖所示，該交流發光裝置1〇 至乂匕含-個以上之串並聯電路，該串並聯電路亦即串並 30以及其所耦接之該第—發光二極體14 _二=According to the rapid development of the optoelectronic industry, Light Emitting Diode (LED), one of the light sources, has been widely used in various fields of illumination or light source due to its power-saving focus. It plays a pivotal role in the field of optoelectronics. For this reason, manufacturers from all over the world don't invest a lot of resources in the development of related technologies, and the product presentations of Seoul Semiconductor and American III-N Technology in Korea are further explained. The development trend of AC light-emitting diode (AC LED) products has become the development trend of global light-emitting diode manufacturers. However, from the development of the technology of AC-type LEDs, the main technical development is to improve the electrical problems of AC-type LEDs. For example, AC-type LEDs can not be illuminated when AC positive and negative half-cycle signals are input. The problem of (full-time illumination) has led to the development of a bridge-type AC-emitting one-pole structure, which mainly uses the rectification design concept of the Wheatstone Bridge to make the LEDs positive and negative for half a week. At the instant of signal input, only a total of 1/2 of the AC-emitting diodes are illuminated, and full-time illumination is possible. However, in today's AC light-emitting diode structures, there are still developments for optical properties, such as the improvement of the total reflection problem. Since the light emitting layer of the alternating current light emitting diode generates light, most of the light is transmitted in the alternating current light emitting diode structure, and the light in the alternating current light emitting diode structure needs to be refracted to be transmitted to the alternating current type. Outside the structure of the light-emitting diode, but the angle of light refraction is limited. When the incident angle of the light exceeds the range of the angle of refraction, the light will be totally reflected, so that some of the light is still in the structure of the AC light-emitting diode, but it cannot In addition to the AC-type LED structure, the AC-type LED can not achieve the original luminous performance. In addition, the light-emitting layer of the alternating-current light-emitting diode is irradiated to the light of the substrate, and part of the light is linearly advanced, so that part of the light can only be absorbed by the substrate or the substrate and the light-emitting layer are reversed, and the light cannot be exchanged. The side of the light-emitting diode propagates, so that the light energy absorbed by the substrate will be diverted into heat energy, so that the luminous efficacy of the AC light-emitting diode is lowered and overheating is caused. In view of the above, the main design of the AC type light-emitting diode is the use of a light source, how to improve its luminous efficiency is the main subject, and the use of the AC type light-emitting diode is widely used in human households. The problem is really the biggest issue. SUMMARY OF THE INVENTION One object of the present invention is to provide an AC hair ray having an increased light extraction efficiency and a method of manufacturing the same, wherein the substrate has a plurality of grooves to enable the parent flow of the AC illuminator to emit light. The polar body increases the light extraction efficiency. The object of the present invention is to provide an AC light-emitting device with improved light extraction efficiency and a method for fabricating the same, which is characterized in that the AC light-emitting diode of the AC light-emitting device is increased in light extraction efficiency and electrodes by a scattering structure. Contact area. In order to achieve the above-mentioned various purposes and effects, the present invention provides a structure of an alternating current flip-chip light-emitting body and a manufacturing method thereof, wherein the substrate has a plurality of grooves and a first one is placed on the complex groove a light emitting diode and a second light emitting diode, wherein the first light emitting diode and the second light emitting diode are electrically connected via a conductor to make the first hairpin, the (four) and the second light emitting diode It can be fully used in the AC power supply state and can improve the light extraction efficiency of the first light-emitting body by the plurality of grooves of the substrate, thereby improving the luminous efficacy of the AC light-emitting device: First - [Embodiment] In order to make your reviewer's technical characteristics and the effects achieved by the reviewer have a better understanding and understanding of the implementation of the "Grand New Year's marriage and the detailed description, as explained: Knowing the technology, the substrate has a plurality (10), and the performance of the light-emitting layer riding on the substrate cannot completely propagate toward the side of the light-emitting diode, thereby reducing the luminous efficiency thereof. The present invention is 201015695 to solve the above problem so that the substrate can reflect the light. To the side. First, please refer to the first figure, which is a schematic diagram of a structure of a preferred embodiment of the present invention. As shown in the figure, the present invention is an AC illuminating device 1 增加 with a light extraction efficiency, which includes A substrate 12, a first LED 14 and a second LED 16 are provided. The substrate 12 ′ has a plurality of recesses I22 , and the plurality of recesses 122 of the present invention may further comprise a plurality of photonic crystal structures, and the plurality of recesses 122 further have the same separation distance or different separation distances, so that the light-emitting diodes are The light-emitting diode 14 and the second light-emitting diode 16 are disposed on the plurality of grooves 122, and the first light-emitting diodes 14 and Q are first. The light-emitting diodes 16 are electrically connected to each other through a conductor 18; the first light-emitting diodes 51 and the second light-emitting diodes 16 are spaced apart, so the first light-emitting diodes 14 and the second The light-emitting diodes 16 have a separation space 124 therebetween, and thus the conductor 18 is a wire. The first electrode 150 of the first light-emitting diode 14 is connected to the second electrode Π 2 ′ of the second light-emitting diode 16 via the conductor 18 to make the first light-emitting diode 14 and the second light-emitting diode 16 can be illuminated according to the alternating current. Furthermore, the first light-emitting diode 14 and the second light-emitting diode 16 comprise a stray layer 142, 162, an N-type semiconductor layer 144, 164 and a light-emitting layer 146, 166 and a The p-material conductors 148 and 168 are arranged on the plurality of cells 122, and the first light-emitting diodes U and the second light-emitting diodes 16 are sequentially inferior to the crystals. Stacking layers 142, 162, N-type semiconductor layers 144, 164, light-emitting layers 146, 166 and p-type semiconductors 148, 168' and N-type semiconductor potentials 144, 164 are provided - first electrodes 15 〇, 17 〇, p-type A second electrode 152, 172 is disposed over the semiconductor layers 148, 168, wherein a portion of the eutectic layer 142, 62 is located within the plurality of recesses 122, and the dopant concentration of the lenticular layers 142, 162 is greater than the N The doping concentrations of the semiconductor layers 144, 164 are low. In the present invention, the light rays 146, 166 are prevented from being absorbed by the substrate 12 by the plurality of grooves 122 of the substrate 12, and the light is directly absorbed by the substrate 12, and the light is reflected by the substrate 12 to the first light-emitting layer 14 The light extraction efficiency of the first light emitting 201015695 diode 14 and the second light emitting diode 16 is the same as that of the second light emitting diode. 4 is a schematic structural view of another preferred embodiment of the present invention; as shown in the figure, the embodiment of the present invention is different from the embodiment of the first embodiment. The inclusion layer 20 is disposed on the wire board 12 and disposed in the partition space I% between the first light emitting diode 14 and the first light emitting diode 16 to further insulate the first The electrical property between the light-emitting diode 14 and the second light-emitting diode 16 avoids short-circuit or leakage between the first light-emitting diode 14 and the second light-emitting diode 16 , so the conductor π It is disposed on the insulating layer 20, so the conductor π is a conductive layer at this time. 3 is a schematic structural view of another preferred embodiment of the present invention; as shown in the figure, the embodiment of the present invention differs from the embodiment of the second embodiment in this embodiment. A scattering structure 154, Π4' is disposed on the second LED 14 and the second LED 16 and the scattering structures 154, 174 are disposed on the P-type semiconductor layers 148, 168 to enhance light scattering. The effect and the contact area of the electrodes, thereby improving the luminous efficacy. Please refer to FIG. 4A, which is a schematic structural view of another preferred embodiment of the present invention; as shown by the circle, the embodiment of the present invention differs from the embodiment of the second figure in the first illumination. An energy conversion layer 22 ′ is further disposed on the p-type semiconductor layers 148 and 168 of the diodes 14 and the second light-emitting diodes 16 , and the energy conversion layer 22 covers the first-emitting diodes 14 and the second light-emitting diodes 16 . The illuminance of the alternating current illuminating device 10 is increased by the energy conversion layer 22. In addition, as shown in FIG. 4B, the energy conversion layer 22 may further be provided with a scattering structure 222 to improve the light scattering effect of the flip-chip AC hairline, thereby improving the luminous efficiency. Please refer to the fifth A ® to the fifth D circle, which is a circuit circle of another preferred embodiment of the present invention. As shown in FIG. 5A, this embodiment of the present invention is an alternating current illumination device. A bridge rectifier circuit 30 is coupled to the first light emitting diode 14 and the second light emitting diode 16 . The bridge rectifier circuit 30 includes a plurality of semiconductor crystal layers 4 (eg, sixth figure to Shown in six (four) or as shown in Figures 7A through 7C). As shown in the fifth β diagram, the optical device 1〇 includes at least one or more parallel circuits, that is, the bridge rectifier 201015695 circuit 30 shown in the fifth diagram in parallel, and the secret of the circuit The light-emitting diode 14 and the second light-emitting diode μ are as shown in FIG. 5C, and the AC light-emitting device 1G includes at least one or more;=Electric=bridge rectifier circuit 3 shown in FIG. And the second light-emitting diode 16 of the second and the second. As shown in FIG. 5D, the AC lighting device 1 to 乂匕 includes more than one series-parallel circuit, that is, the series-parallel circuit 30 and the first-light-emitting diode 14 _ Two =
請參閱第六A圖至第六C圖，其為本發明之半導體蟲晶層之一實施例 之結構示意@ ;如第六A圖_，若職數半導般晶㈣為複數第三發 光二極體，則分別由下而上包含一蟲晶堆積層42、一 N型半導體層44與一 發光層46以及- P型半導體48，其中N型半導體層44上設置一第一電極 P型半導體層48上設置一第二電極482，如第六B圖所示，若該複數 半導體遙晶層4G為複數二極體，齡別由下社包含堆積層犯、一 N型半導體層44與_ P型半導體48 ’其中N型半導艘層44上設置一第一 電極442 ’ P型半導體層48上設置一第二電極做，如第六c圖所示，若該 複數半導體Μ層4G為複數二極體，齡動下而上包含—蠢晶堆積層犯 以及一 Ν型半導體層44，其中蟲晶堆積層42上設置一第二電極422，Ν型 半導體層44上设置-第-電極442。此外，本發明更可設置一能量轉換層 62於ρ型半導體層48上，如第六d圖所示。 請參閱第至第七(：®’其係為本發明之半導縣晶層之另一較佳 實施例之結構7F意圖；如第七A圖所示，本發明之此—實施例與第六a圏 之實施例不同之處係於該複數第三發光二極艘之上設置一散射結構6〇，且 散射結構60位於P型半導體層48或N型半導體層44之上，以提高光散射 效果及電極之接觸面積，進而提高發光效能；如第七B圖所示，本發明 之此一實施例與第六β圖之實施例不同之處係於該複數二極體之上設置一 散射結構60,且散射結構60位於Ρ型半導體層48或Ν型半導體層44之上； 如第七C圖所示，本發明之此一實施例與第六c圖之實施例不同之處係於 201015695 該複數二極體之上設置一散射結構6〇，且散射結構6〇位於N型半導體層 44或磊晶堆積層42之上《此外，本發明更可設置一能量轉換層62κρ型 半導體層48上，如第七D圖所示。 请參閱第人Α圖至第人C @ ’其係為本發明之—較佳實施例之製造流 -程圖；如圖所示，並同時參閱第一圖，本發明之交流發光裝置之製造方 法’其係步驟係包含提供一基板12,並蝕刻複數凹槽122 :分別形成一 第一發光二極體14與一第二發光二極體16於該複數凹槽122上；設置一 導體18於第-發光二極體14與第二發光二極體16之間並讓導體18耗 ^ 接第一發光二極體14與第二發光二極體16。 請參閱第九A @至第九D圖’錢為本發明之另_較佳實施例之製造 流程圖；如圖所示’並同時參閱第二圖，本發明之此—實施例與第七a圖 至第七c圖之實施例*同之處係於設置一導體18於第一發光二極體14與 第二發光二極體16之間，並讓該導體18耦接第一發光二極體14與第二發 光一極體16之步驟别，更進一步包含一步驟，其為形成一絕緣層於第 -發光二極體U鄉二發光二極體16之間，且㈣層2Q位於第—發光二 極體14與第二發光二極體Μ之間的分隔空間124内。 _請參閱第十圖’其係為本發明之另—較佳實施例之結構示意圖；如圖 ©所示’本發明得為一種具增加光取出效率之覆晶式交流發光裝置5〇，其 包含有-承接基板52、-第—發光二極體54與—第二發光二極體％。該 承接基板52係具有複數凹槽522以及一第一導電層13〇、一第二導電層132 與-第三導電層134，本發明之該複數凹槽奶更可包含複數光子晶體結 構，該複數凹槽522並進-步具相同間隔距離或不同間隔距離，使發光二 極體内之光傳播路;U產生變化，以提高發光效率且第一導電層⑽、第二 導電層132與第三導電層134為分隔設置；該第一發光二極體％與該第二 發光二極體56設置於複數凹槽诹上；該第一發光二極體54與該第二發 光二極體56包含-第-電極55〇、第三電極57〇與一第二電極舰、第四 201015695 電極572 ’該第一發光二極體54之第二電極552透過一第一凸塊510連接 該第一導電層130，該第一發光二極體54之第一電極55〇與該第二發光二 極體56之第四電極572透過一第二凸塊512連接該第二導電層132，並透 •過該第二凸塊512電性連接該第一發光二極體54與該第二發光二極體56, 該第二電極570透過一第三凸塊514連接該第三導電層。由於該第一發 光二極體54與該第二發光二極體56為相隔設，所以該第一發光二極體54 與該第二發光二極體56之間具有一分隔空間58，以分隔該第一發光二極體 54與該第二發光二極體56之間的電性，而避免該第一發光二極體54與該 第二發光二極體56之間發生短路或漏電情況。其中，該第一發光二極體54 © 與該第二發光二極體56經第一導電層13〇、一第二導電層132與一第三導 電層134而電性相接並耦接一交流電源（圖未示），使該第一發光二極體54 與該第二發光二極體56可依該交流電發光。 再者’該第一發光二極體54與該第二發光二極體56係包含一磊晶堆 積層542、562、一 N型半導體層544、564與一發光層546、566以及一 P 型半導體548、568 ’該第一發光二極體54與該第二發光二極體56從上而 下依序為磊晶堆積層542、562、N型半導體層544、564、發光層546、566 與P型半導體548、568 ’且第一電極550、570連接N型半導體層544、564， Q 第二電極552、5了2連接P型半導體548、568，且該磊晶堆積層542、562 之換雜濃度比該N型半導體層544、564之摻雜濃度低。 又’本發明藉由承接基板52之複數凹槽522避免發光層546、566照 射至承接基板52之光線直接被承接基板52所吸收，並可讓光線經承接基 板52反射後往該第一發光二極體54與該第二發光二極體56之側面傳播， 以提高該第一發光二極體54與該第二發光二極體56之光取出效率。 請參閱第十一圖，其係為本發明之另一較佳實施例之結構示意圖；如 圖所示’本發明之此一實施例與第十圖之實施例不同之處係於進一步包含 一絕緣層20 ’係設置於該第一發光二極體54與該第二發光二極體56之間 201015695 的分隔空間58内，以進-步絕緣該第一發光二極體54與該第二發光二極 體56之間的電性’而避免該第一發光二極體54與該第二發光二極體56之 間發生短路或漏電情況。 請參閱第十二圖’其係為本發明之另一較佳實施例之結構示意圊；如圖 所不’本發明之此一實施例與第十一圖之實施例不同之處係於進一步包含 -散射結構54G、560位於該第—發光二極體54之p型半導體548與第二 發光-極體56之P型半導體568上，以提高該第一發光二極趙54與該第 二發光二極髏56之光取出效率。 ❹ 标閱第十三® ’其係為本發明之另-較佳實施例之結構示意圖；如 圖所示，本發明之此-實施例與第十二圖之實施例不同之處係於該第一發 光一極體54與該第二發光二極體56之上更設置一透明基板554、574，且 透明基板554、574位於磊晶堆積層542、562之上，其中透明基板554、574 更设置-散射結構556、576 ’以提高覆晶式交流發光裝置5〇之光散射效 果’進而提高發光效能。 請參閱第十四囷’其係為本發明之另一較佳實施例之結構示意圖；如圖 所不’本發明之此-實施例與第十三圖之實施例不同之處係於承接基板52 之上更設置一介電層524，以進一步絕緣該第-發光二極體54與該第二發 〇 光二極體56之間的電性，而避免該第一發光二極體54與該第二發光二極 體56之間發生短路或漏電情況。 請參閱第十五囷’其係為本發明之另一較佳實施例之結構示意圖；如圖 所不，本發明之此-實施例與第十四圖之實施例不同之處係於承接基板52 之上更没置一反射層526’並位於該承接基板52與第一發光二極體54與該 第二發光二極體56之間，以避免發光層546、566照射至承接基板52之光 線直接被承接基板52所吸收，並可讓光線經承接基板52反射後往該第一 發光二極體54與該第二發光二極體56之正面及側面傳播，以提高該第-發光二極體54與該第二發光二極體56之光取出效率。 12 201015695 凊參閱第十六A圖，其係為本發明之另一較佳實施例之結構示意圖；如 圖所示，本發明之此一實施例與第十五圖之實施例不同之處係於第一發光 一極體54與第二發光二極體56之透明基板554、574上更設置一能量轉換 .層64，且能量轉換層64覆蓋第一發光二極體54與第二發光二極體56，以 藉由能量轉換層64提高覆晶式交流發光裝置5〇之照度。此外，如十六B 圖所示，能量轉換層64上更可設置散射結構642，以提高覆晶式交流發光 裝置50之光散射效果，進而提高發光效能。此外，如第十七A圖所示覆 晶式交流發光裝置50更包含一橋式整流電路3〇，其耦接該第一發光二 極體54與該第二發光二極體56，該橋式整流電路3〇包含複數半導體磊晶 〇 層4〇 ;如第十七B圖所示，該覆晶式交流發光裝置5〇至少包含一個以上 之並聯電路，該並聯電路亦即並聯第十七A圖所示之橋式整流電路3〇以及 其所耦接之該第一發光二極體54與該第二發光二極體56〇如第十七C圖所 不，該覆晶式交流發光裝置50至少包含一個以上之串聯電路，該串聯電 路亦即串聯第十七A圖所示之橋式整流電路3〇以及其所耦接之該第一發光 二極髏54與該第二發光二極體56。如第十七D圖所示，該覆晶式交流發 光裝置50至少包含一個以上之串並聯電路，該串並聯電路亦即串並聯第十 七A圖所示之橋式整流電路30以及其所耦接之該第一發光二極體54與該 第二發光二極體56。 ❹ 如第十八A圖所示’當該複數半導體磊晶層40為複數第三發光二極 體’每一該半導體磊晶層40設置於承接基板52之複數凹槽522上，且每 一該半導體蟲晶層40分別由下而上包含一蟲晶堆積層42、一 N型半導體層 44與一發光層46以及一 P型半導體48，其中N型半導體層44上設置一第 一電極442, P型半導體層48上設置一第二電極482;如第十八B圖所示， 當該複數半導體蠢晶層40為複數二極體時，每一該半導體蟲晶層4〇設置 於承接基板52之複數凹槽522上，且每一該半導體蟲晶層4〇分別由下而 上包含一磊晶堆積層42、一 N型半導體層44與一 P型半導體48 ,其中N 型半導體層44上設置一第一電極442, P型半導體層48上設置一第二電極 13 201015695 482 ’如第十八c圖所示，當該複數半導體磊晶層40為複數二極艎時，每 一該半導體磊晶層4〇設置於承接基板52之複數凹槽522上，且每一該半 導體磊晶層40分別由下而上包含一磊晶堆積層42以及一 N型半導體層44， 其中磊晶堆積層42上設置一第二電極422，N型半導體層44上設置一第一 電極442。此外’本發明更可設置一能量轉換層62於該半導體磊晶層4〇上， 如第十八D圖所示。Please refer to FIG. 6A to FIG. 6C, which are schematic structural diagrams of an embodiment of the semiconductor crystal layer of the present invention; as shown in FIG. 6A, if the job is semi-conducting, the crystal (four) is a complex third illumination. The diode body includes a crystallite deposition layer 42, an N-type semiconductor layer 44, a light-emitting layer 46, and a P-type semiconductor 48, respectively, from bottom to top, wherein a first electrode P-type is disposed on the N-type semiconductor layer 44. A second electrode 482 is disposed on the semiconductor layer 48. As shown in FIG. 6B, if the plurality of semiconductor crystal layer 4G is a plurality of diodes, the age layer comprises a stack layer and an N-type semiconductor layer 44. And a P-type semiconductor 48' wherein the N-type semi-conductor layer 44 is provided with a first electrode 442'. The P-type semiconductor layer 48 is provided with a second electrode, as shown in the sixth c-picture, if the complex semiconductor layer 4G is a plurality of diodes, and the upper layer includes a stupid layer and a semiconductor layer 44, wherein a second electrode 422 is disposed on the crystal layer 42 and the germanium semiconductor layer 44 is disposed thereon - First electrode 442. Furthermore, the present invention can further provide an energy conversion layer 62 on the p-type semiconductor layer 48 as shown in the sixth d. Please refer to the seventh to seventh (:®'s structure 7F which is another preferred embodiment of the semi-conducting layer of the present invention; as shown in FIG. 7A, the present invention - the embodiment and the The embodiment of the sixth embodiment differs in that a scattering structure 6 is disposed on the plurality of third light-emitting diodes, and the scattering structure 60 is disposed on the P-type semiconductor layer 48 or the N-type semiconductor layer 44 to enhance light. The scattering effect and the contact area of the electrode, thereby improving the luminous efficacy; as shown in FIG. 7B, the embodiment of the present invention differs from the embodiment of the sixth β-picture in that the plurality of diodes are disposed a scattering structure 60, and the scattering structure 60 is located on the germanium semiconductor layer 48 or the germanium semiconductor layer 44; as shown in the seventh C, the embodiment of the present invention is different from the embodiment of the sixth c diagram A scattering structure 6〇 is disposed on the plurality of diodes, and the scattering structure 6〇 is disposed on the N-type semiconductor layer 44 or the epitaxial deposition layer 42. Further, the present invention can further provide an energy conversion layer 62κρ. On the type semiconductor layer 48, as shown in the seventh D. Please refer to the first person to the first person C @ It is a manufacturing flow diagram of the preferred embodiment of the present invention; as shown in the drawings, and referring to the first drawing, the method of manufacturing the alternating current lighting device of the present invention comprises the steps of providing a substrate 12, And etching a plurality of recesses 122: respectively forming a first light emitting diode 14 and a second light emitting diode 16 on the plurality of recesses 122; and providing a conductor 18 on the first light emitting diode 14 and the second light emitting The first light-emitting diodes 14 and the second light-emitting diodes 16 are connected between the diodes 16 and the conductors 18. Please refer to the ninth A@ to the ninth D-pictures. The manufacturing flow chart of the embodiment; as shown in the drawing 'and referring to the second figure at the same time, the embodiment of the present invention is the same as the embodiment of the seventh to seventh c-pictures. The step of coupling the first light-emitting diode 14 and the second light-emitting diode 16 to the first light-emitting diode 14 and the second light-emitting diode 16 further includes a step. The insulating layer is formed between the first and second light emitting diodes of the first and second light emitting diodes, and the (4) layer 2Q is located at the first light emitting diode 14 . The second light-emitting diode is disposed in the space 124 between the second light-emitting diodes. _Please refer to the tenth figure, which is a schematic structural view of another preferred embodiment of the present invention; as shown in FIG. A flip-chip AC illuminating device 5A for increasing light extraction efficiency includes a receiving substrate 52, a first light emitting diode 54 and a second light emitting diode %. The receiving substrate 52 has a plurality of grooves 522. And a first conductive layer 13〇, a second conductive layer 132 and a third conductive layer 134. The plurality of grooved milks of the present invention may further comprise a plurality of photonic crystal structures, and the plurality of grooves 522 are stepped in the same interval. a distance or a different distance, so that the light propagation path in the light-emitting diode; U changes to improve the luminous efficiency and the first conductive layer (10), the second conductive layer 132 and the third conductive layer 134 are separated; the first The light emitting diode % and the second light emitting diode 56 are disposed on the plurality of recesses ;; the first light emitting diode 54 and the second light emitting diode 56 include a first electrode 55 〇 and a third electrode 57〇 with a second electrode ship, fourth 201015695 electrode 572 'the first The second electrode 552 of the photodiode 54 is connected to the first conductive layer 130 through a first bump 510, and the first electrode 55 〇 of the first illuminating diode 54 and the fourth illuminating diode 56 The electrode 572 is connected to the second conductive layer 132 through a second bump 512, and is electrically connected to the first light emitting diode 54 and the second light emitting diode 56 through the second bump 512. The second electrode 570 is connected to the third conductive layer through a third bump 514. Since the first LED body 54 and the second LED body 56 are spaced apart from each other, the first LED body 54 and the second LED body 56 have a separation space 58 therebetween to separate The electrical property between the first LED and the second LED 56 prevents short circuit or leakage between the first LED 54 and the second LED 56. The first light-emitting diode 54 and the second light-emitting diode 56 are electrically connected to each other via a first conductive layer 13 , a second conductive layer 132 , and a third conductive layer 134 . An AC power source (not shown) allows the first LEDs 54 and the second LEDs to emit light according to the AC. Furthermore, the first light-emitting diode 54 and the second light-emitting diode 56 comprise an epitaxial layer 542, 562, an N-type semiconductor layer 544, 564 and a light-emitting layer 546, 566 and a P-type. The first light-emitting diodes 54 and the second light-emitting diodes 56 are sequentially epitaxially stacked layers 542 and 562, N-type semiconductor layers 544 and 564, and light-emitting layers 546 and 566. The P-type semiconductors 548, 568' and the first electrodes 550, 570 are connected to the N-type semiconductor layers 544, 564, the Q second electrodes 552, 5 are connected to the P-type semiconductors 548, 568, and the epitaxial stacked layers 542, 562 The dopant concentration is lower than the doping concentration of the N-type semiconductor layers 544 and 564. In the present invention, the light that is irradiated to the receiving substrate 52 by the light-emitting layers 546 and 566 is prevented from being directly absorbed by the receiving substrate 52, and the light is reflected by the receiving substrate 52 to the first light. The diodes 54 and the sides of the second LEDs 56 are propagated to improve the light extraction efficiency of the first LEDs 54 and the second LEDs 56. Please refer to FIG. 11 , which is a schematic structural view of another preferred embodiment of the present invention; as shown in the figure, the embodiment of the present invention differs from the embodiment of the tenth embodiment in further including a The insulating layer 20 ′ is disposed in the partition space 58 of the first light emitting diode 54 and the second light emitting diode 56 201015695 to insulate the first light emitting diode 54 and the second. The electrical connection between the LEDs 56 avoids a short circuit or leakage between the first LEDs 54 and the second LEDs 56. Referring to the twelfth figure, which is a structural schematic diagram of another preferred embodiment of the present invention; the difference between this embodiment of the present invention and the embodiment of the eleventh embodiment is further The inclusion-scattering structures 54G, 560 are located on the p-type semiconductor 548 of the first light-emitting diode 54 and the P-type semiconductor 568 of the second light-emitting body 56 to enhance the first light-emitting diode 52 and the second The light extraction efficiency of the light-emitting diode 56. ❹ 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 A transparent substrate 554, 574 is disposed on the first light-emitting body 54 and the second light-emitting diode 56, and the transparent substrate 554, 574 is located on the epitaxial deposition layers 542, 562, wherein the transparent substrate 554, 574 Further, the scattering structures 556, 576' are provided to improve the light scattering effect of the flip-chip AC illuminating device 5, thereby improving the luminous efficiency. Please refer to the fourteenth aspect, which is a schematic structural view of another preferred embodiment of the present invention; the difference between the embodiment of the present invention and the embodiment of the thirteenth embodiment is based on the receiving substrate. A dielectric layer 524 is further disposed on the upper surface of the second light emitting diode 54 to prevent the first light emitting diode 54 from being electrically insulated from the second light emitting diode 54. A short circuit or a leakage current occurs between the second light emitting diodes 56. 15 is a schematic structural view of another preferred embodiment of the present invention; as shown in the drawings, the difference between the embodiment of the present invention and the embodiment of the fourteenth embodiment is based on the receiving substrate. A reflective layer 526 ′ is not disposed on the substrate 52 and is disposed between the receiving substrate 52 and the first LED body 54 and the second LED body 56 to prevent the luminescent layer 546 , 566 from being irradiated to the receiving substrate 52 . The light is directly absorbed by the receiving substrate 52, and the light is reflected by the receiving substrate 52 and propagates to the front side and the side of the first light emitting diode 54 and the second light emitting diode 56 to improve the first light emitting The light extraction efficiency of the polar body 54 and the second light emitting diode 56. 12 201015695 Referring to FIG. 16A, which is a schematic structural view of another preferred embodiment of the present invention; as shown, the embodiment of the present invention differs from the embodiment of the fifteenth embodiment. An energy conversion layer 64 is further disposed on the transparent substrate 554, 574 of the first light-emitting body 54 and the second light-emitting diode 56, and the energy conversion layer 64 covers the first light-emitting diode 54 and the second light-emitting diode The polar body 56 is configured to increase the illuminance of the flip-chip type AC illuminating device 5 by the energy conversion layer 64. In addition, as shown in FIG. 16B, the energy conversion layer 64 may further be provided with a scattering structure 642 to improve the light scattering effect of the flip-chip AC illuminating device 50, thereby improving luminous efficiency. In addition, the flip-chip AC illuminating device 50 further includes a bridge rectifier circuit 3 〇 coupled to the first illuminating diode 54 and the second illuminating diode 56. The rectifier circuit 3A includes a plurality of semiconductor epitaxial layers 4〇; as shown in FIG. 17B, the flip-chip AC illuminator 5A includes at least one parallel circuit, and the parallel circuit is also connected in parallel. The bridge rectifier circuit 3A shown in the figure and the first LED body 54 and the second LED body 56 coupled thereto are as shown in FIG. 17C. The flip chip type AC illumination device is not shown. 50 includes at least one series circuit, that is, the bridge rectifier circuit 3 shown in series 17A and the first LED 2 and the second LED Body 56. As shown in FIG. 17D, the flip-chip AC illuminating device 50 includes at least one series-parallel circuit, that is, the series-parallel circuit 30 and the bridge rectifier circuit 30 shown in FIG. The first LED body 54 and the second LED body 56 are coupled. As shown in FIG. 18A, when the plurality of semiconductor epitaxial layers 40 are a plurality of third light emitting diodes, each of the semiconductor epitaxial layers 40 is disposed on the plurality of recesses 522 of the receiving substrate 52, and each The semiconductor crystal layer 40 includes a crystallite layer 42 , an N-type semiconductor layer 44 , a light-emitting layer 46 and a P-type semiconductor 48 from bottom to top, wherein a first electrode 442 is disposed on the N-type semiconductor layer 44 . a second electrode 482 is disposed on the P-type semiconductor layer 48. As shown in FIG. 18B, when the plurality of semiconductor doped layers 40 are complex diodes, each of the semiconductor germanium layers 4 is disposed on A plurality of recesses 522 of the substrate 52 are received, and each of the semiconductor germanium layers 4b includes an epitaxial buildup layer 42, an N-type semiconductor layer 44 and a P-type semiconductor 48, respectively, from bottom to top, wherein the N-type semiconductor A first electrode 442 is disposed on the layer 44, and a second electrode 13 is disposed on the P-type semiconductor layer 48. As shown in FIG. 18c, when the plurality of semiconductor epitaxial layers 40 are complex diodes, Each of the semiconductor epitaxial layers 4 is disposed on the plurality of recesses 522 of the receiving substrate 52, and each of the half The conductor epitaxial layer 40 includes an epitaxial layer 42 and an N-type semiconductor layer 44 from bottom to top, wherein a second electrode 422 is disposed on the epitaxial layer 42 and a first electrode is disposed on the N-type semiconductor layer 44. 442. Further, the present invention can further provide an energy conversion layer 62 on the semiconductor epitaxial layer 4, as shown in Fig. 18D.
如第十九A圖所示，本發明之此一實施例與第十八a圖之實施例不同 之處更設置-散射結構於p型半導體層48或N型半導體| 44之上，以 提馬光散射效果及電極之接觸面積’進而提高發光效能；如第十九B圖 所不’本發明之此—實施例與第十八B @之實補不同之處炫置一散射 結構60於P型半導體層48或N型半導體層44之上；如第十九C圓所示， 本發明之此-實施例與第十八(；圖之實補不同之處更設置—散射結構6〇 於N型半導體層44或蠢晶堆積層42之上。此外，本發明更可設置一能量 轉換層62於該半導體遙晶層4G±，如第十九㈣所示。 請_$=十A @至第二十E圖’其係為本發明之另一較佳實施例之 製造流程圖；如®所示’並同時相第十@，本發明之覆晶式交流發光As shown in FIG. 19A, this embodiment of the present invention differs from the embodiment of FIG. 18a in that a scattering structure is disposed on the p-type semiconductor layer 48 or the N-type semiconductor | 44 to The light scattering effect of the horse and the contact area of the electrode further improve the luminous efficiency; as in the nineteenth Bth diagram, the embodiment of the present invention differs from the eighteenth B @ by a scattering structure 60. Above the P-type semiconductor layer 48 or the N-type semiconductor layer 44; as shown in the nineteenth C-circle, the embodiment of the present invention is different from the eighteenth (the difference between the figures is set--scattering structure 6〇 In addition, the present invention can further provide an energy conversion layer 62 on the semiconductor crystal layer 4G±, as shown in the nineteenth (four). Please _$= ten A @至二十十E图' is a manufacturing flow diagram of another preferred embodiment of the present invention; as shown in the ® and simultaneously tenth, the flip-chip alternating current illumination of the present invention
裝置之製造方法’其係步驟係包含提供-承接基板52，並_複數凹 槽522’形成-第-導電層13〇、_第二導電層132與一第三導電層⑶於 承接基板52上；提供-共用基板％，並對應該複數凹槽522遙晶形成一第 發光極體54與第一發光二極體邪於該共用基板96之上；翻轉該共 用基板96以-第-凸塊51〇使該第一發光二極體54與該第一導電層伽 電性相接，以-第二凸塊512使該第一發光二極體54與該第二發光二極體 6相，該第二導電層132,以—第三凸塊514使該第二發光二極體56與該 第二導電層134相接；以及自锋、 二航二_^ 〜用基板96分離該第-發光二極體54與 請參閱第二十一 Α圖至第, 一 E圖，其係為本發明之另一較佳實施 201015695 例之製造流程圖；如圖所示，並同時參閱第 與第二十A圖至第二十E圖之實施例不同之之另一實施例 晶形成-第-發光二極體54與-第二發光對應該複數凹槽522蟲 .之同-步驟中，更進-步包含形成,娜㈣之上 二發光二極體56之間，且絕緣層2G位於第 ^發先—極體54與第 •極體56之間的分隔空間58内。 、一極體54與第二發光二 故本發明實為—具有觸性、進步性 ❹ 國專利法專利申請要件無疑，麦依法提出發明專^利用'應符合我 准專利，至感為禱。 專利申請’祈釣局早日賜 施：上已’並非_定本轉 爾，均軸於本發:：:：特徵及精料之撕 【圖式簡單說明】 第二=.發明之1佳實施例之結構示意圖； 第:圖較佳實施例之結構示意圏； 第四β 較佳實施例之結構示意圖； 第五A圖：其料本^之另'較佳實施例之結構示意圖； 第五B圖.之另—較佳實施例之電路圖 第五D圖;其之另-較佳實施例之電路圖 第五r® 為轉之另—較佳實施例之電路圖 第六Α圖：之另—_實施例之電路圖， 第六B圖：其·倍”發月之半導鱧磊晶層之一較佳實施例之結構示意圖； 第六c圖.ϋ本發月之半導體遙晶層之另—較佳實施例的結構示意圖； 第六D圖：其係為本發明之半導體磊晶層之另一較佳實施例之結構示意圓； 為本發日月之半導體蟲晶層之另-較佳實施例之結構示意圖； 15 201015695 第七A圖：其係為本發明之半導麟晶層之—較 第七c圖 第七D圖 第八A圖 第八B圖 第八C圖 第九A圖 第九B圖 第九C圖 第九D圖 第七明之半導編層之另-較佳貧關的=闽 二“明之半導體蠢晶層之另^佳實施例之結構示意圖 1二士發明之半導體遙晶層之另一較佳實施例之結構示意圖 其係為本發明之一較佳實施例之製造流程示意圖. 其係為本發明之一較佳實施例之製造流程示意圖 其係為本發明之一較佳實施例之製造流程示意圖 其係為本發明之一較佳實施例之製造流程示意圖 其係為本發明之_較佳實施例之製造流程示意圖 其係為本發明之—較佳實施例之製造流程示意圖 第+圖·本發明之—較佳實施例之製造流程示意圖 ^圖.其係為本發明之—較佳實施例之結構示意圖； 圖.其係為本發明之另一較佳實施例之結構示意圖 其係為本發明之另一較佳實施例之結構示意圖 其係為本發明之另一較佳實施例之結構示意圖 其係為本發明之另一較佳實施例之結構示意圖 其係為本發明之另一較佳實施例之結構示意圖， ❹ 第十二圖 第十三圖 第十四圖 第十五圖 第十六Α圖 第十六B圖 第十七A圓 第十七B圖 第十七C圖 第十七D圖 .其係為本發明之另—較佳實施例之結構示意圖； 其係為本發明之另一較佳實施例之結構示意圈； 其係為本發明之另一較佳實施例之電路圖 其係為本發明之另一較佳實施例之電路圖 其係為本發明之另一較佳實施例之電路圖 .其係為本發明之另一較佳實施例之電路圖； 八A圖，其係為本發明之半導縣晶狀另-較佳實施例之結構示意 圃， 第十八B ® ·⑽為本發冑之半導縣㉟权雛實施綱結構示意 QQ · 圃， 第十八c ®.其係為本發明之半導體a晶層之另—較佳實施例之結構示意 201015695 第十八D ® :其係為本發明之半導體^層之另—較佳實補之結構示意 圖； A圖·其係為本發明之半導體蟲晶層之—較佳實施例之結構示意圖； B圖：其係為本發明之半導·晶層之另—較佳實施例的結構示意The manufacturing method of the device includes the steps of: providing a substrate 52, and the plurality of recesses 522' form a first conductive layer 13, a second conductive layer 132 and a third conductive layer (3) on the receiving substrate 52. Providing - sharing the substrate %, and forming a first light-emitting body 54 and a first light-emitting diode on the common substrate 96 by the plurality of grooves 522, and flipping the common substrate 96 to - the - bump The first light-emitting diode 54 is electrically connected to the first conductive layer, and the first light-emitting diode 54 is connected to the second light-emitting diode 6 by the second bump 512. The second conductive layer 132 is connected to the second conductive layer 134 by the third bump 514; and the first electrode is separated from the front and the second substrate. The light-emitting diode 54 and the reference to the twenty-first to the first, and the first one, which are the manufacturing flow chart of another preferred embodiment of the present invention 201015695; as shown in the figure, and also refer to the same Another embodiment different from the embodiments of FIGS. 20A to 20E includes crystal formation - the first-light emitting diode 54 and the second light-emitting pair should have a plurality of grooves 5 In the same step of step 22, the further step comprises forming, between the two light-emitting diodes 56 on the top (four), and the insulating layer 2G is located between the first-pole body 54 and the pole body 56. The separation space 58 is inside. The first embodiment of the invention is a touch and progress. The patent application requirements of the patent law of the country are undoubtedly, and the law of the invention is based on the fact that it should be in accordance with my quasi-patent. Patent application 'Prayer Bureau early grant: Shang has' is not a fixed turn, the axis is in the hair:::: feature and the tear of the fine material [simple description of the figure] Second =. The best example of invention FIG. 3 is a schematic structural view of a preferred embodiment of the present invention; FIG. 5 is a schematic structural view of another preferred embodiment of the present invention; Fig. 5 is a circuit diagram of a preferred embodiment, Fig. 5D; a circuit diagram of another preferred embodiment, a fifth diagram, a circuit diagram of a preferred embodiment, a sixth diagram: another__ The circuit diagram of the embodiment, the sixth B-figure: a schematic diagram of a preferred embodiment of the epitaxial layer of the semi-conducting bismuth layer; the sixth c-figure. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 6 is a schematic diagram showing a structure of another preferred embodiment of the semiconductor epitaxial layer of the present invention; Schematic diagram of the structure of the embodiment; 15 201015695 Figure 7A: It is the semi-conductive layer of the invention - the seventh is the seventh D Figure 8A Figure 8 B Figure 8 C Figure 9 A Figure 9 B Figure 9 C Figure 9 D Figure 7 of the semi-guided layer of the other - better poor = 闽 2 "Mingzhi BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing the structure of another preferred embodiment of a semiconductor crystal layer of the invention of the invention. FIG. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a manufacturing process of a preferred embodiment of the present invention, which is a schematic diagram of a manufacturing process of a preferred embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The schematic diagram of the manufacturing process of the present invention is a schematic diagram of the manufacturing process of the present invention - a preferred embodiment of the present invention - a schematic diagram of the manufacturing process of the preferred embodiment of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 2 is a schematic structural view of another preferred embodiment of the present invention, which is a schematic structural view of another preferred embodiment of the present invention. Schematic diagram of the structure is the invention BRIEF DESCRIPTION OF THE DRAWINGS FIG. 12 is a schematic structural view of another preferred embodiment of the present invention, ❹ twelfth drawing, thirteenth drawing, fourteenth drawing, fifteenth drawing, sixteenth drawing, sixteenth B Figure 17A, Figure 17B, Figure 17C, Figure 17D, is a schematic view of another preferred embodiment of the present invention; it is another preferred embodiment of the present invention BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of another preferred embodiment of the present invention, which is a circuit diagram of another preferred embodiment of the present invention. The circuit diagram of another preferred embodiment of the present invention; FIG. 8A is a schematic diagram of the structure of the semi-conductive county of the present invention, and the eighteenth B B · (10) is the hairpin The semi-conducting county 35 rights implementation outline structure QQ · 圃, the eighteenth c ®. It is another embodiment of the semiconductor a crystal layer of the invention - the structure of the preferred embodiment 201015695 the eighteenth D ® : its system A schematic diagram of another preferred embodiment of the semiconductor layer of the present invention; Figure A is a semi-conductive portion of the present invention Insect crystal layers - a schematic structural diagram of the preferred embodiment; FIG. B: · another semiconductor crystal layer of the present invention which is based - a schematic structure of the preferred embodiment
Td · 園， 第十九c ® .其係為本發明之半導體i晶層之另_較佳實補之結構示意 圖； ❹ ❹ 第十九D ® ·其係為本發明之半導廳晶狀較佳實補之結構示意 鹿I， 第-十A圖.其係為本發明之一較佳實施例之製造流程示意圖 第-十B圖·其係為本發明之一較佳實施例之製造流程示意圖 =-十C圖.其係為本發明之一較佳實施例之製造流程示意圖 •^十D圖.其係為本發明之一較佳實施例之製造流程示意圖 十E圖.其係為本發明之一較佳實施例之製造流程示意圖； 第二十一(:圖 第二十一 D圖 第二十一E圖 :十-A圖：其係為本發明之—較佳實施例之製造絲示意圖 -十-B圖：其係為本發明之一較佳實施例之製造流程示意圖 其係為本發明之一較佳實施例之製造流程示意圖 其係為本發明之一較佳實施例之製造流程示意圖 其係為本發明之一較佳實施例之製造流程示意圖 【主要元件符號說明】 10 交流發光裝置 12基板 122凹槽 分隔空間 130第一導電層 132第二導電層 17 201015695 134第三導電層 14 第一發光二極體 142磊晶堆疊層 144 N型半導體層 146發光層 148 P型半導體層 150第一電極 152第二電極 154散射結構 16 第二發光二極體 162 遙晶堆疊層 164 N型半導體層 166 發光層 168 P型半導體層 170 第一電極 172 第二電極 174 散射結構 18 導體 20 絕緣層 22 能量轉換層 222 散射結構 30 橋式整流電路 40 半導體蟲晶層 42 蟲晶堆疊層 422 第二電極 44 N型半導體層 442 第一電極 46 發光層 201015695 48 P型半導體層 482第二電極 50 覆晶式交流發光裝置 510第一凸塊 512第二凸塊 514第三凸塊 52 承接基板 522凹槽 524介電層 54 第一發光二極體 540散射結構 542磊晶堆疊層 544 N型半導體層 546發光層 548 P型半導體層 550第一電極 552第二電極 554透明基板 556散射結構 56 第二發光二極體 560散射結構 562磊晶堆疊層 564 N型半導體層 566發光層 568 P型半導體層 570第一電極 572第二電極 574透明基板 201015695Td · Garden, Nineteenth C ® . It is a schematic diagram of another preferred embodiment of the semiconductor i crystal layer of the present invention; ❹ ❹ Nineteenth D ® · It is a semi-conducting hall crystal of the present invention Preferably, the structure of the preferred embodiment is shown in the accompanying drawings. FIG. 10 is a schematic view of a manufacturing process according to a preferred embodiment of the present invention. FIG. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 10 is a schematic diagram of a manufacturing process of a preferred embodiment of the present invention. FIG. 10 is a schematic view of a manufacturing process according to a preferred embodiment of the present invention. A schematic diagram of a manufacturing process of a preferred embodiment of the present invention; twenty-first (: FIG. 21D, FIG. 21, and FIG. 11E: FIG. 10A: FIG. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 10 is a schematic view of a manufacturing process of a preferred embodiment of the present invention, which is a schematic diagram of a manufacturing process of a preferred embodiment of the present invention. Schematic diagram of the manufacturing process of the present invention is a schematic diagram of the manufacturing process of a preferred embodiment of the present invention. 10 AC light-emitting device 12 substrate 122 groove separation space 130 first conductive layer 132 second conductive layer 17 201015695 134 third conductive layer 14 first light-emitting diode 142 epitaxial stacked layer 144 N-type semiconductor layer 146 light-emitting layer 148 P-type semiconductor layer 150 first electrode 152 second electrode 154 scattering structure 16 second light-emitting diode 162 remote crystal stacked layer 164 N-type semiconductor layer 166 light-emitting layer 168 P-type semiconductor layer 170 first electrode 172 second electrode 174 scattering Structure 18 Conductor 20 Insulation Layer 22 Energy Conversion Layer 222 Scattering Structure 30 Bridge Rectifier Circuit 40 Semiconductor Crystal Layer 42 Insect Stack Layer 422 Second Electrode 44 N-Type Semiconductor Layer 442 First Electrode 46 Light Emitting Layer 201015695 48 P-Type Semiconductor Layer 482 second electrode 50 flip-chip AC light-emitting device 510 first bump 512 second bump 514 third bump 52 receiving substrate 522 groove 524 dielectric layer 54 first light-emitting diode 540 scattering structure 542 epitaxial stack Layer 544 N-type semiconductor layer 546 light-emitting layer 548 P-type semiconductor layer 550 first electrode 552 second electrode 554 transparent substrate 556 scattering structure 56 second light-emitting diode 570 a first electrode 560 of stacked layers scattering structure 562 epitaxial layer 566 564 N-type semiconductor layer, light emitting layer 572 568 P-type semiconductor substrate, a second transparent electrode 574 201 015 695
Q 576散射結構 58 分隔空間 60 散射結構 62 能量轉換層 64 能量轉換層 642散射結構 96 共用基板 20Q 576 scattering structure 58 separation space 60 scattering structure 62 energy conversion layer 64 energy conversion layer 642 scattering structure 96 common substrate 20