TW200905409A - Exposure method and manufacturing method for electronic device - Google Patents
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Abstract
Description
200905409 九、發明說明： 【發明所屬之技術領域】 本發明之實施例係關於曝光方法及電子零件製造 方法。更詳細而言，本發明之實施例係關於在製造半 導體元件、攝像元件、液晶顯示元件、薄膜磁頭等電 子零件之微影步驟中使用的曝光方法者。 【先前技術】 製造半導體元件等之零件時，在塗布了感光材料 之晶圓（或是玻璃板等基板）上重疊複數層之電路圖 案而形成。因而，曝光裝置中具備用於進行描繪了應 轉印之圖案的光罩與已經形成了電路圖案之晶圓的校 準（Alignment)之校準裝置。習知此種校準裝置如為攝 像方式之校準裝置。 攝像方式之校準裝置係以從光源射出之光照明晶 圓上的校準標記（晶圓標記）。而後，經由成像光學系 統，將晶圓標記之放大影像形成於攝像元件上，藉由 圖像處理所獲得之攝像信號，以檢測晶圓標記之位置。 一般而言，在1片晶圓上，將複數之單位曝光區 域設定成矩陣狀。各單位曝光區域中，藉由1次曝光 動作（一起曝光動作、掃描曝光動作等）而形成LSI (大規模積體電路）之功能元件的電路圖案等。亦即， 曝光裝置係相對於投影光學系統，使晶圓步進移動， 並對1個單位曝光區域包含複數次而反覆進行曝光動 作。此時，各單位曝光區域中，1個或複數校準標記與 1個或複數LSI之電路圖案一起轉印。 先前之位置檢測裝置中裝設有1個位置檢測機構 200905409 (校準顯微鏡等），或是分別裝設有x位置檢測機構與 γ位置檢測機構。以圖案曝光後的晶圓經過蝕刻步驟、 成膜步驟等之晶圓處理，有可能發生面内變形。亦即， 因為晶圓處理的過程，有可能使晶圓比原來形狀發生 全體性或局部性伸縮。 為了對應於曝光圖案與經過晶圓處理後之晶圓的 變形情形，提出關於修正各單位曝光區域在晶圓面内 之排列的變形之EGA (增強型全晶圓校準）方法。此 外，為了對應於各單位曝光區域之線形性的變形，亦 即在各單位曝光區域之面内，以正交座標之Χ,Υ座標 的一次函數表示之全體性的伸縮及旋轉，而提出有修 正投影光學系統之倍率的倍率修正方法，及使光罩旋 轉之光罩旋轉方法。 【發明内容】 (發明所欲解決之問題） 近年來，隨著LSI之電路圖案的微細化，就基板上 之圖案的重疊，精確度之要求日益提高。因此，未來也 需要就先前技術未曾考慮到之「單位曝光區域内之高度 變形」作修正。此處所謂「高度變形」，係指無法以X，Y 座標之一次函數表示的「高次變形」。亦即，所謂「高 次變形」，係指如以Χ，Υ座標之二次函數及三次函數等 之高次函數表示的變形。 高精確度計測單位曝光區域内之高度變形時，需要 檢測如在單位曝光區域内離散性形成之多數個標記的 位置。使用具備1個或一對位置檢測機構之先前的位置 檢測裝置而依序檢測多數個標記之位置時，標記之位置 200905409 檢測花費過多時間，導致曝光裝置之通量（處理能力） 降低，進而不易獲得充分之生產性。 先前，為了實質地不損及LSI之電路設計的自由 度，校準標記係形成於單位曝光區域内之周邊部（沿著 單位曝光區域之外形邊界線的内側區域）。或者，若需 在1個單位曝光區域中形成複數LSI之電路圖案情況 下，校準標記除了在單位曝光區域内之周邊部外，也可 取代單位曝光區域内之周邊部，而形成於彼此相鄰之2 個LSI電路圖案之間。 配置於各單位曝光區域内之LSI數量，係依其種類 而定，不過至多達到12個程度。如在X方向成3列， 在Y方向成4列，而並列配置合計12個LSI時，先前 技術中，可形成位置檢測標記之區域，限於沿著X方向 可離散性地排列之4處及沿著Y方向而離散性地排列之 5處。此時，位置檢測標記之分布疏鬆，於高精確度計 測單位曝光區域内之變形，尤其是LSI之電路圖案内的 變形會有困難。 (解決問題之手段） 本發明之實施例之目的為提供一種迅速且高精確 度計測單位曝光區域内之變形，可高精確度地進行在基 板上之重疊圖案之曝光方法。 本發明第一實施例係提供一種曝光方法，其使用投 影光學系統而在基板上曝光明暗圖案，其包含： 位置檢測步驟，其係藉由位置檢測系統，該位置檢 測系統具有進入大致等於前述基板之1個單位曝光區域 的範圍内之複數基準檢測位置，檢測存在於前述基板上 之至少一個單位曝光區域内的複數位置檢測標記在前 200905409 述基板之面内方向的位置； 變形算出步驟，其係依據關於前述位置檢測步驟所 獲得之前述複數位置檢測標記的位置之資訊，算出前述 至少一個單位曝光區域内之變形狀態；及 形狀變更步驟，其係依據前述變形算出步驟所獲得 之前述變形狀態，變更應曝光於前述基板上之明暗圖案 的形狀； 並且，以前述位置檢測步驟而檢測之位置檢測標 記，係設於前述基板上之前述單位曝光區域内存在的至 少一個功能元件中者。 本說明書中所謂「單位曝光區域」，係指藉由1次 曝光動作（一起曝光動作、掃描曝光動作等），在此處 形成明暗圖案之基板上的單位性之曝光區域。 本發明第二實施例係提供一種電子零件製造方 法，其包含微影步驟； 且在前述微影步驟中使用第一實施例之曝光方法。 本發明之實施例的曝光方法，係使用檢測進入如大 致等於基板之單位曝光區域的範圍内之複數位置的位 置檢測系統（1個或複數位置檢測機構），檢測設於單位 曝光區域内存在之至少一個功能元件中（嚴格而言，係 功能元件用之圖案中）的複數位置檢測標記在基板之面 内方向的位置。而後，依據關於此等複數位置之資訊， 算出單位曝光區域内之變形狀態。換言之，係依據關於 在單位曝光區域之複數位置的資訊，高精確度地計測形 成於單位曝光區域之已經存在的圖案之變形。 本發明之實施例係對應於單位曝光區域中形成之 已經存在的圖案之變形，藉由變更應曝光於基板上之明 200905409 暗圖案的形狀，使圖案在基板上之重疊精確度提高。如 此，本發明之實施例的曝光方法，係依據以需要之分布 所形成的複數位置檢測標記，迅速且高精確度地計測單 位曝光區域内之變形，可高精確度地進行圖案在基板上 之重疊，進而可高精確度地製造電子零件。 【實施方式】 依據附圖說明本發明之實施例。附圖係藉以顯示本 發明一種實施例，而並非藉以限定本發明者。第一圖係 概略顯示用於實施本發明之實施例的曝光方法的曝光 裝置之構成圖。第一圖係X軸及Y軸在與晶圓W之表 面（曝光面）平行之面内，彼此正交地設定，Z軸設定 於晶圓W表面之法線方向。再者，具體而言，XY平面 水平地設定，而+ Z軸係沿著垂直方向而朝上設定。 第一圖之曝光裝置如具備由氟化氬(ArF)準分子雷 射光源之曝光光源、光學積分器（均質機）、視場光闌、 聚光透鏡等構成之照明系統1。照明系統1藉由從光源 射出之曝光之光IL，照明形成了應轉印之圖案的光罩 (標線片）M。照明系統1如照明光罩Μ之矩形狀的圖 案區域全體，或是圖案區域全體中沿著X方向之細長縫 隙狀的區域（如矩形狀之區域）。 來自光罩Μ之圖案的光，經由具有指定縮小倍率之 投影光學系統PL，而在塗布了光阻之晶圓（感光性之基 板）W的各單位曝光區域中形成光罩Μ之圖案影像（明 暗圖案）。亦即，光學性對應於光罩Μ上之照明區域（視 場），而在晶圓W之各單位曝光區域中，於與光罩Μ之 圖案區域全體相似的矩形狀區域，或是在X方向細長之 200905409 矩形狀的區域（靜止曝光區域）形成光罩圖案影像。 光罩Μ在光罩載台MS上與XY平面平行地保持。 在光罩載台MS中組裝有使光罩Μ在X方向、Y方向及 Ζ軸周圍之旋轉方向微動的機構。載光罩載台MS中設 置省略圖示之移動鏡，使用該移動鏡之光罩雷射干擾儀 (無圖示）即時計測光罩載台MS (進而光罩M)之X 位置、Y位置及旋轉位置。 晶圓W經由晶圓保持器（無圖示），而在Z載台2 上與XY平面平行地保持。Z載台2安裝於沿著與投影 光學系統PL之像面平行的XY平面而移動之XY載台3 上，調整晶圓W之聚焦位置（Z方向之位置）及傾斜角 (晶圓W表面對XY平面之斜度）。Z載台2中設置移 動鏡4，使用移動鏡4之晶圓雷射干擾儀5即時計測Z 載台2之X位置、Y位置及Z軸周圍的旋轉位置。XY 載台3放置於基座6上，調整晶圓W之X位置、Y位 置及旋轉位置。 光罩雷射干擾儀之輸出及晶圓雷射干擾儀5之輸出 供給至主控制系統7。主控制系統7依據光罩雷射干擾 儀之計測結果，進行光罩Μ之X位置、Y位置及旋轉 位置之控制。亦即，主控制系統7藉由傳送控制信號至 組裝於光罩載台MS的機構，該機構依據控制信號使光 罩載台MS微動，來進行光罩Μ之X位置、Y位置及旋 轉位置的調整。 主控制系統7為了藉由自動聚焦方式及自動調平方 式，將晶圓W表面併入投影光學系統PL之像面（與像 面一致），而進行晶圓W之聚焦位置及傾斜角的控制。 亦即，主控制系統7藉由傳送控制信號至晶圓載台驅動 200905409 系統8，晶圓載台驅動系統8依據控制信號驅動Z載台 2，而進行晶圓W之聚焦位置及傾斜角的調整。 主控制系統7依據晶圓雷射干擾儀5之計測結果， 進行晶圓W之X位置、Y位置及旋轉位置的控制。亦 即，主控制系統7藉由傳送控制信號至晶圓載台驅動系 統8，晶圓載台驅動系統8依據控制信號驅動XY載台 3，而進行晶圓W之X位置、Y位置及旋轉位置的調整。 步進及重複方式係在晶圓W上設定成矩陣狀之複 數單位曝光區域中的1個單位曝光區域中，一起曝光光 罩Μ之圖案影像。其後，主控制系統7藉由傳送控制信 號至晶圓載台驅動系統8，藉由晶圓載台驅動系統8使 ΧΥ載台3沿著ΧΥ平面步進移動，而將晶圓W之另外 單位曝光區域對投影光學系統PL定位。如此反覆進行 將光罩Μ之圖案影像一起曝光於晶圓W之單位曝光區 域的動作。 步進及掃描方式，係主控制系統7傳送控制信號至 組裝於光罩載台MS之機構，並且傳送控制信號至晶圓 載台驅動系統8,以按照投影光學系統PL之投影倍率的 速度比，使光罩載台MS及XY載台3移動，並將光罩 Μ之圖案影像掃瞄曝光於晶圓W的1個單位曝光區域 中。其後，主控制系統7藉由傳送控制信號至晶圓載台 驅動系統8，藉由晶圓載台驅動系統8使ΧΥ載台3沿 著ΧΥ平面步進移動，而將晶圓W之另外單位曝光區域 對投影光學系統PL定位。如此反覆進行將光罩Μ之圖 案影像掃瞄曝光於晶圓W之單位曝光區域的動作。 亦即，步進及掃描方式係藉由使用晶圓載台驅動系 統8及晶圓雷射干擾儀5等，進行光罩Μ及晶圓W之 11 200905409 位置控制，同時沿著矩形狀（一般而言係缝隙狀）之靜 止曝光區域短邊方向的Y方向，使光罩載台MS與XY 載台3,進而使光罩Μ與晶圓W同步移動（掃描），而 在晶圓W上對於具有等於靜止曝光區域之長邊的寬 度，且具有按照晶圓W之掃描量（移動量）的長度之區 域，掃描曝光光罩圖案。 第一圖之曝光裝置為了高精確度地計測晶圓W之 單位曝光區域内的變形，且提高圖案在晶圓W上之重疊 精確度，而具備：位置檢測系統10、變形算出部11與 光學面形狀變更部12。位置檢測系統10不經由投影光 學系統PL，而檢測在晶圓W之單位曝光區域的複數位 置。變形算出部11依據位置檢測系統10之檢測結果， 算出晶圓W之單位曝光區域内的變形狀態。光學面形狀 變更部12依據變形算出部11之算出結果，為了變更應 曝光於晶圓W之圖案影像（明暗圖案）的形狀，而變更 投影光學系統PL中之至少一個光學面的面形狀。 如第二圖所示，位置檢測系統10具備沿著ΧΥ平面 而二維地並列配置之複數位置檢測機構。為了使圖式清 晰，第二圖係顯示交錯狀地並列配置構成位置檢測系統 10之複數位置檢測機構的一部分之5個位置檢測機構 10a、10b、10c、10d、10e的情況。此處所謂交錯狀地 並列配置，係從沿著X方向之直線，在+ Y方向與一Y 方向彼此交互地配置位置檢測機構。如第二圖中，係顯 示相鄰之2列，亦即顯示包含位置檢測機構10a、10c、 10e之第1列與包含位置檢測機構10b、10d之第2列， 而位置檢測機構l〇a、10c、10e係偏置於+ Y方向側， 且在第1列上以指定之間隔配置。位置檢測機構10b、 12 200905409 10d偏置於-Y方向側，且在第2列上以指定之間隔配 置。5個位置檢測機構10a〜10e係以其基準檢測位置 10aa〜10ea進入大致等於晶圓…之單位曝光區域的矩形 狀之範圍10f内的方式構成。第二圖係將位置檢測機構 10a〜10e之各檢測區域的中心作為基準檢測位置，藉由 十字標記而顯示。-實施例係構成位置檢測系統1〇之 全部位置檢測機構的基準檢測位置收在範圍i〇f内。 位置檢測機構l〇a〜l〇e如係攝像方式之位置檢測機 構’且彼此具有相同基本構成。攝像方式之位置檢測機 構10 a〜10 e如第三圖所示，以半稜鏡3 2反射來自照明系 統31之，明光’經由第—對物透鏡％❿照明形成於晶 圓w之單位曝光區域的位置檢測標記pM。照明系統” 亦可個別地設於各位置檢顺構，亦 位置檢測機構。 M f f:ί而從位置檢測標記PM反射之光（包含繞 ^ ^ 物透鏡％、半棱鏡32及第二對物透 L二Ϊμ之旦：％之攝像元件的攝像面形成位置 檢測ό己ΡΜ之影傻。允p * .1 電檢測經由第-對物透# 33 目機35作為用於光 以後透鏡與第二對物透鏡34而構成 之成像先4、麵形叙㈣ 檢測器（光檢測部）之功能。 〜诼的尤电 由二目機藉由在内部之信號處理部（無圖示） 理）位置檢測標記ΡΜ$像之光電檢測 二庐抨，：：位置檢測標記ΡΜ之中心位置的χ座標 Μ M H了位置檢測標記ΡΜ之位置資訊。CCD相 10a 10 記⑽之位置資訊作為位置檢測機構 輸出（進而位置檢測系統1〇之輸出），而供 200905409 給至變形算出部11。 變形算出部11依據位置檢測系統10之檢測結果， 亦即依據形成於晶圓w之單位曝光區域的複數位置檢 測標記PM之位置資訊（複數位置檢測值），算出單位曝 光區域内之變形狀態。具體而言，變形算出部11檢測 形成於晶圓W之單位曝光區域的複數位置檢測標記PM 與基準位置之位置偏差量，依據關於該位置偏差量之資 訊’藉由如以X座標與γ座標而定義之非線形函數’近 似地表現單位曝光區域内之變形。 此處，假設以X座標與γ座標之高次函數定義的單 位曝光區域之高度變形。將設計上之位置檢測標記PM 的座標位置（以下稱為設計值）設為（Dxn， Dyn)，將 藉由實際之檢測所獲得之位置檢測標記PM的座標位置 (以下稱為實測值）設為（Fxn，Fyn)，設計值與實測值之 位置偏差的因素，使用a〜f (一次成分之變數）之變數 要素’及g〜j (高次成分之變數）之變數要素時，實測 值與設計值之關係如以下之公式（1)地表示。其中，η係 整數’並作為形成於單位曝光區域之位置檢測標記ΡΜ 的編號。200905409 IX. Description of the Invention: TECHNICAL FIELD Embodiments of the present invention relate to an exposure method and an electronic component manufacturing method. More specifically, embodiments of the present invention relate to an exposure method used in the lithography step of manufacturing an electronic component such as a semiconductor element, an image pickup element, a liquid crystal display element, or a thin film magnetic head. [Prior Art] When manufacturing a component such as a semiconductor element, a circuit pattern of a plurality of layers is stacked on a wafer (or a substrate such as a glass plate) coated with a photosensitive material. Therefore, the exposure apparatus is provided with a calibration device for performing alignment of the photomask on which the pattern to be transferred is drawn and the wafer on which the circuit pattern has been formed. Conventional calibration devices are known as calibration devices for imaging. The imaging mode calibration device illuminates the alignment mark (wafer mark) on the crystal with light emitted from the light source. Then, an enlarged image of the wafer mark is formed on the image pickup element via the image forming optical system, and the image pickup signal obtained by the image processing is used to detect the position of the wafer mark. In general, a plurality of unit exposure regions are arranged in a matrix on one wafer. In each unit exposure region, a circuit pattern of a functional element of an LSI (Large Scale Integrated Circuit) is formed by one exposure operation (a total exposure operation, a scanning exposure operation, or the like). That is, the exposure apparatus moves the wafer stepwise with respect to the projection optical system, and performs exposure operation repeatedly for a plurality of unit exposure areas. At this time, one or a plurality of alignment marks are transferred together with the circuit pattern of one or a plurality of LSIs in each unit exposure region. The position detecting device of the prior art is equipped with one position detecting mechanism 200905409 (calibration microscope or the like), or an x-position detecting mechanism and a γ-position detecting mechanism, respectively. The wafer after the pattern exposure is subjected to wafer processing such as an etching step or a film forming step, and in-plane deformation may occur. That is, because of the wafer processing process, it is possible to cause the wafer to be entirely or partially stretched over the original shape. In order to correspond to the deformation of the exposure pattern and the wafer after the wafer processing, an EGA (Enhanced Full Wafer Calibration) method for correcting the distortion of the arrangement of the respective unit exposure regions in the wafer surface has been proposed. Further, in order to cope with the linear deformation of each unit exposure region, that is, in the plane of each unit exposure region, the entire coordinate expansion and rotation of the Υ coordinate are expressed by the orthogonal function of the orthogonal coordinates. A method of correcting the magnification of the magnification of the projection optical system, and a method of rotating the reticle that rotates the reticle. SUMMARY OF THE INVENTION (Problems to be Solved by the Invention) In recent years, with the miniaturization of circuit patterns of LSIs, the accuracy of the overlap of patterns on a substrate has been increasing. Therefore, in the future, it is necessary to correct the "high deformation in the unit exposure area" which has not been considered by the prior art. Here, "highly deformed" means "high-order deformation" which cannot be represented by a linear function of the X and Y coordinates. In other words, the term "high-order deformation" refers to a deformation represented by a high-order function such as a quadratic function of a Χ, a Υ coordinate, and a cubic function. When high-accuracy is used to measure the height deformation in the unit exposure area, it is necessary to detect the position of a plurality of marks formed discretely in the unit exposure area. When the position of a plurality of marks is sequentially detected using a previous position detecting device having one or a pair of position detecting mechanisms, the position of the mark 200905409 is excessively detected, resulting in a decrease in the throughput (processing capability) of the exposure device, which is not easy. Get full productivity. Previously, in order to substantially not impair the degree of freedom in circuit design of the LSI, the alignment mark was formed in the peripheral portion (the inner region of the boundary line outside the unit exposure region) in the unit exposure region. Alternatively, in the case where a circuit pattern of a plurality of LSIs is to be formed in one unit exposure region, the alignment marks may be formed adjacent to each other in addition to the peripheral portion in the unit exposure region instead of the peripheral portion in the unit exposure region. Between two LSI circuit patterns. The number of LSIs disposed in the exposure area of each unit depends on the type, but up to 12 levels. When there are three rows in the X direction and four columns in the Y direction, and a total of twelve LSIs are arranged side by side, in the prior art, the region where the position detection marks can be formed is limited to four positions that are discretely arranged along the X direction and Five places are arranged discretely along the Y direction. At this time, the distribution of the position detection marks is loose, and it is difficult to measure the deformation in the unit exposure area with high accuracy, especially in the circuit pattern of the LSI. (Means for Solving the Problem) An object of an embodiment of the present invention is to provide a method for exposing a superimposed pattern in a unit exposure area with rapid and high precision, and performing an exposure pattern on a substrate with high precision. A first embodiment of the present invention provides an exposure method for exposing a light and dark pattern on a substrate using a projection optical system, comprising: a position detecting step by a position detecting system having an entrance substantially equal to the substrate a plurality of reference detection positions in a range of one unit exposure area, detecting a position of a plurality of position detection marks existing in at least one unit exposure area on the substrate in a front direction of the substrate in the first 200905409; a deformation calculation step Calculating a deformation state in the at least one unit exposure region based on information on a position of the plurality of position detection marks obtained by the position detecting step; and a shape changing step of the deformation state obtained by the deformation calculation step And changing the shape of the light and dark pattern on the substrate; and the position detecting mark detected by the position detecting step is provided in at least one functional element existing in the unit exposure region on the substrate. In the present specification, the "unit exposure region" refers to a unit-shaped exposure region on a substrate on which a light-dark pattern is formed by one exposure operation (an exposure operation, a scanning exposure operation, or the like). A second embodiment of the present invention provides an electronic component manufacturing method including a lithography step; and the exposure method of the first embodiment is used in the aforementioned lithography step. The exposure method of the embodiment of the present invention uses a position detecting system (one or a plurality of position detecting mechanisms) for detecting a plurality of positions within a range substantially equal to a unit exposure area of the substrate, and detecting that the unit is disposed in the unit exposure area. The position of the complex position detection mark in at least one of the functional elements (strictly speaking, in the pattern for the functional element) is in the in-plane direction of the substrate. Then, based on the information about the plural positions, the deformation state in the unit exposure area is calculated. In other words, the deformation of the existing pattern formed in the unit exposure region is measured with high accuracy based on the information on the plural position of the unit exposure region. Embodiments of the present invention correspond to the deformation of an existing pattern formed in a unit exposure region, and the overlap accuracy of the pattern on the substrate is improved by changing the shape of the dark pattern to be exposed on the substrate. As described above, the exposure method of the embodiment of the present invention measures the deformation in the unit exposure region quickly and with high accuracy based on the plurality of position detection marks formed by the required distribution, and the pattern can be highly accurately performed on the substrate. The overlap allows the electronic parts to be manufactured with high precision. [Embodiment] An embodiment of the present invention will be described with reference to the drawings. The drawings are used to illustrate one embodiment of the invention and are not intended to limit the invention. The first drawing schematically shows the configuration of an exposure apparatus for carrying out an exposure method of an embodiment of the present invention. In the first drawing, the X-axis and the Y-axis are set to be orthogonal to each other in a plane parallel to the surface (exposure surface) of the wafer W, and the Z-axis is set in the normal direction of the surface of the wafer W. Further, specifically, the XY plane is set horizontally, and the +Z axis is set upward in the vertical direction. The exposure apparatus of the first figure includes an illumination system 1 including an exposure light source of an argon fluoride (ArF) excimer laser light source, an optical integrator (homogenizer), a field diaphragm, a collecting lens, and the like. The illumination system 1 illuminates a mask (reticle) M which forms a pattern to be transferred by the exposure light IL emitted from the light source. The illumination system 1 is an entire rectangular pattern area of the illumination mask, or an elongated slit-like area (e.g., a rectangular area) along the X direction in the entire pattern area. The light from the pattern of the mask is formed into a pattern image of the mask in each unit exposure region of the wafer (photosensitive substrate) W to which the photoresist is applied via the projection optical system PL having the specified reduction magnification ( Light and dark pattern). That is, the optical property corresponds to the illumination area (field of view) on the mask, and in the unit exposure area of the wafer W, in a rectangular region similar to the entire pattern area of the mask, or in the X The direction of the elongated 200905409 rectangular area (still exposure area) forms a reticle image. The mask is held on the reticle stage MS in parallel with the XY plane. A mechanism for inverting the rotation direction of the mask Μ in the X direction, the Y direction, and the yaw axis is incorporated in the reticle stage MS. A moving mirror (not shown) is provided in the reticle stage MS, and the ray mask laser interferometer (not shown) of the moving mirror is used to instantly measure the X position and the Y position of the reticle stage MS (and thus the mask M). And the position of rotation. The wafer W is held in parallel with the XY plane on the Z stage 2 via a wafer holder (not shown). The Z stage 2 is mounted on the XY stage 3 that moves along the XY plane parallel to the image plane of the projection optical system PL, and adjusts the focus position (position in the Z direction) and the tilt angle of the wafer W (wafer W surface) The slope of the XY plane). The Z-stage 2 is provided with a moving mirror 4, and the wafer laser interferometer 5 of the moving mirror 4 is used to instantly measure the X position, the Y position, and the rotational position around the Z-axis of the Z stage 2. The XY stage 3 is placed on the susceptor 6, and the X position, the Y position, and the rotational position of the wafer W are adjusted. The output of the reticle laser jammer and the output of the wafer laser jammer 5 are supplied to the main control system 7. The main control system 7 controls the X position, the Y position, and the rotational position of the mask 依据 according to the measurement result of the reticle laser interference detector. That is, the main control system 7 transmits a control signal to a mechanism assembled to the reticle stage MS, which causes the reticle stage MS to be slightly moved according to the control signal to perform the X position, the Y position, and the rotational position of the reticle Μ. Adjustment. The main control system 7 controls the focus position and the tilt angle of the wafer W by incorporating the surface of the wafer W into the image plane of the projection optical system PL (consistent with the image plane) by the autofocus method and the autoleveling method. . That is, the main control system 7 drives the control circuit to the wafer stage drive 200905409 system 8, and the wafer stage drive system 8 drives the Z stage 2 in accordance with the control signal to adjust the focus position and tilt angle of the wafer W. The main control system 7 controls the X position, the Y position, and the rotational position of the wafer W based on the measurement result of the wafer laser jammer 5. That is, the main control system 7 transmits the control signal to the wafer stage driving system 8, and the wafer stage driving system 8 drives the XY stage 3 according to the control signal to perform the X position, the Y position, and the rotational position of the wafer W. Adjustment. The stepping and repeating method exposes the pattern image of the mask 一起 together in one unit exposure area of the plurality of unit exposure areas set in a matrix on the wafer W. Thereafter, the main control system 7 transmits the control signal to the wafer stage driving system 8, and the wafer stage driving system 8 moves the cymbal stage 3 along the ΧΥ plane to expose another unit of the wafer W. The area is positioned to the projection optical system PL. The action of exposing the pattern image of the mask to the unit exposure area of the wafer W is performed in this manner. In the stepping and scanning mode, the main control system 7 transmits a control signal to the mechanism assembled to the reticle stage MS, and transmits a control signal to the wafer stage driving system 8 so as to follow the projection ratio of the projection optical system PL. The mask stage MS and the XY stage 3 are moved, and the pattern image of the mask is scanned and exposed in one unit exposure area of the wafer W. Thereafter, the main control system 7 transmits the control signal to the wafer stage driving system 8, and the wafer stage driving system 8 moves the cymbal stage 3 along the ΧΥ plane to expose another unit of the wafer W. The area is positioned to the projection optical system PL. In this way, the operation of exposing the mask image of the mask to the unit exposure area of the wafer W is repeated. That is, the stepping and scanning method is performed by using the wafer stage driving system 8 and the wafer laser jammer 5, etc., and the position control of the mask Μ and the wafer W 200905409, along the rectangular shape (generally In the Y direction of the short-side direction of the static exposure region of the slit-like region, the mask holder MS and the XY stage 3 are further moved (scanned) by the mask Μ and the wafer W, and on the wafer W The exposure mask pattern is scanned with a width equal to the width of the long side of the still exposure region and having a length in accordance with the scanning amount (movement amount) of the wafer W. The exposure apparatus of the first embodiment includes a position detecting system 10, a deformation calculating unit 11 and an optical unit for measuring deformation in a unit exposure region of the wafer W with high precision and improving the accuracy of overlapping the pattern on the wafer W. Face shape changing unit 12. The position detecting system 10 detects the complex position of the unit exposure area of the wafer W without passing through the projection optical system PL. The deformation calculating unit 11 calculates the deformation state in the unit exposure region of the wafer W based on the detection result of the position detecting system 10. The optical surface shape changing unit 12 changes the surface shape of at least one of the optical surfaces of the projection optical system PL in order to change the shape of the pattern image (shading pattern) to be exposed on the wafer W, based on the calculation result of the deformation calculating unit 11. As shown in the second figure, the position detecting system 10 includes a plurality of position detecting mechanisms that are arranged two-dimensionally in parallel along the pupil plane. In order to clarify the drawing, the second drawing shows the case where five position detecting mechanisms 10a, 10b, 10c, 10d, and 10e constituting a part of the plurality of position detecting mechanisms of the position detecting system 10 are arranged in parallel. Here, the staggered arrangement is arranged in parallel, and the position detecting mechanism is alternately arranged in the +Y direction and the Y direction from a straight line along the X direction. As shown in the second figure, the adjacent two columns are displayed, that is, the first column including the position detecting mechanisms 10a, 10c, 10e and the second column including the position detecting mechanisms 10b, 10d are displayed, and the position detecting mechanism 10a 10c, 10e are offset from the +Y direction side, and are arranged at the specified intervals in the first column. The position detecting mechanisms 10b, 12 200905409 10d are offset from the -Y direction side, and are arranged at designated intervals on the second column. The five position detecting mechanisms 10a to 10e are configured such that the reference detecting positions 10aa to 10ea enter a rectangular shape 10f which is substantially equal to the unit exposure area of the wafer. In the second drawing, the center of each detection area of the position detecting mechanisms 10a to 10e is used as a reference detection position, and is displayed by a cross mark. - Embodiments The position detection position of all the position detecting mechanisms constituting the position detecting system 1 is within the range i 〇 f. The position detecting mechanisms l〇a to l〇e are the position detecting mechanisms of the imaging mode and have the same basic configuration. The position detecting mechanisms 10 a to 10 e of the imaging mode are reflected from the illumination system 31 by a half 稜鏡 32 as shown in the third figure, and the light exposure is formed in the unit exposure of the wafer w via the first-to-object lens % ❿ illumination. The position detection mark pM of the area. The illumination system may be separately provided at each position detection structure, and also the position detection mechanism. M ff: ί and the light reflected from the position detection mark PM (including the lens lens %, the half prism 32 and the second object) Through the L Ϊ 之 之 : : % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % % The two-object lens 34 is formed by imaging 4, and the surface is described by (4) the detector (light detecting unit). The 诼 诼 电 由 由 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二 二The position detection mark ΡΜ$ is like the photoelectric detection second 庐抨, :: the position detection mark 中心 the center position of the χ coordinates Μ MH the position detection mark ΡΜ position information. CCD phase 10a 10 (10) position information as the position detection mechanism output (further, the output of the position detecting system 1) is supplied to the deformation calculating unit 11 by the 200905409. The deformation calculating unit 11 detects the complex position based on the unit exposure area formed on the wafer w in accordance with the detection result of the position detecting system 10. Mark PM The position information (complex position detection value) is used to calculate the deformation state in the unit exposure region. Specifically, the deformation calculation unit 11 detects the positional deviation amount between the plurality of position detection marks PM formed in the unit exposure region of the wafer W and the reference position, According to the information about the positional deviation amount, the deformation in the unit exposure region is approximated by the non-linear function as defined by the X coordinate and the γ coordinate. Here, it is assumed that the X coordinate and the γ coordinate are defined by the higher order function. The height of the unit exposure area is deformed. The coordinate position of the position detection mark PM (hereinafter referred to as design value) is set to (Dxn, Dyn), and the coordinate position of the position detection mark PM obtained by the actual detection ( The following is called the measured value) (Fxn, Fyn), the factor that deviates from the position between the design value and the measured value, and the variable elements 'a and g~j (variables of the high-order component) using a to f (variables of the primary component) In the case of the variable element, the relationship between the measured value and the design value is expressed by the following formula (1), wherein the η is an integer ' and is detected as a position formed in the unit exposure area. The number of the marker ΡΜ is measured.
Fxn - a b' Dxn + 'e + 8 Dxn2 iDxn Fyn c d Dyn 1 /. 1 hOyn 丁 JDyn\ ⑴ 但是實際上，存在設計值(Dxn, Dyn)與實測值(Fxn, Fyn)之位置偏差量，亦即存在殘餘項（Εχη, Eyn)。考慮殘 餘項之實測值與設計值的關係如公式（2)地表示。 14 (2) 200905409Fxn - ab' Dxn + 'e + 8 Dxn2 iDxn Fyn cd Dyn 1 /. 1 hOyn DJDyn\ (1) But in reality, there is a positional deviation between the design value (Dxn, Dyn) and the measured value (Fxn, Fyn). That is, there are residual items (Εχη, Eyn). The relationship between the measured value of the residual term and the design value is expressed as shown in the formula (2). 14 (2) 200905409
Fxn a b· Dxn Fyn c d Dyn + c f + S Dxn2 + iDxn + Exn J hDyn2 JDyn3 Eyn 此處，公式（2)中之x成分如公式（3)地表示。 »式3]Fxn a b· Dxn Fyn c d Dyn + c f + S Dxn2 + iDxn + Exn J hDyn2 JDyn3 Eyn Here, the x component in the formula (2) is expressed by the formula (3). »式3]
Exn = Fxn — ( ,… iW)……(3) …gW + 此外，就公式(2)中之y成分，亦同樣地如公 地表示。 [數式4] ，yn = Fyn — (cDxn + n + f + jDyn3)……⑷ Υη 田而後，如使用最小平方法，使殘餘項之平方和達到 取’::來決定各$數要素。如以上所述，單位曝光區域内 之變形可使用鬲次函數而近似地表現。 — /另外’使用上述高次函數之近似表現中，高次成 係使用二次成分及三次成分，不過，亦可使用四次成分 以上之咼次成分。此外，單位曝光區域内之變形以查、、曰 之級數展開表示光學系統之波前； 差，亦可耩由極座標表示之函㈣統近似地表現。 此處，所謂位置檢測標記PM之基準位置，係位 檢測標記PM在設計上之位置，或是在形成位置檢測標 ,己PM之後，不經過晶圓處理而計測出 變形算出部η中，近似地函數表現晶圓w:單 區域内的變形’不料是近似地函數表卿成於晶_ 之單位曝光區域内的已經存在之電路圖案的變形。 光學面开> 狀是更部12具有藉由變更投影光學系 PL中之至少-個光學面的面形狀，而變更投影光學系統 15 200905409 PL之像差的功能。以下，將第四圖所示之以2次成像型 的反射折射型之投影光學系統PL為例，說明光學面形 狀變更部12之具體構成例。第四圖之投影光學系統PL 具備：反射折射型之第一成像光學系統G卜其係用於形 成光罩Μ之圖案的中間影像；及折射型之第二成像光學 系統G2’其係用於依據來自中間影像之光，而將光罩圖 案之最後縮小影像形成於晶圓W上。 在從光罩Μ至第一成像光學系統G1的光程中，如 設有由可變形反射鏡構成之平面反射鏡Ml，在從第一 成像光學系統G1至第二成像光學系統G2之光程中，亦 同樣地設有由可變形反射鏡構成之平面反射鏡M2。平 面反射鏡Ml之反射面定位於光罩Μ之附近，平面反射 鏡M2之反射面定位於中間影像之形成位置或其附近之 位置。如第五圖所示，平面反射鏡Ml、M2如具有：具 有表面反射面之反射構件Mia、M2a ;及對應於反射構 件Mia、M2a之反射面，而二維地並列配置之複數驅動 元件 Mlb、M2b。 光學面形狀變更部12除了平面反射鏡Ml、M2之 外，還具備：如共通地設於平面反射鏡Ml與M2之反 射鏡基底12a、與用於各別地驅動複數驅動元件Mlb、 M2b之驅動部12b。驅動部12b依據來自接收變形算出 部11之輸出的主控制系統7之控制信號，個別地驅動 複數驅動元件Mlb、M2b。複數驅動元件Mlb、M2b安 裝於共通之反射鏡基底Ua，藉由彼此獨立之推/拉動 作，而將反射構件Mia之反射面及M2a之反射面變更 成希望的面形狀。 如此，光學面形狀變更部12藉由適宜地變更設於 16 200905409 投影光學錢PL之物體_近位置的平面反射鏡Ml 之反射面，及設於與投影光學系統PL之物體面光學性 共輕之位置或其附近位置的平面反射鏡m2之反射面中 至少-方的面形狀’變更投影光學系統pL之像差狀態， 尤其使其積極發生畸變像差(distQftiGn)。結果，藉由光 學面形狀變更部12之作用，應曝光於晶圓^單位曝 光區域的光罩圖案影像（明暗圖案）之形狀變化。 第六圖係概略顯示纟發明之實施例的曝光方法之 曝光程序的流程圖。以下’為了容易理解本發明 施例之曝光方法係使用第一圖之曝光裝置，將光 之 圖案一起曝光於晶圓W之各單位曝光區域者。來丄 圖，本實施例之曝光方法係將電路圖案已經曝光2經ς 晶圓處理之晶圓W载入（放置）於2载么2上、1 ° 其次，進行晶圓W對投影光學系統！^(; ( ° 之校準（alignment)(S12)。 ） 校準步驟S12係依據關於晶圓霄之外形 一 藉由適宜地驅動XY載台3,而進行晶圓1對、的旦資訊’ 系統PL之預校準（粗精確度之校準）。再者、投影光學 SU如使用第-圖之位置檢測系統1〇，檢測晶校^^驟 複數晶圓校準標記的位置，依據其位置資訊，#W上之 地驅動XY載台3，*進行晶圓W對投影光m 之精密校準（細精確度之校準）。另外，藉矛'統PL 位置檢測步驟S13中，進行晶圓W對投影曰光^其次之 (進而光罩M)之校準（alignment)，亦可少丰系'’充孔Exn = Fxn — ( ,... iW) (3) ... gW + Further, the y component in the formula (2) is also expressed as a public. [Expression 4], yn = Fyn — (cDxn + n + f + jDyn3) (4) Υη Field, then, using the least squares method, the sum of the squares of the residual terms is taken to take ':: to determine each $number element. As described above, the deformation in the unit exposure region can be approximated using the order function. - / In addition, in the approximate expression using the above-mentioned higher order function, the secondary component and the tertiary component are used for the higher order system, but the secondary component of the fourth component or more may be used. In addition, the deformation in the unit exposure area is expanded to indicate the wavefront of the optical system by the number of stages, and the difference can also be expressed by the letter (4) represented by the polar coordinates. Here, the reference position of the position detection mark PM, the position detection mark PM at the design position, or the formation of the position detection mark, after the PM has been measured, the deformation calculation unit η is not subjected to the wafer processing, and the approximation The ground function represents the wafer w: the deformation in a single region 'unexpectedly the deformation of the already existing circuit pattern in the unit exposure region of the crystal. The optical surface opening type has a function of changing the aberration of the projection optical system 15 200905409 PL by changing the surface shape of at least one of the optical surfaces of the projection optical system PL. In the following, a specific configuration example of the optical surface shape changing unit 12 will be described by taking the second-imaging type of the catadioptric-type projection optical system PL shown in Fig. 4 as an example. The projection optical system PL of the fourth figure is provided with: a reflection-refractive type first imaging optical system G for intermediate images for forming a pattern of the mask, and a refractive second imaging optical system G2' for The final reduced image of the mask pattern is formed on the wafer W based on the light from the intermediate image. In the optical path from the photomask to the first imaging optical system G1, such as a planar mirror M1 composed of a deformable mirror, and an optical path from the first imaging optical system G1 to the second imaging optical system G2 Similarly, a plane mirror M2 composed of a deformable mirror is also provided. The reflecting surface of the flat mirror M1 is positioned near the mask Μ, and the reflecting surface of the plane mirror M2 is positioned at or near the position where the intermediate image is formed. As shown in the fifth figure, the plane mirrors M1, M2 have a reflection member Mia, M2a having a surface reflection surface, and a plurality of drive elements M1 arranged in two-dimensionally in parallel with the reflection surfaces of the reflection members Mia, M2a. , M2b. The optical surface shape changing unit 12 includes, in addition to the plane mirrors M1 and M2, mirror bases 12a that are commonly provided to the plane mirrors M1 and M2, and for individually driving the plurality of driving elements M1b and M2b. Drive unit 12b. The drive unit 12b individually drives the plurality of drive elements M1b and M2b in accordance with a control signal from the main control system 7 that receives the output of the distortion calculation unit 11. The plurality of driving elements M1b and M2b are mounted on the common mirror base Ua, and the reflecting surface of the reflecting member Mia and the reflecting surface of the M2a are changed into a desired surface shape by pushing/pulling independently of each other. In this manner, the optical surface shape changing unit 12 appropriately changes the reflection surface of the plane mirror M1 provided at the object_near position of the projection optical money PL of 16 200905409, and is optically lightly attached to the object surface of the projection optical system PL. At least the square surface shape of the reflecting surface of the plane mirror m2 at or near the position changes the aberration state of the projection optical system pL, and particularly causes distortion aberration (distQftiGn). As a result, the shape of the reticle pattern image (shading pattern) exposed to the unit exposure area of the wafer is changed by the action of the optical surface shape changing unit 12. Fig. 6 is a flow chart schematically showing an exposure procedure of the exposure method of the embodiment of the invention. Hereinafter, in order to facilitate the understanding of the exposure method of the embodiment of the present invention, the exposure pattern of the first figure is used to expose the pattern of light to each unit exposure area of the wafer W. For example, the exposure method of the present embodiment is to load (place) a wafer W having a circuit pattern that has been exposed by 2 wafers onto a carrier, and then perform a wafer W to a projection optical system. ! ^(; (alignment of ° (S12).) The calibration step S12 is based on the wafer shape, and the wafer 1 pair is processed by appropriately driving the XY stage 3, and the system PL is performed. Pre-calibration (calibration of coarse precision). Furthermore, the projection optical SU uses the position detection system 1 of the first figure to detect the position of the wafer calibration mark of the crystal calibration, according to its position information, #W The upper ground drives the XY stage 3, * performs precise calibration of the projection light m of the wafer W (calibration of fine precision). In addition, the wafer W is projected by the spear's PL position detecting step S13. ^Second (and then the mask M) alignment, can also be less
Sl2。 略校準步驟 晶圓W之精密校準時’應實施位置檢測之 曰 校準標記，可使用從後述之單位曝光區诗2 &複數晶圓 AM的複數位置 17 200905409 檢測標記PM選出的1個或複數位置撿測標記。經過校 準步驟S12 ’描繪了應轉印之圖案的光罩μ盘已纟<τ<开j 了電路圖案之晶圓W，進而光罩Μ之圖案區域；晶 W之單位曝光區域’經由投影光學系統PL進行光學性 校準。 載入Ζ載台2上之晶圓W的各單位曝光區域中， 如第七圖所示，如形成有在X方向排3列及在γ方 3列之合言十9個LSI的功能元件之電路圖案41。此處， 胃功=牛，係作為！個獨立電子零件之 「ΐ上曝光區域ER之界道線_峋(晶 片間之切斷範圍」的區域）42形 八 記PM。具體而言，在第七圖所示之=數位置檢測標 周邊部，亦即ER的 内侧區域’如形成有合計24個 =卜形邊界線的 此相鄰之2個LSI __標記覆。在彼 24個位置檢測標記卩“。 〈間，如形成有合計 再者，為了使圖式清晰，第 LSI的電路圖案41中 1 ^七圖中亦在省略圖示之 置檢測標記。…I °〇 5 ’形成有1個或複數位 41包含：CPU部上弟八圖之例，系統LSI之電路圖案 41b、I/〇部之電路】：：案二la、SRAM部之電路圖案 A/D部之電路θ c、 AM部之電路圖案41d、 此時，在各電路/、D/A部之電路圖案41f等。 圖案内形成1個=中之任意1個以上的電路 實施例之曝數位置檢測標記PM。換言之，本 區域ER内的功2 1 百先需要在晶圓W上之單位曝光 犯7L牛中之空白區域形成複數位置檢測 200905409 標記PM的標記形成步驟。 另外，只要可在功能元件中之空白區域配置充分數 量之位置檢測標記PM，亦可省略在界道線42上之位置 檢測標記PM。此處’所謂空白區域’係指從晶圓切斷 各LSI晶片後，各LSI晶片内包含之區域，且係未描繪 構成LSI之電路圖案的區域。 第八圖係顯示在各電路圖案41a〜41f之角落部形成 了 1個位置檢測標記PM之例，不過亦可在各電路圖案 41a〜41f内之任意空白區域形成1個或複數位置檢測標 記PM。此外，如第九圖所示，如為包含行解碼器之電 路圖案41g、列解碼器之電路圖案41h、記憶單位之電 路圖案41j等之快閃記憶體的電路圖案41時，可在各電 路圖案41g〜4lj内之電路圖案較為疏鬆的1個部分或複 數部分分別形成位置檢測標記PM。 在用於形成複數位置檢測標記PM之光罩Μ的圖案 區域，描繪對應於9個LSI之電路圖案41的電路圖案’ 在其電路圖案中之空白區域描繪有對應於複數位置檢 測標記PM之複數標記，不過省略圖示。如此，在晶圓 W上之單位曝光區域ER内存在的至少一個功能元件中 之空白區域形成位置檢測標記PM的構成，可將需要數 量之位置檢測標記PM按照需要之分布（如均等分布、 平均分布、密度分布等）而形成於單位曝光區域ER内。 另外，第七圖、第八圖及第九圖係為了圖式清晰，而比 LSI之電路圖案41及各電路圖案41a〜41f，誇張描繪界 道線42之寬度及位置檢測標記PM的大小等。 其次，本實施例之曝光方法係檢測晶圓W之至少一 個單位曝光區域ER内的複數位置檢測標記PM之位置 19 200905409 (S13)。位置檢測步驟S13係藉由驅動XY載台3，而對 位置檢測系統10之檢測範圍l〇f，校準晶圓W之特定 的單位曝光區域ER(S 13a)。而後，藉由位置檢測系統10 之複數位置檢測機構，檢測存在於該單位曝光區域ER 内之複數位置檢測標記PM在晶圓面内方向的位置 (S13b)。此等複數位置檢測標記pm設於該單位曝光區 域ER内存在之至少一個功能元件中的空白區域，進一 步依需要設於功能元件範圍外的空白區域。 檢測步驟S13 b亦可藉由與位置檢測標記p Μ數量等 數之位置檢測機構一起地（大致同時地）檢測單位曝光 區域ER_内之多數個位置檢測標記pm的位置，亦可分 成複數次檢測多數個位置檢測標記PM之位置。此外， 檢測步驟S13b亦可藉由與其等數之位置檢測機構一起 地檢測從單位曝光區域ER内之多數個位置檢測標記 PM選出之複數位置檢測標記pm的位置，亦可分成複 數次檢測。再者，依需要，亦可將晶圓w之其他單位曝 光區域ER校準位置檢測系統1〇之檢測範圍1〇f，反覆 實施該單位曝光區域ER内之複數位置檢測標記PM的 位置檢測（S13c)。另外，在位置檢測步驟S13中，藉由 進行晶圓W對投影光學系統PL (進而光罩M)之^準 (alignment)，亦可省略校準步驟S12。 其次，本實施例之曝光方法係依據在位置檢測步驟 S13所獲得之位置資訊，算出晶圓w之單位曝光區域 ER内的變形狀態（S14)。在變形算出步驟SM，係由接 收位置檢測系統1 〇之檢測結果的變形算出部1 1，笞出 形成於晶圓W之單位曝光區域E R内的複數位置檢測標 記PM與基準位置之位置偏差量，依據關於該位置偏差 20 200905409 量之資訊，近似地函數表現單位曝光區域ER内之變 形。在變形算出步驟S14中算出變形狀態，如係每個成 為位置檢測步驟S13之對象的單位曝光區域進行。 如此，由於位置檢測步驟S13係藉由複數位置檢測 機構如一起地檢測按照需要之分布而形成於單位曝光 區域ER内的需要數量之位置檢測標記PM位置，因此， 可在變形算出步驟S14中，迅速且高精確度地計測（算 出）單位曝光區域ER内之變形，尤其是LSI之電路圖 案内的變形。 其次，本實施例之曝光方法，係依據在變形算出步 驟S14所獲得之變形狀態的資訊，依需要變更應曝光於 晶圓W上的明暗圖案之形狀（S15)。經過晶圓處理專而 晶圓W之單位曝光區域ER變形時，形成於該單位曝光 區域ER之已經存在的電路圖案亦從希望之設計圖案變 形。因此，單位曝光區域ER内之變形狀態超過容許範 圍而變大時，若在該單位曝光區域ER内之已經存在的 電路圖案上，再度照樣曝光新的電路圖案（明暗圖案） 時，則無法在已經存在之電路圖案與新曝光之電路圖案 之間獲得所希望的重疊精確度。 本實施例之曝光方法在形狀變更步驟S15中，係依 據來自主控制系統7之指令，藉由適宜地變更平面反射 鏡Ml及M2中之至少一方反射面的面形狀，而使投影 光學系統PL如積極地發生需要量之畸變像差。結果， 對應於單位曝光區域ER内之已經存在的電路圖案之變 形，而應曝光於該單位曝光區域ER之明暗圖案的形狀 變化。 最後，本實施例之曝光方法係反覆對晶圓W上之各 21 200905409 單位曝光區域er實施投影曝光(S16)。在 域ER中原則上曝光相同電路圖案。因此，⑽曝光區 域服内之變形實質上並非基於晶圓w上之=曝光區 域ER的位置，而主要基於曝光於單位 ^光區 電路圖案的特性時，投影曝光步驟8 ^ =之Sl2. When the precision calibration of the wafer W is performed, the calibration mark for the position detection should be performed. One or plural selected from the unit mark area of the unit exposure area 2 & multiple wafer AM, which will be described later, 2009 05409 Location guess mark. After the calibration step S12' depicts the mask of the pattern to be transferred, the mask has been 纟[τ<opens the wafer W of the circuit pattern, and then the pattern area of the mask ;; the unit exposure area of the crystal W is projected The optical system PL is optically calibrated. In each unit exposure area of the wafer W loaded on the cymbal stage 2, as shown in the seventh figure, functional elements of ten LSIs in which three columns are arranged in the X direction and three columns in the γ direction are formed. Circuit pattern 41. Here, stomach power = cow, as a! For the independent electronic parts, "the boundary line of the upper exposure area ER _ 峋 (the area cut between the wafers)" is 42-shaped. Specifically, the adjacent portion of the y-position detection target portion shown in Fig. 7, that is, the inner region ER of the ER, is formed by the adjacent two LSI __ markups in which a total of 24 padding lines are formed. In the 24 position detection marks "", if the total is formed, in order to make the drawing clear, the detection flag of the circuit pattern 41 of the LSI is also omitted from the figure. 〇5' is formed with one or plural digits 41. The CPU module is shown in the figure of the eighth figure, the circuit pattern 41b of the system LSI, and the circuit of the I/〇 part:: The circuit pattern A of the S1 and SRAM sections. The circuit θ c of the D portion and the circuit pattern 41d of the AM portion, at this time, the circuit pattern 41f of each circuit/D/A portion, etc. The exposure of any one or more of the circuit embodiments is formed in the pattern. The position detection mark PM. In other words, the work in the area ER 2 1 needs to be formed in the blank area of the 7L cattle in the unit exposure on the wafer W to form a mark forming step of the plural position detection 200905409 mark PM. A sufficient number of position detection marks PM are disposed in the blank area of the functional element, and the position detection mark PM on the boundary line 42 may be omitted. Here, the term "small area" means that after cutting each LSI wafer from the wafer, The area contained in each LSI wafer is not depicted The area of the circuit pattern of the LSI. The eighth figure shows an example in which one position detection mark PM is formed in a corner portion of each of the circuit patterns 41a to 41f, but may be formed in any blank area in each of the circuit patterns 41a to 41f. Or a plurality of position detection marks PM. Further, as shown in the ninth figure, the circuit of the flash memory including the circuit pattern 41g of the row decoder, the circuit pattern 41h of the column decoder, the circuit pattern 41j of the memory unit, and the like In the case of the pattern 41, the position detection mark PM can be formed in each of the partial or plural portions in which the circuit patterns in the respective circuit patterns 41g to 41j are loose. The pattern area of the mask 用于 for forming the plurality of position detection marks PM is drawn. The circuit pattern 'corresponding to the circuit pattern 41 of the nine LSIs is depicted with a complex mark corresponding to the complex position detecting mark PM in a blank area in the circuit pattern, but the illustration is omitted. Thus, the unit exposure area on the wafer W The blank area in at least one of the functional elements existing in the ER forms a position detection mark PM, and the required number of position detection marks PM can be distributed as needed (e.g., equal distribution, average distribution, density distribution, etc.) is formed in the unit exposure area ER. In addition, the seventh, eighth, and ninth diagrams are clearer than the LSI circuit pattern 41 and circuits. The patterns 41a to 41f exaggerate the width of the boundary line 42 and the size of the position detection mark PM. Next, the exposure method of the present embodiment detects the complex position detection mark PM in at least one unit exposure area ER of the wafer W. Position 19 200905409 (S13) The position detecting step S13 aligns the specific unit exposure area ER of the wafer W with respect to the detection range l〇f of the position detecting system 10 by driving the XY stage 3 (S 13a). Then, by the plurality of position detecting means of the position detecting system 10, the position of the plurality of position detecting marks PM existing in the unit exposure area ER in the in-plane direction of the wafer is detected (S13b). The plurality of position detecting marks pm are disposed in a blank area in at least one of the functional elements existing in the unit exposure area ER, and are further disposed in a blank area outside the range of the functional elements as needed. In the detecting step S13 b, the position of the plurality of position detecting marks pm in the unit exposure area ER_ may be detected (substantially simultaneously) together with the position detecting means of the number of position detecting marks p , , or may be divided into plural times The position of a plurality of position detection marks PM is detected. Further, the detecting step S13b may detect the position of the plurality of position detecting marks pm selected from the plurality of position detecting marks PM in the unit exposure area ER by the same number of position detecting means, and may be divided into a plurality of times of detection. Furthermore, if necessary, the detection range 1〇f of the other unit exposure area ER of the wafer w may be detected, and the position detection of the plurality of position detection marks PM in the unit exposure area ER may be repeatedly performed (S13c). ). Further, in the position detecting step S13, the alignment step S12 may be omitted by performing alignment of the wafer W on the projection optical system PL (and further the mask M). Next, in the exposure method of the present embodiment, the deformation state in the unit exposure region ER of the wafer w is calculated based on the position information obtained in the position detecting step S13 (S14). In the deformation calculation step SM, the deformation calculation unit 1 1 that receives the detection result of the position detecting system 1 detects the positional deviation between the plurality of position detection marks PM formed in the unit exposure region ER of the wafer W and the reference position. According to the information about the position deviation 20 200905409, the approximate function represents the deformation in the unit exposure area ER. The deformation state is calculated in the deformation calculation step S14, and is performed for each unit exposure region which is the target of the position detection step S13. In this manner, since the position detecting step S13 detects the required number of position detecting marks PM in the unit exposure area ER by the plurality of position detecting means, for example, together, the deformation detecting step S14 can be performed. The deformation in the unit exposure region ER, particularly the deformation in the circuit pattern of the LSI, is measured (calculated) quickly and with high accuracy. Next, in the exposure method of the present embodiment, the shape of the light and dark pattern to be exposed on the wafer W is changed as needed according to the information on the deformation state obtained in the deformation calculation step S14 (S15). When the unit exposure region ER of the wafer W is deformed by the wafer processing, the existing circuit pattern formed in the unit exposure region ER is also deformed from the desired design pattern. Therefore, when the deformation state in the unit exposure region ER exceeds the allowable range and becomes large, if a new circuit pattern (shading pattern) is again exposed on the existing circuit pattern in the unit exposure region ER, the The desired overlap accuracy is obtained between the already existing circuit pattern and the newly exposed circuit pattern. In the shape changing step S15, in the shape changing step S15, the projection optical system PL is caused by appropriately changing the surface shape of at least one of the reflecting surfaces of the plane mirrors M1 and M2 in accordance with an instruction from the main control system 7. If the amount of distortion aberration is actively generated. As a result, corresponding to the deformation of the already existing circuit pattern in the unit exposure region ER, the shape of the light and dark pattern which should be exposed to the unit exposure region ER is changed. Finally, the exposure method of this embodiment repeatedly performs projection exposure on each of the 21 200905409 unit exposure regions er on the wafer W (S16). The same circuit pattern is in principle exposed in the domain ER. Therefore, (10) the deformation in the exposure area is not substantially based on the position of the exposure area ER on the wafer w, but mainly based on the characteristics of the circuit pattern exposed to the unit ^ area, the projection exposure step 8 ^ =
出步驟S14所獲得之1個代表性之單位曝光形算 形狀態，藉由形狀變更步驟S15將投影.風^内的變 像差設定成需要的狀態，而反覆對各單位二;二二L之 實施投影曝光。或是，此時投影曝光步驟s ER 變^出步驟S14所獲得之複數單位曝光區在 狀恝之平均值等，藉由形狀變更步驟Sl5將投影央=形 統PL之像差保持在需要之—^狀態下，g :系 曝光區域ER實施投影曝光。 τ蚤早位 另外，單位曝光區域ER内之變形係基於單 區域ER在晶圓W上之位置（中央位置、周緣耸、: 時，投影曝光步驟S16係依據在晶圓w上之位置不^广 複數單位曝光區域内之變形狀態，使投影光學系統5 = 之像差適宜地變化，並反覆對各單位曝光區域£r實扩 投影曝光。或是，此時投影曝光步驟S16係依據晶圓】 之全部單位曝光區域内的變形狀態，每個單位曝=區 調整投影光學系統PL之像差，並反覆對各單位曝二^ 域ER實施投影曝光。 °°° 如以上所述，本實施例之曝光方法係使用檢測進入 大致等於晶圓W之單位曝光區域ER的範圍内之複數位 置的位置檢測系統（複數位置檢測機構）1〇，檢測設於 單位曝光區域ER内存在之LSI (功能元件）的電$圖 案41中之空白區域的複數位置檢測標記pm在晶圓面^ 22 200905409 方向的位置。而後’依據此等複數位置檢測標記PM之 位置，訊（位置檢測值），算出單位曝光區域ER内之變 形狀態’進而高精確度地計測形成於單位曝光區域ER 之已經存在的電路圖案之變形。 因此’本實施例係藉由對應於單位曝光區域ER内 =經存在的電路圖案之變形，而變更應曝光於單位曝 安，域之明暗圖案的形狀，晶圓w上已經存在之電路圖 案與新曝光之圖案間的重叠精確度提高。如此，本實施 二H光方法可依據以需要之分布所形成的複數位置 二貝二迅速且兩精確度地計測單位曝光區域 之交形，並而精確度地進行圖案在晶圓W上之重疊。 另外’上述實施例係藉由二維地並列配置之複數檢 測光學系統(32〜34)以及與其等數之光電檢測器35而構 成複數位置檢測機構。但是並不限定於此，就位置檢測 機構之數量、配置及構成等，可形成各種改良例。具體 而言’如第十圖所示，可藉由共通地使用於複數位置檢 測標記之位置檢測的1個共通檢測光學系統51，與在共 #檢測光學系統51之檢測範圍内且設於檢測範圍之上 方的複數攝像元件（光檢測器）52而構成複數位置檢測 機構。另外，第十圖之構成例係使用彼此獨立之複數攝 像元件52，不過亦可取代複數個別之攝像元件52，如 使用1個攝像元件之攝像面上的複數區域作為複數光檢 剛器。此外，第十圖之構成例亦可設置複數個共通檢測 光學系統51，或是使第二圖所示之1個或複數位置檢測 機構混合。 此外’如第十一圖所示’可藉由共通地使用於複數 位置檢測標記之位置檢測的1個共通檢測光學糸統5 3， 23 200905409 與為了檢測經由共通檢測光學系統53之光，如由並列 配置個方向的複數攝像元件54a構成之線感測器 (光檢器）54而構成複數位置檢測機構。此時，藉由 XY ^台3之作用，沿著與複數攝像元件54a之排列方 向正父的方向，使晶圓w對共通檢測光學系統53移動， 並掃描檢測複數位置檢測標記之位置。第十一圖之構成 例二亦可設置複數個共通檢測光學系統53，或是在i個 線感測器54中二維地並列配置複數攝像元件5如，或是 並列配置複數線感測器54。 此外，上述實施例係使用攝像方式之位置檢測機 :不過不限定於此，就位置檢測機構之檢測方式可形 種改良例。具體而言，可使用如以缝隙狀之雷射光 差標記之位置檢測標記，藉由以光檢 择，絲自位置檢測標記之散射光，而檢測位置檢測 位置的雷射掃描方式之位置檢測機構。此外，亦 ，：如對晶格標記之位置檢測標記，從2個方向傾斜One representative unit exposure shape calculation state obtained in step S14 is set in the shape change step S15 to the required state in the projection. The wind is repeated for each unit two; Implement projection exposure. Or, at this time, the projection exposure step s ER is changed to the average value of the plurality of unit exposure areas obtained in step S14, and the aberration of the projection center is maintained by the shape changing step S15. In the -^ state, g: the exposure area ER is subjected to projection exposure. In addition, the deformation in the unit exposure area ER is based on the position of the single area ER on the wafer W (the center position, the peripheral edge, and the projection exposure step S16 are based on the position on the wafer w. The deformation state in the wide-area unit exposure area causes the aberration of the projection optical system 5 = to be appropriately changed, and the projection exposure of each unit exposure area is repeated. Alternatively, the projection exposure step S16 is based on the wafer. 】 The deformation state in all unit exposure areas, each unit exposure area adjusts the aberration of the projection optical system PL, and repeatedly performs projection exposure on each unit exposure area ER. °°° As described above, this embodiment The exposure method is an LSI (function) which is detected in the unit exposure area ER by using a position detecting system (complex position detecting means) for detecting a plurality of positions within a range substantially equal to the unit exposure area ER of the wafer W. The position of the complex position detection mark pm of the blank area in the electric pattern $ of the component is in the direction of the wafer surface 22 22, 200905409. Then, the position of the mark PM is detected based on the plurality of positions. The positional detection value is calculated, and the deformation state in the unit exposure area ER is calculated. Further, the deformation of the existing circuit pattern formed in the unit exposure area ER is measured with high accuracy. Therefore, the present embodiment corresponds to the unit exposure. In the area ER = the deformation of the existing circuit pattern, and the change should be exposed to the unit exposure, the shape of the light and dark pattern of the field, and the overlap accuracy between the existing circuit pattern on the wafer w and the newly exposed pattern is improved. In the present embodiment, the H-light method can accurately measure the intersection of the unit exposure regions according to the complex position and the two positions formed by the required distribution, and accurately overlap the patterns on the wafer W. Further, the above embodiment constitutes a complex position detecting mechanism by a complex detecting optical system (32 to 34) arranged in two dimensions and an equal number of photodetectors 35. However, the present invention is not limited thereto, and the position detecting mechanism is not limited thereto. Various modifications can be made in the number, arrangement, configuration, etc. Specifically, as shown in the tenth figure, it can be commonly used for complex position detection. A common detection optical system 51 for detecting the position of the mark constitutes a plurality of position detecting means and a plurality of image pickup elements (photodetectors) 52 provided above the detection range in the detection range of the total detection optical system 51. In the configuration example of the tenth embodiment, the plurality of imaging elements 52 that are independent of each other are used, but a plurality of individual imaging elements 52 may be replaced, for example, a plurality of areas on the imaging surface of one imaging element may be used as a complex optical detector. In the configuration example of the tenth embodiment, a plurality of common detecting optical systems 51 may be provided, or one or a plurality of position detecting mechanisms shown in the second figure may be mixed. Further, 'as shown in FIG. 11' may be commonly used A common detection optical system 5 3, 23 200905409 for detecting the position of the complex position detection mark and a line sensing constituted by the complex imaging element 54a arranged in parallel by the direction in order to detect the light passing through the common detection optical system 53 The device (photodetector) 54 constitutes a complex position detecting mechanism. At this time, the wafer w is moved to the common detecting optical system 53 in the direction orthogonal to the direction in which the plurality of image pickup elements 54a are arranged by the action of the XY stage 3, and the position of the complex position detecting mark is scanned and detected. In the second embodiment of the eleventh embodiment, a plurality of common detection optical systems 53 may be provided, or a plurality of imaging elements 5 may be arranged in parallel two-dimensionally in the i line sensors 54, or a plurality of line sensors may be arranged in parallel. 54. Further, in the above embodiment, the position detecting device using the imaging method is used: However, the present invention is not limited thereto, and the detection method of the position detecting mechanism can be modified. Specifically, a position detecting mark such as a position detecting mark by a slit-like laser light difference mark can be used, and a position detecting mechanism of a laser scanning mode for detecting a position detecting position by detecting light from a position detecting mark by light detection . In addition, also: as the position detection mark for the lattice mark, tilted from 2 directions
j光束’藉由以光檢測器接收來自位置檢測標記之反 ’而相位置檢測標記之位置的晶格校準方式之位 置檢測機構。 此外，上述貫施例係在光學面形狀變更部12中適 =、菱更由可變形反射鏡構成之平面反射鏡The j-beam's position detecting means by means of a lattice calibration method for receiving the position of the phase detecting mark from the opposite side of the position detecting mark by the photodetector. Further, the above-described embodiment is a planar mirror in which the optical surface shape changing unit 12 is configured to be a deformable mirror.
Ml 及 M2 射f之面形狀。但是’不限定於可變形反射鏡，如 >、平行平板玻璃，藉由將其局部變形，而適宜地變更 又:光H统巾之光學面的面形狀。此外，上述實施例 〇光學㈣狀變更部12’係II由適宜地變更平面反射鏡 或M2之反射面的面形狀，而變更投影光學系統pL 差，尤其是使需要量之畸變像差發生，來變更應曝 24 200905409 光於晶圓w之明暗圖案的形狀。但是不限定於此，可藉 由適宜地變更設於投影光學系統之物體面的附近位 置、與物體面光學性共輛之位置或其附近位置、或是投 影光學系統之像面的附近位置之至少一個光學面的面 形狀，實質地不使其他像差發生，而可使需要量之畸變 像差發生。 一般而言，藉由變更投影光學系統中之至少一個光 學面的面形狀’可變更投影光學系統之像差，而使應曝 光於基板之明暗圖案的形狀變化。再者，一般而言，藉 由變更投影光學系統之像差，可使應曝光於基板之明暗 圖案的形狀變化。此外，除了變更投影光學系統之像差 外’或是取代變更投影光學系統之像差，亦可藉由變更 光罩之圖案面的面形狀，而使應曝光於基板之明暗圖案 的形狀變化。 ' 此外，上述之說明，係對將光罩Μ之圖案—起曝光 於晶圓W之各單位曝光區域的一起型之曝光方法，適用 本發明之實施例，不過不限定於此，即使對將光罩Μ 圖案掃描曝光於晶圓W之各單位曝光區域的掃描 曝光方法，同樣地可適用本發明之實施例。不過田之 需要因應掃描曝光中之基板的相對移動，而變更應 於基板之明暗圖案的形狀。 〜曝光 此外，上述說明係對使用描繪了應轉印之圖案、“ 罩Μ之曝光方法，適用本發明之實施例，不過不6光 此，即使對所謂無光罩之曝光方法同樣地可適用於 之實施例。此時，可取代光罩，而使用如依據指定發明 子資料形成指定圖案的圖案形成裝置。另外，圖^之電 裝置如可使用依據指定之電子資料而驅動之^射=成 空 25 200905409 間光調變器（如數位微反射鏡零件等）。使用反射型空 間光調變器之曝光裝置如揭示於美國專利第5523193 號。使用反射型空間光調變器之曝光裝置的情況下，如 可藉由依據在變形算出步驟S14所獲得之單位曝光區域 内的變形狀態，變更形成指定圖案之指定的電子資料， 而使應曝光於基板之明暗圖案的形狀變化。此外，除了 反射型空間光調變器之外，亦可使用透過型空間光調變 器，亦可使用自發光型之圖像顯示元件。 用於實施上述實施例之曝光方法的曝光裝置，藉由 保持指定之機械性精確度、電性精確度、光學性精確度 地組合包含上述各構成要素之各種子系統而製造。為了 確保此等各種精確度，在該組合之前後，就各種光學系 統進行用於達成光學性精確度的調整，就各種機械系統 進行用於達成機械性精確度的調整，就各種電性系統進 行用於達成電性精確度的調整。從各種子系統組合成曝 光裝置之步驟，包含各種子系統相互之機械性連接、電 路之配線連接及氣壓回路之配管連接等。在從該各種子 系統組合成曝光裝置之步驟前，當然有各子系統之各個 組合步驟。各種子系統組合成曝光裝置之步驟結束後， 進行綜合調整，以確保曝光裝置全體之各種精確度。另 外，曝光裝置之製造應在溫度及潔淨度等受到管制之潔 淨室内進行。 上述實施例之曝光方法，可藉由使用投影光學系統 將圖案曝光於感光性基板（曝光步驟），而製造電子零 件（半導體元件、攝像元件、液晶顯示元件、薄膜磁頭 等）。以下，就藉由使用本實施例之曝光方法而在作為 感光性基板之晶圓等上形成指定之電路圖案，而獲得作 26 200905409 為電子零件之半導體零件時的一種方法，參照第十二圖 之流程圖作說明。 首先，在第十二圖之步驟301中，在1批晶圓上蒸 鍍金屬膜。在其次之步驟302中，在其1批晶圓上之金 屬膜上塗布光阻。其後，在步驟303中，使用本實施例 之曝光方法，而將光罩上之圖案影像經由其投影光學系 統，依序曝光轉印於其1批晶圓上的各照射區域。其後， 在步驟304中，進行其1批晶圓上之光阻的顯像後，在 步驟305中，藉由在其1批晶圓上，將抗蝕圖案作為光 罩進行蝕刻，而將對應於光罩上之圖案的電路圖案形成 於各晶圓上之各照射區域。 其後，藉由進行更上層之電路圖案形成等，而製造 半導體元件等之零件。採用上述半導體零件製造方法 時，可通量佳地獲得具有微細之電路圖案的半導體零 件。另外，步驟301〜步驟305係在晶圓上蒸鍍金屬，在 其金屬膜上塗布抗蝕劑，而後進行曝光、顯像及蝕刻各 步驟，不過，當然亦可在此等步驟之前，於晶圓上形成 矽之氧化膜後，在其矽之氧化膜上塗布抗蝕劑，而後進 行曝光、顯像、蝕刻等之各步驟。 此外，本實施例之曝光方法亦可藉由在板（玻璃基 板）上形成指定之圖案（電路圖案、電極圖案等），而 獲得作為電子零件之液晶顯示元件。以下，參照第十三 圖之流程圖，就此時之一種方法作說明。第十三圖中， 圖案形成步驟401係執行所謂光微影步驟，使用本實施 例之曝光方法，將光罩之圖案轉印於感光性基板（塗布 了抗蝕劑之玻璃基板等）。藉由該光微影步驟，而在感 光性基板上形成包含多數個電極等之指定圖案。其後， 27 200905409 離步驟等各牛Ϊ 彳步驟、抗钱劑剝 至各ί驟，而在基板上形成指定之圖案，並轉移 至，、—人之衫色濾光器形成步驟402。 其次，彩色濾光器形成步驟402係將對應於r 狀、！Vf (綠）、B (藍）之3個點的許多組排列成矩陣 :2疋，將R、G、B之3條帶的濾光器之組複數地 M於水平掃描線方向，而形成彩色遽光器。而後，在 f色濾光器形成步驟402之後，執行單位組合步驟4〇3。 單位級合步驟4〇3係使用以圖案形成步驟4〇1所獲得之 具f指定圖案的基板，及以彩色濾光器形成步驟4〇2所 獲得之彩色濾光器等而組合液晶面板（液晶單位）。 單位組合步驟403如係在以圖案形成步驟4〇丨所獲 得之具有指定圖案的基板，及以彩色濾光器形成步驟 4〇2所獲得之彩色濾光|§之間注入液晶，而製造液晶面 板（液晶單位）。其後，以模組組合步驟4〇4安裝使組 合之液晶面板（液晶單位）進行顯示動作之電路、背光 等各零件，而完成浪晶顯示元件。採用上述液晶顯示元 件之製造方法時，<通量佳地獲得具有微細之電路圖案 的液晶顯示元件。 以上係配合圖式説明本發明之實施例’不過本發明 不限定於上述，亦<在附加之申請專利範圍及等價物之 範圍内作變更。 【圖式簡單說明】 第一圖係用於實施本發明之實施例的曝光方法之 曝光裝置的概略圖。 第二圖係第一 _之位置檢測系統的内部概略圖。 28 200905409 第三圖係構成第一圖之位置檢測系統的各位置檢 測機構之内部概略圖。 第四圖係第一圖之投影光學系統的二次成像、反射 折射型之投影光學系統的概略圖。 第五圖係第一圖之光學面形狀變更部之内部概略 圖。 第六圖係本發明之實施例的曝光方法之曝光程序 的流程圖。 第七圖係形成了複數LSI之電路圖案及複數位置檢 測標s己的晶圓之早位曝光區域的4旲式圖。 第八圖係形成於系統LSI之電路圖案中的空白區域 之複數位置檢測標記的模式圖。 第九圖係形成於快閃記憶體之電路圖案中的空白 區域之複數位置檢測標記的模式圖。 第十圖係位置檢測系統之改良例的概略圖。 第十一圖係位置檢測系統之另外改良例的概略圖。 第十二圖係半導體零件之製造方法的流程圖。 弟十二圖係液晶顯不元件之製造方法的流程圖。 29 200905409 【主要元件符號說明】 1 照明系統 2Z 載台 3XY 載台 4 移動鏡 5 晶圓雷射干擾儀 6 基座 7 主控制系統 8 晶圓載台驅動系統 10 位置檢測糸統 10a,10b,10c,10d,10e 10aa, 10ba, 10ca, 10da, 10ea 10f 檢測範圍 11 變形算出部 12 光學面形狀變更部 12a 反射鏡基底 12b 驅動部 31 照明系統 32 半稜鏡 33 第一對物透鏡 34 第二對物透鏡 35 CCD相機 41 LSI之電路圖案 41a CPU部之電路圖案 41b SRAM部之電路圖案 41c I/O部之電路圖案 41d DRAM部之電路圖案 位置檢測機構 基準檢測位置 30 200905409 41e A/D部之電路圖案 41f D/A部之電路圖案 41g 行解碼器之電路圖案 41h 列解碼器之電路圖案 41j 記憶單位之電路圖案 42 界道線 51 共通檢測光學系統 52 攝像元件 53 共通檢測光學系統 54 線感測器 54a 攝像元件 ER 單位曝光區域 G1 第一成像光學系統 G2 第二成像光學系統 IL 曝光之光 M 光罩 Ml 平面反射鏡 M2 平面反射鏡 Mla,M2a 反射構件 Mlb，M2b 驅動元件 MS 光罩載台 PL 投影光學系統 PM 位置檢測標記 W 晶圓 31Ml and M2 shoot the surface shape of f. However, it is not limited to the deformable mirror, such as >, the parallel plate glass, and the surface shape of the optical surface of the light H is appropriately changed by locally deforming it. Further, in the above-described embodiment, the optical (four)-shaped changing portion 12' is configured to appropriately change the surface shape of the reflecting surface of the plane mirror or the M2, and to change the difference in the projection optical system pL, in particular, to cause a necessary amount of distortion aberration to occur. The change should be exposed to the shape of the light and dark pattern on the wafer w. However, the present invention is not limited thereto, and it is possible to appropriately change the position in the vicinity of the object surface of the projection optical system, the position at or near the optical position of the object surface, or the position near the image plane of the projection optical system. The surface shape of at least one of the optical surfaces substantially does not cause other aberrations to occur, and the required amount of distortion aberration can occur. In general, by changing the surface shape of at least one of the optical surfaces in the projection optical system, the aberration of the projection optical system can be changed, and the shape of the light and dark pattern to be exposed on the substrate can be changed. Further, in general, by changing the aberration of the projection optical system, the shape of the light and dark pattern to be exposed to the substrate can be changed. Further, in addition to changing the aberration of the projection optical system, or by changing the aberration of the projection optical system, the shape of the light and dark pattern to be exposed on the substrate can be changed by changing the surface shape of the pattern surface of the mask. Further, the above description is directed to an exposure method in which the pattern of the mask is exposed to each unit exposure region of the wafer W, and the embodiment of the present invention is applied, but the present invention is not limited thereto, and even if The mask Μ pattern scanning exposure exposure method for each unit exposure area of the wafer W is similarly applicable to the embodiment of the present invention. However, Tian Zhi needs to change the shape of the light and dark pattern of the substrate in response to the relative movement of the substrate in the scanning exposure. In addition, the above description is applied to the embodiment in which the pattern to be transferred and the method of exposure of the cover are applied, but the invention is not limited to light, and the same can be applied to the exposure method of the so-called matte. In this case, instead of the reticle, a pattern forming device such as a predetermined pattern can be formed according to the specified invention sub-material. In addition, the electric device can be driven by using the specified electronic data. Chengkong 25 200905409 Inter-mode modulator (such as digital micro-mirror parts, etc.). Exposure apparatus using a reflective spatial light modulator is disclosed in U.S. Patent No. 5,523,193. Exposure apparatus using a reflective spatial light modulator In the case of the deformation state in the unit exposure region obtained in the deformation calculation step S14, the specified electronic material of the designated pattern can be changed, and the shape of the light and dark pattern to be exposed on the substrate can be changed. In addition to the reflective spatial light modulator, a transmissive spatial light modulator can also be used, or a self-illuminating image display element can be used. The exposure apparatus of the exposure method of the above embodiment is manufactured by combining various subsystems including the above-described constituent elements while maintaining specified mechanical precision, electrical accuracy, and optical precision. To ensure such precision Degree, after the combination, various optical systems are used to achieve optical precision adjustment, and various mechanical systems are used to achieve mechanical precision adjustment, and various electrical systems are used to achieve electrical accuracy. Degree adjustment. The steps of combining various subsystems into an exposure device include mechanical connection of various subsystems, wiring connection of circuits, piping connection of pneumatic circuits, etc. Before the steps of combining the various subsystems into an exposure device There are of course various combinations of subsystems. After the steps of combining the various subsystems into an exposure device, comprehensive adjustments are made to ensure various precisions of the exposure device. In addition, the exposure device should be manufactured in temperature and cleanliness. In a controlled clean room. The exposure method of the above embodiment can be The pattern is exposed to a photosensitive substrate (exposure step) by a projection optical system to produce an electronic component (a semiconductor element, an image pickup element, a liquid crystal display element, a thin film magnetic head, etc.). Hereinafter, the exposure method of the present embodiment is used. A method for forming a predetermined circuit pattern on a wafer or the like of a photosensitive substrate, and obtaining a semiconductor component as an electronic component 26 200905409 is described with reference to a flowchart of Fig. 12. First, in the twelfth figure In step 301, a metal film is deposited on one batch of wafers. In the next step 302, a photoresist is coated on the metal film on one of the wafers. Thereafter, in step 303, the embodiment is used. Exposure method, wherein the pattern image on the reticle is sequentially exposed to each of the irradiation areas of the batch of wafers via the projection optical system. Thereafter, in step 304, the wafers are printed on the batch of wafers. After the photoresist is developed, in step 305, a circuit pattern corresponding to the pattern on the photomask is formed on each wafer by etching the resist pattern as a mask on one of the wafers. It Irradiation region. Thereafter, a component such as a semiconductor element is manufactured by performing circuit pattern formation or the like of the upper layer. When the above semiconductor component manufacturing method is employed, semiconductor parts having a fine circuit pattern can be obtained with high throughput. In addition, steps 301 to 305 are performed by depositing a metal on a wafer, applying a resist on the metal film, and then performing the steps of exposure, development, and etching, but of course, before the steps, After forming an oxide film of tantalum on the circle, a resist is applied onto the oxide film of the tantalum, and then each step of exposure, development, etching, and the like is performed. Further, the exposure method of the present embodiment can also obtain a liquid crystal display element as an electronic component by forming a predetermined pattern (a circuit pattern, an electrode pattern, or the like) on a board (glass substrate). Hereinafter, a method at this time will be described with reference to the flowchart of the thirteenth diagram. In the thirteenth diagram, the pattern forming step 401 performs a so-called photolithography step, and the pattern of the mask is transferred to a photosensitive substrate (a glass substrate coated with a resist or the like) by the exposure method of the present embodiment. By the photolithography step, a predetermined pattern including a plurality of electrodes or the like is formed on the photosensitive substrate. Thereafter, 27 200905409 is separated from the steps of the calf and the anti-money agent, and the specified pattern is formed on the substrate, and transferred to the human shirt color filter forming step 402. Second, the color filter forming step 402 will correspond to the r shape,! A plurality of groups of three points of Vf (green) and B (blue) are arranged in a matrix: 2 疋, and a plurality of filters of three bands of R, G, and B are collectively M in a horizontal scanning line direction to form Color chopper. Then, after the f color filter forming step 402, the unit combining step 4〇3 is performed. The unit level combining step 4〇3 uses a substrate having the f designation pattern obtained by patterning the step 4〇1, and a color filter obtained by the color filter forming step 4〇2 to combine the liquid crystal panels ( LCD unit). The unit combination step 403 is performed by injecting liquid crystal between the substrate having the specified pattern obtained by the pattern forming step 4 and the color filter obtained by the color filter forming step 4〇2. Panel (liquid crystal unit). Thereafter, the components such as the circuit and the backlight for performing the display operation of the combined liquid crystal panel (liquid crystal unit) are mounted in the module combination step 4〇4 to complete the wave crystal display element. When the above-described method for producing a liquid crystal display element is employed, a liquid crystal display element having a fine circuit pattern is preferably obtained by flux. The embodiments of the present invention are described above with reference to the drawings, but the present invention is not limited to the above, and is intended to be modified within the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS The first drawing is a schematic view of an exposure apparatus for carrying out an exposure method of an embodiment of the present invention. The second figure is an internal overview of the first position detection system. 28 200905409 The third figure is an internal schematic diagram of each position detecting mechanism constituting the position detecting system of the first figure. The fourth drawing is a schematic view of a secondary imaging and reflection-refractive projection optical system of the projection optical system of the first figure. The fifth drawing is an internal schematic view of the optical surface shape changing portion of the first drawing. Fig. 6 is a flow chart showing an exposure procedure of the exposure method of the embodiment of the present invention. The seventh figure is a four-dimensional diagram in which the circuit pattern of the plurality of LSIs and the early exposure region of the wafer of the plurality of position detection marks are formed. The eighth diagram is a pattern diagram of a plurality of position detecting marks formed in a blank area in the circuit pattern of the system LSI. The ninth diagram is a pattern diagram of the plurality of position detecting marks of the blank area formed in the circuit pattern of the flash memory. The tenth diagram is a schematic diagram of a modified example of the position detecting system. The eleventh diagram is a schematic view of another modified example of the position detecting system. The twelfth figure is a flow chart of a method of manufacturing a semiconductor component. 12 is a flow chart of a method for manufacturing a liquid crystal display element. 29 200905409 [Description of main component symbols] 1 Lighting system 2Z Stage 3XY Stage 4 Moving mirror 5 Wafer laser jammer 6 Base 7 Main control system 8 Wafer stage drive system 10 Position detection system 10a, 10b, 10c 10d, 10e 10aa, 10ba, 10ca, 10da, 10ea 10f Detection range 11 Deformation calculation unit 12 Optical surface shape changing unit 12a Mirror base 12b Driving unit 31 Illumination system 32 Half 稜鏡 33 First object lens 34 Second pair Object lens 35 CCD camera 41 LSI circuit pattern 41a CPU circuit circuit pattern 41b SRAM portion circuit pattern 41c I/O portion circuit pattern 41d DRAM portion circuit pattern position detecting mechanism reference detection position 30 200905409 41e A/D portion Circuit pattern 41f D/A circuit pattern 41g Row decoder circuit pattern 41h Column decoder circuit pattern 41j Memory unit circuit pattern 42 Border line 51 Common detection optical system 52 Imaging element 53 Common detection optical system 54 Line sense Detector 54a imaging element ER unit exposure area G1 first imaging optical system G2 second imaging optical system IL exposure M Ml reticle plane mirror plane mirror M2 Mla, M2a reflective member Mlb, M2b MS mask stage driving element of the projection optical system PL PM position detection mark 31 of the wafer W
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8896814B2 (en) | 2009-09-29 | 2014-11-25 | Carl Zeiss Smt Gmbh | Catadioptric projection objective comprising deflection mirrors and projection exposure method |
| TWI472885B (en) * | 2009-06-16 | 2015-02-11 | V Technology Co Ltd | Alignment method, alignment apparatus and exposure apparatus |
-
2008
- 2008-04-07 CN CN200880011418A patent/CN101652719A/en active Pending
- 2008-04-08 TW TW097112621A patent/TW200905409A/en unknown
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI472885B (en) * | 2009-06-16 | 2015-02-11 | V Technology Co Ltd | Alignment method, alignment apparatus and exposure apparatus |
| US8896814B2 (en) | 2009-09-29 | 2014-11-25 | Carl Zeiss Smt Gmbh | Catadioptric projection objective comprising deflection mirrors and projection exposure method |
| US9274327B2 (en) | 2009-09-29 | 2016-03-01 | Carl Zeiss Smt Gmbh | Catadioptric projection objective comprising deflection mirrors and projection exposure method |
| US9459435B2 (en) | 2009-09-29 | 2016-10-04 | Carl Zeiss Smt Gmbh | Catadioptric projection objective comprising deflection mirrors and projection exposure method |
| US9817220B2 (en) | 2009-09-29 | 2017-11-14 | Carl Zeiss Smt Gmbh | Catadioptric projection objective comprising deflection mirrors and projection exposure method |
| US10120176B2 (en) | 2009-09-29 | 2018-11-06 | Carl Zeiss Smt Gmbh | Catadioptric projection objective comprising deflection mirrors and projection exposure method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101652719A (en) | 2010-02-17 |
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