200836318 九、發明說明： 【發明所屬之技術領域】 【0001】 本發明係有關於各種電氣機器所使用白勺半導體封裝（阳冰呢e) 用線路基板，特別是有關於應用在_顯示器（如㈣ 膜覆晶封裝（C0F)用線路基板及其製造方法。 、彳 【先前技術】 【0002】 近年來’電子機器的小型化、輕量化、高性能化非常驚人， 在半導體零件的實際組裝方法上也有人提出可能的更高密度的實 IV、、'且衣方法，有-部分現正實施中。這樣進行的實際喊方法中 ^個是薄膜覆晶封裝（Chip Qf Fllm ; _，主要是作為液晶 顯不器的驅動程式半導體封裝而使用著。 【0003】 所謂細覆晶封裝，係在膜承載帶咖）上 直接搭載半導體零件’所使用的縣載帶稱為薄膜覆晶封裝用線 路基板。此薄膜覆晶封制線路基板姻醯亞胺薄膜（__此 =)等的絕緣薄膜的單側面上，形成有金屬線路的薄型膜基板。 桃復晶封制線路基板的主要構造，係搭載半導體零件的區 域、和具有與半導體零件的電極墊（electr〇depad)接合的内引 (nner lead)、及與外部電極接續的外引腳（⑽er化⑷的 線路等所構成的。 5 200836318 【0004】 過去的薄膜復S曰封裝用線路基板的線路圖型在附圖五作為例 不。具有像這樣的線路圖型的細覆晶封裝用線路基板，係如附 圖六所示方法而製造的。 首先，如附圖六（a)所示，在聚醯亞胺膜丄上，用銅箱2層積 而成基材，在銅箔2的表面上形成光阻層3。 然後，在已形成之光阻層3處，以屏蔽（mask)《未有圖示》 為介質’照射紫外線’使預期的圖型（pattern)感光（附圖六⑹）。 然後，將光阻層顯影，形成光阻圖型4 (Ph〇toresist pattern)(附圖六（c))。 然後，將光阻圖型4的開口部分露出的銅加以酬，形成 銅線路圖型5 ’其後，移除光阻圖型（附圖六⑷）。 接下來’在鱗路圖型5的表面上，形顧來接合半導體零 件電極墊的鑛錫或鍵金層6 (附圖六（e))。 然後，在最後’使内弓|腳和外引腳露出，形成所要的保護阻 抗膜（沒有圖示）。 【0005】 像這樣製造出來的薄膜覆晶封裝用線路基板，為了搭載半導 1件7藉由在半導體零件7的電極墊所形成的突起（乜卿） 8與薄膜覆晶封仙線路基板之内引㈣接合而實施，然後用樹 脂丄0將這些加以封裝，如_七所示，得到半導體設備。 6 200836318 【0006】 *限::二備:。’:::_件的運作產生的_ ’並 ，軸㈣鮮_邮= 環境中。此種散熱不充緣=質’將熱散放到周圍 體零件運作砰。目此’轉^件=騎積賴而導致半導 ~，#+^ 體轉纽賴要如何有效率地發 政，對+導體設備而言，成為重要的問題。 【發明内容】 【本發明所欲解決的問題】 【0007】 '明的厚膜復晶封裝用線路基板，採取在半導體零件的表 面’用熱傳導軸金屬為低的封额脂和?練亞胺膜的材質所成 的構化結果從半導體零件表_散熱效率—般娜低。又，因 為半導體讀的運摘產生的熱，彳發生點平面地發散，局 部區域的溫度轉㈣的太高，有職的問題。 【0008】 +特別π，由於近年來喃示器大型化、高解像度化，半導體 牛勺驅動包壓及運作頻率數變高，因此，從半導體零件而來的 200836318 發熱量大大地增加起來。再加上，由於薄膜覆晶封農用線路其板 •的線路要求微細化，内引腳的寬度變成例如15微米程度的細二、， 經由㈣腳的散熱效率逐漸降低。因此，半導體賴的散熱方法 逐漸演變成一個嚴重的問題。 【0009】 以前’為了結構性地改善這樣的半導體設備的散熱效率而作 為建議的’係：絕緣膜、及配置在該絕緣膜的—側的表面上的線 路、及配置在前舰緣膜的前述—面之相對面的—個或複數 個半導體料、及配置在前述絕緣體膜㈣—方的表面的散敎材 料，具備這些的半導體設備（日本國特開齡簡咖號公報、 段落【0021】參照）。亦即’於該專利文獻中所提出的薄膜覆晶封 裝，係將聚酿亞胺膜介於其間，在半導體晶片的電極塾側配設散 熱板，以該當聚醯亞胺膜為介質，改善散熱性。 【0010】 此種構造可以設置比轉體零件鼓的散驗，其優點是： 使用較大的》板’較容緖到良好的散熱性。但是，由於配置 散熱板，薄膜覆晶雖的厚度和重量簡加了，絲反而血薄膜 覆晶封裝的小型化、輕量化的潮騎道而行，還有，在薄膜覆晶 封裝用線路基板的製造作業中，必須新增地附加配設散熱板，成 為成本提高的主因。 【0011】 200836318 本發明之目的，滿足對薄職晶封裝的小型化、輕量化的要 求’並且，；要像配設前述散驗那樣⑽增附加作業，而能 提供具有高散熱性的薄膜覆晶縣輯路基板及其製造方法，以 及提供制本發明之薄職晶封裝用線路基板_膜覆晶封裝作 為目的。 【解決問題所採的方法】 【0012】 壯=了達成前述目的，本第-發明，係在絕_單側的表面， 有：㈣腳（無搭載之半物零件表面職設的電極塾 。及外引腳（與搭載薄膜覆晶封裳的外部基板的端 的線路的薄膜覆晶封裝用線路基板， "} 定恧侁由 在釔载則述半導體晶片的預 _^，沒有内引腳的部份’配置散熱板A，以此為特徵。、 然後，本第二發明，前述第一發明再加上 體晶片的預定區域外的區域，沒有 、導 散熱板B和前述散熱板A連結起來⑽裝設散編，此 [Q014] U叹鱗徵。 =1： ’轉三發明，前述散細a 削迷線路相同的材料所構成，以此為特徵。放”、、板β，係由與 【0015】 9 200836318 然後，本第四發明，係藉由前第一發明的薄膜覆晶封裝用線 路基板製造方法。前述散熱板A，及包含内引腳和外引腳的、線路， 藉由減少法（subtractive)、加多法（additive)、半加多法 (semi-additive)之中的任一方法整體形成，以此為特徵。 【0016】 然後，本第五發明，係藉由前第二或第三發明的薄膜覆晶封 裝用線路基板製造方法。前述散熱板A和前述散熱板B，及包含内 引腳和外引腳的線路，藉由減少法（subtractive)、加多法 (additive)、半加多法（semi-additive)之中的任一方法敕體 形成，以此為特徵。 【0017】 然後，本第六發明，係應用依據前述第一至第三 — ^仕一發明 勺溥膜覆晶封裝用線路基板所做成之半導體設備。 【發明之成果】 【0018】 壯如前述之本發明薄膜覆晶封裝用線路基板上，在薄糊 衣用線路基板的半導體零件預定__内 處，形成散熱板A，有必要的話，在搭載半導體曰 腳的 部份處，贿散熱板^結 政熱板A和散熱糾，係形成在含有内引腳和柯聊= 200836318 -等的線路的同—平面上。因此，半導體零件產生賴，不只有 内引腳’連散熱板A和B也_散，散熱效果也因此提高。因此， 本毛月之細覆晶封仙線路基板比過去的產品，其散埶 高’使用本發明之_㈣龍職祕板的話，可轉到散熱 效果报咼的薄膜覆晶封裝。 【0019】 、又，依據本發明之方法，散熱板A和散熱板B、和具有内引 腳和外引腳的線路’因為變更所用屏蔽，藉由減少法 (subtractlve)、加多法⑽出ve)、半加多法（semi_addltive) 之中的任-方法，就可以總括地整體形成。因此，過去的薄膜覆 晶封裝用線路基板製造作針，就沒有必要例如追加新增作業或 使用㈣料、或變更作業等。所以，用過去相同程度的製造成本 就能完成’可以提供不會有經濟性損害、散熱性良好的薄膜覆晶 封裝用線路基板。 【實施方式】 【本發明之最佳實施例】 【0020】 依據本發明之第-實施狀態，在_—，用薄膜覆晶封裝用 線路基板，偏薄職晶封裝躲路基板線路部分_的半導體 設備，搭載著沿著其A-A線位置的半導體零件7的狀態之放大切 面圖，係例示於附圖二。 200836318 • 在附圖—，η係内引腳、！2係外引腳、i 3係具有内引 腳—Η丨腳的線路、用虛線圍起來的部份14係搭載半導體零件 ‘的版區域、i 5顧域i 4的中央部份（未配置内引腳U的 抽）所裝設的散熱板A。錢，如前述，散熱板丄5，，因為和具 有内引腳1 1和外引腳丨2的線路丨3在同—平面上組成，伴隨 ^半導體零件的運作所產生的熱，不僅是内引附i，也傳導至 散熱板15，從散熱板15也能散熱。 【0021】 附圖三’係依據本發明之第二實施狀態之薄膜覆晶封裝用線 路基板線路部分圖型的例示。本實施例中，附圖一所示實施例再 加上’在喊半導體零件的預定區域i 4以外的區域、沒有配設 、水1 3的抑處’ &没散熱板1 6⑻。然後，先將散熱板1 5和散熱板1 6連結（參照關三⑹），傳導至散熱板丨5的熱 的一部分就傳導至散熱板丄6，從散熱板工6也可以散熱。因此 散熱效果更加提高。 【0022】 其次’關於本發明之薄膜覆晶封裝用線路基板的製造方法， 利用附圖四加以說明。 附圖四’係為了容易瞭解細覆晶封制線路基板的製造方 法，以主要作業之切面作為例示。 、 首先’如附圖四(a)所示，在聚醯亞胺薄膜1和銅落2所做成 12 200836318 的基材表面上，形成光阻層（ph〇t〇resist) 3。 接著，在所形成的光阻層3，以屏蔽（腿冰）為介質，照射 紫外線，使職的圖型（pattern)感光（附圖四_。作為此時 所用的屏蔽關，係使用在成品線關形巾，裝設在搭載半導體 零件區域1 4内且沒有㈣i的區域的散熱板i 5所編組構 成的。 "然後’與過去_職晶封制線路基板製造方法相同，將 光阻層3顯影，形成光阻圖型4 (phcDtoresist pattern)(附圖 四（C))〇 然後’將光阻圖型4的開口部分露出的銅猪2加以侧，形 成銅線路圖型5，其後，移除光阻圖型4 (附圖四⑷）。 接下來’在崎路_ 5的表社，職絲接合半導體零 件電極墊的錫或金等的鑛金屬層6 (關四糾。 ▲然後’在最後，形成露出㈣腳和外引腳的符合預期的保護 阻抗膜（沒有圖示）。 【0023] 將關四和_五，與前述過去技術之附圖六做比較的話， 除了所用的屏蔽圖形改變以外， 卫，又有增加重大變更，可以判明 戶。明用攸則技術仍可能得到本發 7 Θ之缚膑覆晶封裝用線路基板。 ，不舄要新的製造材料，也可以判明。 而且’前述之實施例，係藉由減少法所製造的本發明之薄膜 200836318 覆晶封裝用線路基板，但是不用說，即使是用一般已知的加多、去 / 或半加多法也同樣能製造。 【0024】 【實施例】 在市售的厚度35微米聚醯亞胺膜的單側面裝設有厚度8微米 銅箔的銅聚醯亞胺基板（住友金屬礦山公司製造，製品名：& perflex)的銅ϋ表面上，塗佈液狀阻抗層，以具有所示的 形成線路1 3和散5的圖型的屏蔽為介f，照射紫外線。 然後，將之顯影，得到蝕刻用的光阻圖型。 、，其-人’使用以氯化銅（eQpperehlQride)為主成分的钱刻液， 將光阻層開口部分露出來的銅落，藉祕刻除去，然後除去殘存 的光阻圖型，在聚輕賴的表面做成線路U和散熱板1 $。 :後’使用鍍錫液，將内弓_施與鍍鍚，得到_ 、商用膜覆晶封裝用線路基板。並且，在前述各作業中、 ^ H條件、時間條件等，係-般所熟知者。 部<八作Γ希讀到只有㈣腳部份、外引腳部份等成為必要 ::rp分’塗佈阻焊輪一 ^ 化㈣叫權C、—下，使阻焊二 14 200836318 接下來，在所得到之薄職晶封伽線路基板的内引腳處， ^能接合在半導體零件之電極較起（_)，加魏置、加熱非 Μ接（solderless)、樹脂封褒’做成如附圖二所示之構造的半 導體設備。此半導體設備的運作狀態，侧後沒有異常。 【_】 【比較例】 接下來，線路部分，使用與附圖一的線路圖型相同，只是沒 有散熱板1 5的_的屏蔽，其他均與前述實施例相同方法，做 成薄膜覆晶封裝用線路基板。 d後所知到之薄膜覆晶封裝用線路基板的内引腳處，要能 接合在半導體零件之電極的突起（bump)，加以配置、加熱非焊壓 接（solderless)、樹脂封裝，做成如附圖二所示之構造的半導體 設備。此半導體設備的運作狀態，蝕刻後沒有異常。 【0027】 然後，將前述實施例之半導體設備、和比較例之半導體設備， 各別搭載於相同的印刷電路板，各別給予相同的負荷，比較半導 體設備的表面溫度。其結果，實施例之半導體設備的溫度，係100 C ’比較之半導體設備的溫度，係120°C，如果使用依據本發明而 得的薄膜覆晶封裝用線路基板的話，可以防止半導體設備溫度約 有20 C的上昇，已經判明了。 15 200836318 【圖式簡單說明】 : 【0028】 ， 【圖―】係顯示依據本發明第—實施狀態之薄職晶封裝用線 路基板之線路部分的圖型的平面圖。 【圖二】係在相當關-之心Α_£，搭載有半導體零件的 狀態的放大切面圖。 【圖三】(a)係顯示依據本發明第二實施狀態之薄膜覆晶封裳 # 用線路基板之線路部分的圖型的平面圖； (b)係散熱板的放大平面圖。 【圖四】係顯示本發明相關之薄膜覆晶封裝用線路基板之製造 作業的主要作業部分之切面圖。 【圖五】係從前的薄膜覆晶封裝用線路基板之線路圖型的例 示平面圖。 【圖六】係顯示從前的薄膜覆晶封裝用線路基板處，搭載有半 導體零件的狀態的放大切面圖。 【主要元件符號說明】 【0029】 1 聚亞胺艇（polyimide film) 2 銅箔 3 光阻層（photo resist layer) 4 光阻圖型 16 200836318 5 銅線路圖型 6 鍍金屬層 7 半導體零件 8 突起（bump) 9、1 1 内引腳（inner lead) 10 樹脂 12 外引腳 13 線路 14 搭載半導體零件的預定區域200836318 IX. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a circuit board for a semiconductor package (the icy e) used in various electrical machines, and particularly relates to an application in a display (eg (4) A circuit board for a film-on-chip package (C0F) and a method for manufacturing the same. 彳 [Prior Art] [0002] In recent years, the miniaturization, weight reduction, and high performance of electronic devices have been remarkable, and the actual assembly method of semiconductor components Some people have suggested that the higher density of real IV, 'clothing method, and some parts are currently being implemented. The actual shouting method in this way is a film flip chip package (Chip Qf Fllm; _, mainly It is used as a driver semiconductor package for a liquid crystal display device. [0003] A fine-grained package is a semiconductor package that is mounted on a film carrier. A thin film substrate on which a metal wiring is formed on one side surface of an insulating film such as a film-sealing circuit board insole film (__this =). The main structure of the crystal-sealed circuit board is a region in which a semiconductor component is mounted, an inner lead (nner lead) that is bonded to an electrode pad of a semiconductor component, and an outer lead that is connected to an external electrode ((10) er (4) The circuit pattern of the circuit board of the conventional film-on-seal package is shown in FIG. 5 as an example. The circuit board for fine-grained package having such a wiring pattern is used as an example. , manufactured by the method shown in Fig. 6. First, as shown in Fig. 6 (a), a substrate is formed on the polyimide film by a copper box 2, and the copper foil 2 is laminated. A photoresist layer 3 is formed on the surface. Then, at the photoresist layer 3 that has been formed, the desired pattern is sensitized by irradiating the ultraviolet ray with a mask "not shown" (Fig. 6 (6)) Then, the photoresist layer is developed to form a Ph〇toresist pattern (Fig. 6(c)). Then, the exposed copper portion of the photoresist pattern 4 is paid to form The copper line pattern 5' is followed by the removal of the photoresist pattern (Fig. 6(4)). 'On the surface of the scale road pattern 5, the mineral or gold layer 6 of the electrode pad of the semiconductor part is formed (Fig. 6(e)). Then, at the end, the inner bow|foot and outer pin are made. Exposed to form a desired protective resistive film (not shown). [0005] The wiring substrate for a film flip chip package manufactured as described above is formed by a bump formed on the electrode pad of the semiconductor component 7 in order to mount the semiconductor material 7 (乜卿) 8 is implemented by bonding (4) to the inner layer of the film-coated lining circuit board, and then packaging these with a resin 丄0, as shown in _7, to obtain a semiconductor device. 6 200836318 [0006] * Limit:: Two preparations: ‘:::_ The operation of the piece produced by _’ and the axis (four) fresh_mail = environment. This type of heat dissipation does not fill the mass. The heat is dissipated to the surrounding parts. This is a matter of turning on the pieces = riding the reliance and causing semi-conducting ~, #+^ How to effectively administer the dynasty, which is an important issue for the +conductor equipment. SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] [0007] The wiring substrate for a thick-film polycrystalline package is formed on the surface of a semiconductor component, and the heat-transfer axis metal is low. The materialization result of the material of the film is low from the semiconductor parts table _ heat dissipation efficiency. In addition, due to the heat generated by the semiconductor read, the enthalpy occurs in a plane, and the temperature in the local area is too high, causing problems. [0008] +Special π, due to the large size and high resolution of the amperage in recent years, the semiconductor bobbin drive package voltage and the operating frequency are increased. Therefore, the heat generation of the 200836318 from the semiconductor parts is greatly increased. In addition, since the wiring of the film-coated crystal-sealing agricultural circuit is required to be finer, the width of the inner lead becomes, for example, a fineness of about 15 μm, and the heat dissipation efficiency through the (four) leg is gradually lowered. Therefore, the heat dissipation method of semiconductors has gradually evolved into a serious problem. [0009] In the past, in order to structurally improve the heat dissipation efficiency of such a semiconductor device, it is proposed as an "insulation film, a line disposed on the surface on the side of the insulating film, and a line disposed on the front ship edge film. a plurality of semiconductor materials on the opposite side of the surface, and a dilute material disposed on the surface of the insulator film (four), and these semiconductor devices are provided (Japanese National Open Age Simple Coffee No., paragraph [0021] 】Reference). That is, the film flip-chip package proposed in the patent document is a method in which a polyimide film is interposed therebetween, and a heat dissipation plate is disposed on the electrode side of the semiconductor wafer to improve the polyimine film as a medium. Heat dissipation. [0010] This configuration can be set up to scatter the drum of the rotating part, which has the advantage that: the use of a larger "plate" is more suitable for good heat dissipation. However, due to the arrangement of the heat sink, the thickness and weight of the film flip chip are simply increased, and the wire is instead of the thin film of the blood film flip chip package, and the light weight of the tide ride, and the circuit substrate for the film flip chip package. In the manufacturing operation, it is necessary to additionally add a heat dissipation plate, which is a major cause of cost increase. [0011] 200836318 The object of the present invention is to meet the requirements for miniaturization and weight reduction of a thin-package package, and to provide a film with high heat dissipation, as in the case of the above-described scatter test (10). A crystal substrate and a method for manufacturing the same are provided, and a circuit board-film flip chip package for thin-film package of the present invention is provided. [Method for Solving the Problem] [0012] Zhuang = The above-mentioned purpose is achieved. The first invention is on the surface of the unilateral side, and there are: (4) feet (electrodes 表面 which are not mounted on the surface of the half-piece parts. And the outer lead (the circuit board for the film flip chip package with the line on the end of the external substrate on which the film is covered with the film), " The part 'configures the heat sink A, which is characterized by this. Then, according to the second invention, the first invention is added to the area outside the predetermined area of the body wafer, and the heat sink board B and the heat sink board A are connected. Get up (10) Installed loosely, this [Q014] U sigh scale sign. =1: 'Transfer three invention, the above-mentioned fine a shaving line is composed of the same material, which is characterized by.", plate β, system [0015] 9 200836318 Then, the fourth invention is a method for manufacturing a circuit board for a film flip chip package according to the first invention, the heat dissipation plate A, and a wiring including an inner pin and an outer pin. By subtractive, additive, half plus A method of forming a semiconductor wafer-on-film package according to the second or third invention is characterized in that any one of the methods of semi-additive is integrally formed. The heat sink A and the heat sink B, and the circuit including the inner lead and the outer lead, are by subtractive, additive, semi-additive Any of the methods described above is characterized in that the body is formed. [0017] Then, the sixth invention is applied according to the first to third embodiment of the present invention. [Film of the invention] [0018] On the circuit board for film-on-film package of the present invention, the heat sink A is formed in the semiconductor component of the thin-film substrate for the paste, if necessary At the part where the semiconductor is mounted on the foot, the bribe heat sink ^the hot plate A and the heat dissipation are formed on the same plane with the inner lead and the line of the chattering, such as 200836318 - etc. Therefore, the semiconductor part Produce Lai, not only internal pins Even the heat sinks A and B are also scattered, and the heat dissipation effect is also improved. Therefore, the fine-grained crystal-sealed circuit board of the present month is higher than the past products, and the use of the invention is as follows. , can be transferred to the film flip chip package of the heat dissipation effect. [0019] Further, according to the method of the present invention, the heat sink A and the heat sink B, and the line having the inner pin and the outer pin 'because the change is used for shielding By using any of the subtractive method, the additive multiplication method (10), and the semi-addition method (semi_addltive), it can be integrally formed. Therefore, in the conventional production of a circuit board for a thin film flip chip package, it is not necessary to add, for example, additional work, use of materials, or change operations. Therefore, it is possible to provide a circuit board for a film flip chip package which can provide a film-free flip-chip package which does not have economical damage and has excellent heat dissipation. [Embodiment] [Best Embodiment of the Invention] [0020] According to the first embodiment of the present invention, in the _-, the circuit substrate for the film flip-chip package, the thin-walled package envelops the substrate line portion _ An enlarged cross-sectional view of a semiconductor device in which a semiconductor component 7 along its AA line position is mounted is shown in FIG. 200836318 • In the drawing—the η-system pin, ! 2 external pins, i 3 series with internal pins - pinned lines, partially enclosed by dashed lines, 14 mounted semiconductor parts, and central part of i 5 area i 4 (not configured) Heat sink A mounted on the inner pin U). As the foregoing, the heat sink 丄5 is composed of the line 丨3 having the inner lead 1 1 and the outer lead 丨2 on the same plane, and the heat generated by the operation of the semiconductor part is not only internal. The reference i is also conducted to the heat dissipation plate 15, and the heat dissipation plate 15 can also dissipate heat. [0021] Fig. 3 is an illustration of a portion of a line pattern of a circuit board for a film-on-film package according to a second embodiment of the present invention. In the present embodiment, the embodiment shown in Fig. 1 is further provided with a region other than the predetermined region i 4 of the semiconductor component, without the arrangement of the water 13 && no heat sink 16 (8). Then, the heat sink 15 and the heat sink 16 are first connected (refer to the off three (6)), and a part of the heat conducted to the heat sink 丨 5 is conducted to the heat sink 丄 6, and the heat sink 6 can also dissipate heat. Therefore, the heat dissipation effect is further improved. [0022] Next, a method of manufacturing a wiring substrate for a film flip chip package of the present invention will be described with reference to FIG. In the fourth embodiment, in order to easily understand the method of manufacturing the fine-clad-sealed circuit board, the main working surface is exemplified. First, as shown in Fig. 4(a), a photoresist layer 3 is formed on the surface of the substrate made of the polyimine film 1 and the copper drop 2 12 200836318. Next, in the formed photoresist layer 3, the shield (leg ice) is used as a medium, and ultraviolet rays are irradiated to make the pattern of the job photosensitive (Fig. 4_. As the shield used at this time, it is used in the finished product. The wire-cut towel is mounted on the heat-dissipating plate i 5 in the region where the semiconductor component region 14 is mounted and has no (iv) i. "then' is the same as the past method for manufacturing the gate-sealed circuit substrate, and the photoresist is Layer 3 is developed to form a phcDtoresist pattern (Fig. 4(C)), and then 'the copper pig 2 exposed from the opening portion of the photoresist pattern 4 is flanked to form a copper wiring pattern 5, which After that, the photoresist pattern 4 is removed (Fig. 4 (4)). Next, at the head of the Kawasaki _ 5, the metal wire 6 of the tin or gold of the electrode pad of the semiconductor wire is bonded to the electrode pad. ▲ Then 'at the end, the expected protective impedance film (not shown) is formed to expose the (four) feet and the outer leads. [0023] Compare the four and _ five, compared with the aforementioned sixth figure of the prior art, except In addition to the change in the shielding pattern used, Wei, there are significant changes, can be judged Minghu. If you use the technology, you may still get the circuit board for the flip-chip package. You can also find out the new manufacturing materials. And the above embodiments are reduced by the method. The manufactured film of the present invention 200836318 is a circuit board for flip chip packaging, but needless to say, it can be manufactured even by a commonly known addition, de- or half-addition method. [0024] [Embodiment] A single-side 35 μm thick polyimide film was coated on a copper matte surface of a copper-polyimide substrate (manufactured by Sumitomo Metal Mining Co., Ltd., product name: & perflex) having a thickness of 8 μm copper foil. The liquid-impedance layer is irradiated with ultraviolet rays by a shield having the pattern of the line 13 and the dispersion 5 as shown, and then developed to obtain a photoresist pattern for etching. Using a money engraving liquid containing copper chloride (eQpperehlQride) as a main component, the copper falling out of the opening portion of the photoresist layer is removed by a secret engraving, and then the remaining photoresist pattern is removed, and the surface of the poly-dye is formed. Line U and heat sink 1 $. : After 'use tin plating The inner bow is applied to the ruthenium to obtain a circuit board for commercial film flip chip packaging, and in the above operations, the conditions of ^ H, time conditions, etc. are generally known. Γ希 read that only the (four) foot part, the outer pin part, etc. become necessary:: rp points 'coated soldering wheel one ^ (4) call C, - down, make the resistance welding two 14 200836318 Next, in the The inner lead of the thin-structured crystal-sealed circuit board is obtained, and the electrode that can be bonded to the semiconductor component is made up of (_), added, heated, soldered, and resin-sealed as shown in the drawing. A semiconductor device constructed as shown in FIG. The operating state of this semiconductor device is not abnormal after the side. [_] [Comparative Example] Next, the line portion is the same as the wiring pattern of Fig. 1, except that there is no shielding of the heat sink 15 and the other methods are the same as in the previous embodiment to form a film flip chip package. Use a circuit board. The inner lead of the circuit board for thin film flip chip packaging, which is known after d, is capable of being bonded to the bump of the electrode of the semiconductor component, and is placed, heated, soldered, and resin-packed. A semiconductor device constructed as shown in FIG. The operating state of this semiconductor device is not abnormal after etching. Then, the semiconductor device of the above-described embodiment and the semiconductor device of the comparative example were mounted on the same printed circuit board, and the same load was applied to each, and the surface temperature of the semiconductor device was compared. As a result, the temperature of the semiconductor device of the embodiment is 100 ° C. The temperature of the semiconductor device is 120 ° C. If the circuit substrate for film flip-chip mounting according to the present invention is used, the temperature of the semiconductor device can be prevented. It has been confirmed that there is a rise of 20 C. 15 200836318 [Brief Description of the Drawings]: [Fig. ―] is a plan view showing a line portion of a line substrate for a thin-package package according to a first embodiment of the present invention. [Fig. 2] is an enlarged cut-away view of a state in which a semiconductor component is mounted in a relatively close-to-heart state. [Fig. 3] (a) is a plan view showing a pattern of a line portion of a circuit-coated substrate according to a second embodiment of the present invention; (b) an enlarged plan view of a heat dissipation plate. [Fig. 4] Fig. 4 is a cross-sectional view showing the main working portion of the manufacturing work of the wiring substrate for a film-on-chip package according to the present invention. Fig. 5 is a plan view showing a circuit pattern of a conventional circuit board for film flip chip packaging. [Fig. 6] is an enlarged cross-sectional view showing a state in which a semiconductor component is mounted on a circuit substrate for a film flip chip package. [Main component symbol description] [0029] 1 Polyimide film 2 Copper foil 3 Photo resist layer 4 Photoresist pattern 16 200836318 5 Copper wiring pattern 6 Metal plating layer 7 Semiconductor parts 8 Bump 9、1 1 inner lead 10 resin 12 outer lead 13 line 14 mounted predetermined area of semiconductor part
15 散熱板A15 heat sink A
16 散熱板B 1716 heat sink B 17