[go: up one dir, main page]

TW200743197A - Under bump metallurgy structure of package and method of the same - Google Patents

Under bump metallurgy structure of package and method of the same

Info

Publication number
TW200743197A
TW200743197A TW095117168A TW95117168A TW200743197A TW 200743197 A TW200743197 A TW 200743197A TW 095117168 A TW095117168 A TW 095117168A TW 95117168 A TW95117168 A TW 95117168A TW 200743197 A TW200743197 A TW 200743197A
Authority
TW
Taiwan
Prior art keywords
under bump
package
same
bump metallurgy
opening
Prior art date
Application number
TW095117168A
Other languages
Chinese (zh)
Inventor
Wen-Kun Yang
Original Assignee
Advanced Chip Eng Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Chip Eng Tech Inc filed Critical Advanced Chip Eng Tech Inc
Priority to TW095117168A priority Critical patent/TW200743197A/en
Publication of TW200743197A publication Critical patent/TW200743197A/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods

Landscapes

  • Wire Bonding (AREA)

Abstract

An under bump metallization structure comprises a die having a pad disposed thereon. A dielectric layer having an opening is formed therein over the die. A barrier layer is formed within the opening and a multilayer metal layer over the barrier layer. The barrier layer and/or the multilayer have an extending part that extends outside the opening of the dielectric layer and on the upper of thereon.
TW095117168A 2006-05-15 2006-05-15 Under bump metallurgy structure of package and method of the same TW200743197A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW095117168A TW200743197A (en) 2006-05-15 2006-05-15 Under bump metallurgy structure of package and method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW095117168A TW200743197A (en) 2006-05-15 2006-05-15 Under bump metallurgy structure of package and method of the same

Publications (1)

Publication Number Publication Date
TW200743197A true TW200743197A (en) 2007-11-16

Family

ID=57914263

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095117168A TW200743197A (en) 2006-05-15 2006-05-15 Under bump metallurgy structure of package and method of the same

Country Status (1)

Country Link
TW (1) TW200743197A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI449141B (en) * 2011-10-19 2014-08-11 Richtek Technology Corp Wafer level chip scale package device and manufacturing method thereof
TWI469296B (en) * 2011-10-19 2015-01-11 Richtek Technology Corp Wafer level chip scale package device and manufacturing method thereof
TWI633597B (en) * 2016-11-30 2018-08-21 新加坡商先進科技新加坡有限公司 Method for manufacturing wafer-level semiconductor packages

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI449141B (en) * 2011-10-19 2014-08-11 Richtek Technology Corp Wafer level chip scale package device and manufacturing method thereof
TWI469296B (en) * 2011-10-19 2015-01-11 Richtek Technology Corp Wafer level chip scale package device and manufacturing method thereof
TWI633597B (en) * 2016-11-30 2018-08-21 新加坡商先進科技新加坡有限公司 Method for manufacturing wafer-level semiconductor packages
US10115579B2 (en) 2016-11-30 2018-10-30 Asm Technology Singapore Pte Ltd Method for manufacturing wafer-level semiconductor packages

Similar Documents

Publication Publication Date Title
WO2010008689A3 (en) Embedded die package and process flow using a pre-molded carrier
TW200629385A (en) Capping of metal interconnects in integrated circuit electronic devices
TW200603698A (en) Methods of forming solder bumps on exposed metal pads and related structures
WO2008153128A1 (en) Semiconductor device
TW200731435A (en) Solder bump and method of fabricating the same
TW200727500A (en) Wafer level package for image sensor components and its fabricating method
WO2007058854A3 (en) Semiconductor package including a semiconductor die having redistributed pads
SG143236A1 (en) Multi-chips package and method of forming the same
EP2479788A3 (en) Wiring substrate and method for manufacturing the same
TW200507120A (en) Methods of selectively bumping integrated circuit substrates and related structures
SG144126A1 (en) Wafer level package with die receiving through-hole and method of the same
WO2009155160A3 (en) Multi-layer thick metallization structure for a microelectronic device, integrated circuit containing same, and method of manufacturing an integrated circuit containing same
WO2006138426A3 (en) Electronic chip contact structure
TW200707754A (en) Wire structure, method of forming wire, thin film transistor substrate, and method of manufacturing thin film transistor substrate
TW200802652A (en) Method of forming solder connection portions, method of forming wiring substrate and method of producing semiconductor device
WO2003098688A3 (en) Structural design of under bump metallurgy for high reliability bumped packages
TW200603367A (en) Semiconductor device and the fabricating method of the same
TW200725709A (en) Semiconductor apparatus and making method thereof
TW200713500A (en) Semiconductor device
TW200717674A (en) Bump structures and methods for forming the same
WO2008143138A1 (en) Wiring substrate, semiconductor package, and electronic device
TW200631132A (en) Semiconductor device and method for manufacturing the same
TW200741961A (en) Semiconductor devices and fabrication method thereof
WO2004058912A3 (en) Electroluminescent materials and devices
TW200501377A (en) Under bump metallurgy structure