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TW200607010A - Method of fabricating a gate oxide layer - Google Patents

Method of fabricating a gate oxide layer

Info

Publication number
TW200607010A
TW200607010A TW093123207A TW93123207A TW200607010A TW 200607010 A TW200607010 A TW 200607010A TW 093123207 A TW093123207 A TW 093123207A TW 93123207 A TW93123207 A TW 93123207A TW 200607010 A TW200607010 A TW 200607010A
Authority
TW
Taiwan
Prior art keywords
substrate
oxide layer
gate oxide
fabricating
spacer
Prior art date
Application number
TW093123207A
Other languages
Chinese (zh)
Other versions
TWI253686B (en
Inventor
Tung-Po Chen
Original Assignee
Powerchip Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Powerchip Semiconductor Corp filed Critical Powerchip Semiconductor Corp
Priority to TW093123207A priority Critical patent/TWI253686B/en
Priority to US10/905,086 priority patent/US20060030136A1/en
Publication of TW200607010A publication Critical patent/TW200607010A/en
Application granted granted Critical
Publication of TWI253686B publication Critical patent/TWI253686B/en

Links

Classifications

    • H10P30/204—
    • H10P30/208—
    • H10W10/0145—
    • H10W10/17—
    • H10P14/6309—
    • H10P14/6322—
    • H10P14/69215—

Landscapes

  • Element Separation (AREA)

Abstract

A method of fabricating a gate oxide layer is provided. First, a substrate is provided. An isolation structure is formed on the substrate so as to isolate an active region. A spacer is formed on the sidewalls of the substrate. Using the isolation structure having the spacer as mask, a dopant is implanted into the substrate for reducing the oxidation rate of the substrate. The spacer, pad oxide layer, and a portion of the isolation structure are removed to expose the surface of the substrate. An oxidation process is performed to form a uniform gate oxide thickness over the substrate.
TW093123207A 2004-08-03 2004-08-03 Method of fabricating a gate oxide layer TWI253686B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW093123207A TWI253686B (en) 2004-08-03 2004-08-03 Method of fabricating a gate oxide layer
US10/905,086 US20060030136A1 (en) 2004-08-03 2004-12-14 Method of fabricating a gate oxide layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW093123207A TWI253686B (en) 2004-08-03 2004-08-03 Method of fabricating a gate oxide layer

Publications (2)

Publication Number Publication Date
TW200607010A true TW200607010A (en) 2006-02-16
TWI253686B TWI253686B (en) 2006-04-21

Family

ID=35757958

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093123207A TWI253686B (en) 2004-08-03 2004-08-03 Method of fabricating a gate oxide layer

Country Status (2)

Country Link
US (1) US20060030136A1 (en)
TW (1) TWI253686B (en)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI327754B (en) * 2006-01-04 2010-07-21 Promos Technologies Inc Method for preparing gate oxide layer
US8053322B2 (en) * 2008-12-29 2011-11-08 Texas Instruments Incorporated Epitaxial deposition-based processes for reducing gate dielectric thinning at trench edges and integrated circuits therefrom
CN105789038B (en) * 2016-04-15 2019-03-12 上海华虹宏力半导体制造有限公司 Semiconductor structure and method of forming the same
FR3067516B1 (en) * 2017-06-12 2020-07-10 Stmicroelectronics (Rousset) Sas REALIZATION OF SEMICONDUCTOR REGIONS IN AN ELECTRONIC CHIP
CN111627810B (en) * 2020-06-05 2022-10-11 合肥晶合集成电路股份有限公司 Semiconductor structure and manufacturing method thereof
US12002707B2 (en) * 2020-08-06 2024-06-04 Changxin Memory Technologies, Inc. Semiconductor structure and manufacturing method thereof
CN114068411B (en) * 2020-08-06 2024-10-01 长鑫存储技术有限公司 Semiconductor structure and method for manufacturing the same
CN113345834A (en) * 2021-08-06 2021-09-03 晶芯成(北京)科技有限公司 Low-voltage device and manufacturing method thereof
CN115458398A (en) * 2022-10-09 2022-12-09 上海积塔半导体有限公司 Semiconductor structure and its preparation method

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1131742A (en) * 1997-07-14 1999-02-02 Mitsubishi Electric Corp Method for manufacturing semiconductor device
JPH11111710A (en) * 1997-10-01 1999-04-23 Nec Corp Semiconductor device and manufacturing method thereof
US6635537B2 (en) * 2001-04-06 2003-10-21 United Microelectronics Corp. Method of fabricating gate oxide

Also Published As

Publication number Publication date
TWI253686B (en) 2006-04-21
US20060030136A1 (en) 2006-02-09

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees