[go: up one dir, main page]

TW200509131A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
TW200509131A
TW200509131A TW093121571A TW93121571A TW200509131A TW 200509131 A TW200509131 A TW 200509131A TW 093121571 A TW093121571 A TW 093121571A TW 93121571 A TW93121571 A TW 93121571A TW 200509131 A TW200509131 A TW 200509131A
Authority
TW
Taiwan
Prior art keywords
dummy
memory cell
memory cells
bit line
write
Prior art date
Application number
TW093121571A
Other languages
English (en)
Inventor
Yoshinobu Yamagami
Original Assignee
Matsushita Electric Ind Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Ind Co Ltd filed Critical Matsushita Electric Ind Co Ltd
Publication of TW200509131A publication Critical patent/TW200509131A/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
TW093121571A 2003-08-29 2004-07-20 Semiconductor memory device TW200509131A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003307697A JP4090967B2 (ja) 2003-08-29 2003-08-29 半導体記憶装置

Publications (1)

Publication Number Publication Date
TW200509131A true TW200509131A (en) 2005-03-01

Family

ID=34214145

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093121571A TW200509131A (en) 2003-08-29 2004-07-20 Semiconductor memory device

Country Status (4)

Country Link
US (1) US6999367B2 (zh)
JP (1) JP4090967B2 (zh)
CN (1) CN100498972C (zh)
TW (1) TW200509131A (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006012240A (ja) * 2004-06-23 2006-01-12 Matsushita Electric Ind Co Ltd 半導体記憶装置およびダミーセルの回路のレイアウト
EP1630815B1 (en) * 2004-08-24 2011-10-05 Infineon Technologies AG Memory circuit with supply voltage flexibility and supply voltage adapted performance
JP2006164399A (ja) * 2004-12-07 2006-06-22 Matsushita Electric Ind Co Ltd 半導体記憶装置
DE602005004253T2 (de) * 2005-01-28 2009-01-08 Stmicroelectronics S.R.L., Agrate Brianza Speicher, bei dem zum Lesen an die Wortleitung eine Spannungs-Rampe angelegt wird, die mit einem Stromgenerator erzeugt wird
FR2885258B1 (fr) * 2005-05-02 2007-08-10 St Microelectronics Sa Procede de detection de l'achevement d'une operation d'ecriture d'une donnee dans une cellule de memoire et circuit de memoire correspondant
JP4373972B2 (ja) * 2005-11-14 2009-11-25 東芝メモリシステムズ株式会社 半導体記憶装置
JP2007328900A (ja) * 2006-05-09 2007-12-20 Matsushita Electric Ind Co Ltd スタティック型半導体記憶装置
JP4791885B2 (ja) * 2006-05-29 2011-10-12 株式会社東芝 放電順序制御回路
US7376032B2 (en) * 2006-06-01 2008-05-20 Qualcomm Incorporated Method and apparatus for a dummy SRAM cell
FR2903524B1 (fr) * 2006-07-05 2008-10-17 St Microelectronics Sa Dispositif de memoire avec commande programmable de l'activation des amplificateurs de lecture.
KR100777348B1 (ko) * 2006-07-11 2007-11-20 삼성전자주식회사 비휘발성 기억 장치의 셀 어레이 구조 및 그 형성방법
US7630264B2 (en) * 2007-07-24 2009-12-08 Infineon Technologies Ag Memory device and testing with write completion detection
JP4802257B2 (ja) * 2009-03-16 2011-10-26 株式会社東芝 半導体記憶装置
US8730750B1 (en) * 2012-10-28 2014-05-20 Lsi Corporation Memory device with control circuitry for generating a reset signal in read and write modes of operation
CN104575606B (zh) * 2013-10-10 2018-05-22 无锡华润上华科技有限公司 一种带有自检测电路的读出电路及控制方法
CN107301878B (zh) * 2016-04-14 2020-09-25 成都海存艾匹科技有限公司 多位元三维一次编程存储器
CN108074609B (zh) * 2016-11-14 2020-09-11 中芯国际集成电路制造(上海)有限公司 写追踪跟随性检测方法和电路以及包括该电路的存储器
CN118366515B (zh) * 2024-06-19 2024-09-17 上海海栎创科技股份有限公司 具有可靠性和稳定性的sram结构及其自定时控制方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4712194A (en) * 1984-06-08 1987-12-08 Matsushita Electric Industrial Co., Ltd. Static random access memory
US5043945A (en) * 1989-09-05 1991-08-27 Motorola, Inc. Memory with improved bit line and write data line equalization
KR0127216B1 (ko) * 1994-11-24 1998-04-02 문정환 반도체 메모리장치
JPH1196768A (ja) 1997-09-17 1999-04-09 Nec Corp 半導体集積回路
JPH11232873A (ja) * 1998-02-06 1999-08-27 Nec Corp 半導体記憶装置
JP3548423B2 (ja) * 1998-04-27 2004-07-28 シャープ株式会社 半導体記憶装置
US5946264A (en) * 1998-10-30 1999-08-31 Stmicroelectronics, Inc. Method and structure for enhancing the access time of integrated circuit memory devices
JP2001015352A (ja) * 1999-06-30 2001-01-19 Mitsubishi Electric Corp 変圧器
JP4837841B2 (ja) 2001-06-12 2011-12-14 富士通セミコンダクター株式会社 スタティックｒａｍ

Also Published As

Publication number Publication date
US6999367B2 (en) 2006-02-14
JP2005078714A (ja) 2005-03-24
CN1591684A (zh) 2005-03-09
US20050047220A1 (en) 2005-03-03
JP4090967B2 (ja) 2008-05-28
CN100498972C (zh) 2009-06-10

Similar Documents

Publication Publication Date Title
TW200509131A (en) Semiconductor memory device
Yang et al. A low-power SRAM using hierarchical bit line and local sense amplifiers
KR101498472B1 (ko) 메모리 디바이스를 동작시키는 시스템 및 방법
CN101501778A (zh) 低功率存储器控制电路和方法
TWI256636B (en) Static RAM
TW200514348A (en) Differential amplifier and bit-line sense amplifier adopting the same
JP2000022010A5 (zh)
TW200721197A (en) Output circuit of SRAM
US8953401B2 (en) Memory device and method for driving memory array thereof
DE60035115D1 (de) Architketur, verfahren und schaltungen für speichervorrichtungen mit geringer leistungsaufnahme
AU6049196A (en) Single-ended sensing using global bit lines for dram
KR950009725A (ko) 반도체 메모리 장치
TW200509142A (en) Semiconductor memory device using VSS or VDD bit line precharge approach without reference cell
DE60142044D1 (de) Ram-zellenarchitektur mit transparenter ununterbrochener auffrischung
ATE336064T1 (de) Dram mit bitleitungsaufladung, invertiertem dateneinschreiben, verlängerter ausgabedatenhaltung und verringertem leistungsverbrauch
TW200641906A (en) Method and apparatus for low voltage write in a static random access memory
TW200643967A (en) Storage circuit and method therefor
ATE462185T1 (de) Verfahren und vorrichtung zur lese-bitleitungs- klemmung für verstärkungszellen-dram-bausteine
TW200511309A (en) Memory device and method of amplifying voltage levels of bit line and complementary bit line
EP2793231A3 (en) Semiconductor memory device
TW200615973A (en) Semiconductor memory devices and method of sensing bit line thereof
TW200606955A (en) Semiconductor storage device
TW200504753A (en) Clock synchronous type semiconductor memory device
CN107818801B (zh) 灵敏放大器电路和存储器
DE602004017664D1 (de) Statische Direktzugriffspeicherzelle (SRAM) und Speichereinheit die diese enthält mit extrem niedrigem Leistungsverbrauch