SU890388A1 - Adjustable device - Google Patents

Description

The invention relates to automation and computer engineering and is intended to be implemented by setting up Boolean functions.

A device with sequential tuning is known, which contains as an operating unit a multifunctional logic module with η information and tuning inputs, the configuration of which is carried out only by supplying constants 0 and 1, the shift register consists of η cells, and the outputs of this register are connected to corresponding module configuration inputs. This device has two tuning inputs, on one of which clock pulses are supplied sequentially, and on the second - tuning code 11]. de

A disadvantage of the known device is that the number of clock cycles required to configure such devices is large and equal to n.

Closest to the proposed technical essence is a device with sequential tuning, in which instead of a shift register containing n cells, a counter consisting of the same number of cells is used. This device has only one tuning input, to which tuning signals are sent, the number of which is equal to the decimal equivalent of the setting code. The number of measures required to configure the device can reach 2 ^P [2].

The disadvantage of this device is the low performance during configuration.

The purpose of the invention is to improve performance during configuration.

This is achieved by the fact that a tunable device containing a multifunctional logic module with η information inputs connected to η information inputs of the device, respectively, and m set up 890388 to t5 inputs (n? M), additionally contains a configuration memory register and a configuration memory reset block containing The η-input element OR-HE and the two-input element AND, the setup memory register, contains m two-input elements AND and u triggers, the unit outputs of which are connected to the m training inputs of the module, respectively, the input inputs are connected to the outputs of m elements AND of the memory register, respectively, the zero inputs are connected to the output of the element AND of the tuning memory reset unit, the first input of which is connected to the (n + 1) th information input of the device and to the first inputs of the elements AND of the memory register, the second input connected to the output of the η-input element OR-HE of the tuning memory reset block, the input of which ₂₀ (i = 1, 2, ..., η) is connected to the i-th information input of the device and to the second input of the i-th element And memory register groups respectively.

The drawing shows a diagram of a custom device.

The device to be configured contains (η + Ί) inputs 1 j, 1c, 1c, 1p + 1 "unit 2 for resetting the configuration memory, consisting of η-input element OR-HE 3 and two input element AND 4, memory register 5 , consisting of η two-input elements And 6 _t , 6 ₂ , ..., 6ш and η triggers with separate inputs, the information of which does not break down when the supply voltage is removed 7 ₍ , 7. · ·, · 7m, multifunction logic module 8 s η information 9 ,, 9 ₂ ”..., 9η and m tuning inputs 10,, 10 ₂ , ·, output 11.

The operation of the device is as follows.

When applying to (p + 1) the input of the device 1 _{p + 1 of the} first pulse and the absence of signals at the first η inputs of the device 1,, 1 _2> . .., 1n, the AND element 4 of the reset unit is triggered, since in this case there is a single signal at the output of the OR-HE 3 element. The output signal of element And 4 of the reset unit transfers all triggers 7 _t >72>···> 7sc of memory register 5 to state O. If the setup code consists of all zeros, this completes the device setup. If at least one unit is present in the setup code, then the setup is performed as follows. At the first η inputs of the device, ..., 1 η a setup code is supplied. A single signal disappears from the output of the OR-HE element, and the reset unit is disconnected from the outputs of the set in O triggers of the memory register. After that, the second pulse is applied to the (n + 1) -th input of the device 1 _{p +} { A single signal appears at the outputs of all those AND elements, the first inputs of which receive single signals from the inputs of the device. These signals correspond to those bits of the setup code in which there are units. Triggers associated with AND elements, at the output of which there is a single signal, go into state 1, and on the individual outputs of these triggers appear single signals arriving at the corresponding training inputs of the module.

Thus, the module is configured to implement the required Boolean function. In this case, the setup code is recorded in the memory register. The device was set up in just two clock cycles — the zeroing clock and the clock for recording the setup code. Compared to the known one having the same number of external outputs, the gain in tuning time can reach 2 ^{th −1} times. Due to the fact that the device uses triggers, the information in which is not destroyed when the power supply is removed, its adjustment can be carried out in one device (setup device), and use in another (designed device). After the device is configured to implement a given function, it can be used to implement any circuit (including asynchronous) as a logic module with η inputs.

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Claims (2)

The invention relates to automation and computing and is intended to be implemented by setting Boolean functions. A device with sequential tuning is known, containing as an operational block a multifunctional logic module with n informational settings and n tuning inputs of which is carried out only by supplying constants O and 1, the shift register consists of cells, and the outputs of this register are connected to the corresponding configuration inputs of the module. This device has two tuning inputs, one of which receives clock pulses in succession, and the second - tuning code 111. A disadvantage of the known device is that the number of clocks that is necessary for setting up such devices is large and equal to n. The closest to the proposed technical essence is a device with a sequential setting, in which instead of the shift register containing the cells of cells, from the same number of cells. This device has only one setup input, to which setup signals are sent, the number of which is equal to the tenth equivalent of the setup code. The number of ticks needed to configure the device can reach 2 2. The disadvantage of this device is the low speed of the tuning. The purpose of the invention is to increase the speed at tuning. This is achieved by the fact that a configurable device containing a multifunctional logical module with n information inputs connected to n information inputs of the device, respectively, and m configurable inputs (), additionally contains a tuning memory register and a tuning memory reset block containing n - an input element OR-NOT and a two-input element AND, the register of the setting parameters register, contains m two-input elements AND and m triggers, the unit outputs of which are connected to the module m input inputs, respectively, one e inputs are connected to outputs m of elements AND of the memory register, respectively, zero inputs are connected to the output of element AND of the tuning memory reset unit, the first input of which is connected to the (n + 1) -th information input of the device and to the first inputs of elements AND of the register memory 1and, the second input is connected to the output of the n-input element OR-NOT of the reset memory of the tuning memory, whose input I (i 1, 2, ..., n) is connected to the i-th information input of the device and to the second input The i-ro of the AND memory register group respectively. The drawing is a diagram of a configurable device. The device to be configured contains (n + 1) inputs 1 ,, and, ..., 1c, Inti, a block 2 for resetting the configuration memory, consisting of an n-input element OR-NOT 3 and a two-input element AND k, register 5 memory consisting of n two-input elements And 6i, 6, ..., 6ni and n flip-flops with separate inputs, information in which is not destroyed when the supply voltage 7i is removed. 7d, 7t, multi-functional logic module 8 with informational O, App ..., 9n and m tuning inputs 10,, 102, .. 10, output 11. The device operates as follows. When applying to the (n + 1) input of the device of the first pulse and the absence of signals at the first n inputs of the device 1,, Ij, ..., 1n, the element AND k of the reset unit is triggered, since directly at the output of the element OR-NOT 3 single signal. The output signal of the And k block of the reset unit transfers all the triggers 7 (72., 7t of the memory register 5 to the state O. If the setup code consists of all lines, then the device setup is completed. If there is at least one unit in the setup code The tuning is carried out as follows: A tuning code is supplied to the first p inputs of devices 1 1 g1. A single signal disappears from the output of the OR-NOT element, and the reset unit is disconnected from the outputs of the setting O of the memory register triggers. fl) device input is given a second pulse. A single signal appears at the outputs of all those AND elements, the first inputs of which receive single signals from the device inputs. These signals correspond to those bits of the tuning code in which there are ones. Triggers associated with AND elements whose output is single signal, go to state 1, and on the single outputs of these flip-flops there are single signals arriving at the corresponding tuning inputs of the module. Thus, the module is configured to implement the desired Boolean function. In this case, the setting code is recorded in the memory register. The device was set up in just two clocks - the zero stroke and the write stroke of the setup code. Gain in time settings compared with the known, having the same number of external conclusions, can reach times. Due to the fact that triggers are used in the device, information in which is not destroyed when the supply voltage is removed, its adjustment can be carried out in one device (adjustment device), and use in another (designed device). After the device is configured to implement a given function, it can be used to implement any circuit (including asynchronous) as a logic module with n inputs. Claims of the invention A configurable device comprising a multifunctional logic module with n information inputs connected to n information inputs of the device, respectively, and m configuration inputs (n ST), characterized in that, in order to improve the speed at tuning, the device additionally contains a tuning memory register and a configuration memory reset buk containing an OR-NOT p-input element and a two-input AND element, the configuration memory register contains m two-input elekt5890 The I and m triggers, single outputs of which are connected to m module configuration inputs, respectively, single inputs are connected to outputs of m AND memory register elements, respectively, zero inputs are connected to the output of setting And memory reset unit element, the first input of which is connected to ( +1) -th information input of the device and to the first inputs of the elements and the memory register, the second input is connected to the output of the p-input element OR-NOT of the reset memory of the tuning memory, i input of which is (, 2, .... p) is connected to the -th information input of the device and to the second input of the i-ro element AND memory register group, respectively. Sources of information taken into account in the examination 1, Yakubaytis E.A., Structure and efficiency of a multifunctional element. - Automation and Computer Engineering, 1972, ff 5, p. 2, Fig. 3 2. Yakubaytis E.A. Universal logic elements. - Automation and computing technology, 1973, N 5, p. 15, fig. 3 (prototype).