SU660190A1 - Device for control of self-sustained thyristorized inverter - Google Patents

Description

one

The present invention relates to electrical engineering, in particular to inverter control devices.

A thyristor voltage regulator with a breakdown protection switching circuit is known, which contains a logic element with a delay element, a trigger, an AND circuit, where, in order to prevent the protection from re-activating in the time interval of its restoration, the ij is switched on in series with the logic elements. The disadvantage of this device is its complexity.

The closest technical essence to this invention is a device for controlling an autonomous inverter, comprising a master oscillator, a pulse distributor, blocks of adjustable and unregulated delays, adders, separation transformers, a control pulse generator, and various 2J drivers.

The disadvantage of this device is the occurrence of spurious pulses at the output of the device in the event of a switch failure.

It is not the invention of the invention to prevent false pulses at the output of the device when the switch fails.

The goal is achieved by the device for controlling an autonomous thyristor inverter, the load of which is a magnetostrictive frequency converter, which contains a master oscillator connected to the input of the switch with n outputs, a control pulse shaping unit for power tyrnstors, additionally equipped with a switch with l outputs, a shaping unit signal for the second switch, an element of the NLI, a delay unit, and a block π of coincidence elements; perimenters connected to form a unit control pulses through block matching elements, the n-th output of the first ko.mmutatora connected to the input of an additional switch, to the other input

which, through the delay unit and the NLI element, is connected to a signal generation unit for an additional switch, the outputs of which are for connecting power thyristors. In this case, the inclusion of the commutation circuit of the power thyristors is impaired only at the synchronous operation of the two switches and the installation of the initial state of the control circuit, through a time sufficient to restore health in the event of a fault.

ila drawing / KS npiiiicAOiia block diagram of an autonomous inverter inverter control unit containing a master oscillator 1 connected to the input of a switch 2 pulses with l outlets, output P: Expensively connected to the input of a control terminal 3 for power tyrnstors, a 4 power unit ii , piiciorov, block 5 is formed by the signals of the additional switch, and through the element OR 6 n block / delay to the input of the commuter switch 8 with l outputs, the outputs of which are connected to the input of the block 9 n elements of the commonplace. The master oscillator 1 represents the co-arrays: a papr / kepie (lacTt) and forms a stable sequence of pulses. Switchboard 2 impulses with n outputs is a per-count circuit. Pulses with a repetition rate / a are connected to the switch input and the pulse repetition frequency for each switch output is / t / - / н nx duration - TI 1 // t. The unit 3 for shaping the control pulses for the power thyristors contains n driver control signals:

, d /, F

and others, depending on the mode of output, either single imiu; 1ci or pulse packets may be formed.

The signal generation unit 5 for the second switch contains a ng circuit that fixes the turn-on time of the power thyristors. For example, and resistor dividers connected in parallel to the power thyristor nep. The divider is connected to isolation transformers, the output windings of which form, through differentiation, 1, and a derivative of the jump jump. The inversion of the voltage jump for switching circuits, forms; - .. Irui; c11 1:} and positioned on the floor of the half wave phase phase, is produced by changing the polarity of the network of the secondary winding of the transformers. If the number of thyristors in the price is more than one, then to form a sigal (for the second switchboard), the AND element is used for the number of inputs equal to the number of thyristors. Anode current sensors can be used to record the thyristor turn-on time.

Switch 8 pulses with n outputs in contrast to the liepBoro switch has an input. The first input is used to set the START state, the second is for the start. At the exit formiumy imiulsy duration of tg., C

(- -) Block 9 of match items contains a

two-entry connection elements.

Consider the work of the device. After switching on, the pulses from the generator 1 come to the input of the first switch 2, which at the moment of switching on may be in an arbitrary state. Comm ator 8 does not trigger 1: until Icx until the installation input ac pr1; I have a pulse from the output of the output of comm iai (jpa 2. B; j ,, i (jjC i; iyi Hcj;; 1lod, e jiicAieiii uLj LUbiiads1, ;;;. ;; .., (, a have imich.obs ;; e When iia b; .. j; i. ol; m Tshchzra k ;; ti), p-nn, ls nostunat to the second input of the switch 8 and sets the eio to the initial state

(Allowed by iote1: 1i1al at the ith output). The nerve input of the first element And block 9 e of the nervous output of switch 2 is set to the GI TI, which through the first output of the element And block U noCTyjiaeT nerve driver control unit 1X pulses of block 6, for initial switching of block 4 of peristors. When triggered, a second launch miuls is formed at the input of the comm) -tator 8,

through block 5, OR (), block 7 delay. At this time, the nerve input of the second etemeia H of block 9 liMeeiCH into the second impulse tj from commutator 2. And the inopOM input of the switch 8 forms the impulse t2 for the second input of the second etheite I of block 9, at the output of which the impulse for second is formed Values of the switching of block 4, which forms the pulse impulse for TpeTbCJi tsei: through the third element

And block 9, etc.

Since nizoizhoesh.eiJoii, then n1-1e time t TI outputs a and n on the block 9 of the element H are disconnected (do not form sigpalov) from the inputs of block 3. Disconnection will be made both in case of a failure in block 4 and iri malfunction in switches 2 or 8. The formation of false ediiptsy in one of the switches 2 or 8 jie doesn’t lead to failure, because the coincidence in one ii3 of the lemeites

Block 9 is ALWAYS only when two switches are in synchronous operation, and therefore the presence of one into one: - from the switches, does not lead to a malfunction.

Form m) l and 3 O about e and e and

A device for control of a unyun m thyristor inverter, the load of which is often a magnetostriction converter; s, (holding its master oscillator, key switches ;; to the input of the switch e II outputs, the unit forming the control unit with them; / L with 5 for power thyristors , about t and l and i (j and; with e with ;; so, honor, with

the aim is to prevent false false signals on the output of the device when the switch fails, it is complete with a switch with n outputs, a signal conditioning unit for a single commutator, an element OR, a delay unit and

a block of coincidence elements, where one MEB of the switch outputs are connected to a control pulse shaping unit through a block of matching elements, the first output of the first switch is connected to the input of an additional switch, to another input of which a signal generation unit for an additional switch is connected The outputs of which serve to connect the power thyristors.

Sources of information taken into account in the examination

1. USSR author's certificate N ° 429488, cl. H OIH 7/10, 1970.

2. USSR author's certificate number 311365, cl. H 02 P 13/18, 1968.