SU657435A1 - K-digit pulse-phase adder - Google Patents

Description

I

The invention relates to the field of BE and digital technology and can be used as a basic element of the operational nodes of automated control systems.

Known K-valued pulse-phase adders containing two binary dynamic trigger, the prohibition node, push-pull ring shift register and the driver for the phase of the pulse and transfer code. However, such adders contain a large number of elements of different types 1 |.

The closest analogue is the K-digit phase-impulse adder, which contains two dynamic triggers, a prohibition node, a sum formation node, a transfer formation wave form, a push-pull ring shift register, made on the magnetotransistor elements, and the information inputs of dynamic triggers are connected to the first and second information inputs devices, and the outputs are dynamic

the triggers are combined and connected to the input of the prohibition node, whose output through the OR element, another input of which is connected to the transfer bus, is connected to the EOiox of the bits of the push-pull ring shift register; the input of the transfer shaping unit is connected to the overflow output of the push-pull ring register shift 2}.

The disadvantage of this adder is the low speed, which depends on the number of bits, since the transfer is carried out sequentially,

The aim of the invention is to increase speed.

Claims (2)

To achieve this goal, the second input of the transfer shaping unit is connected to the transfer bus, and the third to the output (K-l) -ro bit of the push-pull ring shift register. The goal is achieved by TajoKe by the fact that the transfer formation node contains two magnetotransistor elements and the OR element, the first input of the transfer formation node is connected to the recording input of the first magnetotransmission element, the output of which is connected to the input of the OR element, and the second input of the forming node is connected to another input transfer, the output of the element OR is connected to the read input of the second magnetotransistor element, the recording entry of which is connected to the third input of the transfer shaping unit, coupled to an output of the second magnitotranzistornogo element. The drawing shows a functional diagram of the K-valued phase-pulse torus sum. K-digit pulse-phase adder contains two dynamic trigger 1 and 2, the node 3 prohibition, push-pull ring register 4 shift, node. 5 forming either the sum, the transfer shaping unit 6, the OR elements 7 and 8. The adder circuit also contains the shift control unit 9 and the result output control unit 10. Node 6 of transfer formation contains magnetotransistor elements 11 and 12 and element OR 13. The adder circuit contains only (LC + 9) magnetotransistor elements. The input of the first term (the first information input of the device) is connected to the information input of the first dynamic trigger 1 (to the installation input records). The input of the second term (the second information input of the device) is connected to the information input of the second dynamic trigger 2 (to the setup input by recording). Dynamic triggers have a common input & ki in the zero state with a stroke t The tires of constant cycles are connected to the windings of the magnetotransistor elements of dynamic triggers 1 p 2 in such a way that in the zero state dynamic triggers 1 and 2 generate pulses according to the cycle G, and single state generate pulses, respectively, in cycles of T. and C. The outputs of dynamic triggers 1 and 2 are combined by the element OR 7, the output of which is connected to the read windings of the magnetotransistor elements of the node 3, which performs the function of prohibiting T, the buses of constant cycles 1, and Tr are connected to the write windings, and the output of the prohibition node 3 is combined with the transfer bus from the previous bit by the element OR 8. Thus, the dynamic triggers 1 and 2, the node 3 of the prohibition and the elements IL | 7 and 8 convert the input variable information into a number of pulses. An element 8 of the input OR 8 is connected to the windings of the readout of the magnetotristor resistor. elements of the upper row of the push-pull ring shift register 4. The push-pull ring shift register 4 contains 2k magnetotransistor elements connected in a ring along the windings of the record. To the input of the recording of the first magnetotransistor element is connected the bus of a rare tact of the initial installation T. A node 9 of the information shift control unit, implemented on one magnetotransistor element, is connected to the lower row of the magnetotransistor elements of the push-pull ring register 4 shift through the emitter inputs. buses of constant cycles С, С- and ТГу and bus of rare measure С are connected. The buses of the recording of the magnetotransistor element of the shear control unit 9 are connected to buses of constant cycles t and 1G And the bus of a rare cycle C i, and to the winding of the winding - bus of a rare cycle 11 j 10 control the output of the result, implemented on a single magnetotransistor element, to the recording winding of which a bus of a rare tact T is connected; in to read fainting - tire of a rare tact ft. The communication lines of the output output control unit 1O with the emitter inputs of the lower row of the magnetotransistor elements of the push-pull ring shear registers are connected to the write windings of the magneto-transistor elements of the sum forming unit 5 and are essentially) 1 moves of the result of the two-stroke ring shift 4 operation. Each output corresponds to a specific result value. The communication link of the node 56 of the shear control with the last push-pull element of the two-stroke ring register 4 shift, which is the output of the overflow of the push-pull ring register 4 shift, connected to the winding of the recording magneto-transistor element 11 of the transfer unit 6. The output of the magnetotransistor element 11 of the transfer formation unit 6 is connected to the input of the element OR 13, to the other input of which is connected to the transfer cable from the previous bit. A constant bar fg is connected to the read input and the magnetotransistor element 11. The output of the OR element 13 is connected to the read input of the magnetotransistor element 12, to the other read input of which the bus of the rare tact to is connected, and the output of the (K-l) -ro bit of the push-pull ring register 4 is connected to the write input. The output of the magnetotransistor element 12 is the output of the transfer forming unit 6 and is connected to the transfer bus in a subsequent discharge. The windings of the magnetotransistor elements of the upper row of the push-pull ring register 4 shift for performing the result cathode operation and extinguishing information are connected to the tires of rare and irradiators. The read windings of the magnetotransistor elements of the sum-forming unit 5 are connected to tires of rare types TOBTJ D, 1, ..., V. The outputs of the magnetotransistor elements of the sum-forming unit 5 are combined and connected to the output of the sum-generating unit 5, which is the output of the K-digit pulse-phase adder. The terms arriving at the inputs of a K-digit phase-pulse adder are represented in phase-pulse form, and each of the K possible values (O, 1, 2..., (Kl)) corresponds to the presence of a current pulse in the corresponding clock cycle (T) clock cycle vLj, tj "-Z 3 For the normal summation of information, all the terms are presented in one digital period, and the result of the operation is obtained in the next digital period, except for a zero result value (a zero result value is output in the same digital period). The digital period is taken to be the time interval between two current pulses of a rare cycle T in a generator of these pulses. For the clock period, the time interval between the two current pulses of the current clock G is taken. The number of clock periods tx necessary for the correct operation of the adder is K (K is the value of the number system). The number of ticks in a clock period, necessary for the correct operation of the adder, is 8. Tacts repeated in each clock period are called constant and denoted as T., and cycles repeated in each digital period only once and in a certain clock period. period are called rare and are denoted by t. The advantage of this adder in comparison with the prototype is that without significant complication of the adder circuit, its performance increases N times (N is the number of bits of the adder). Claims 1. K-digit pulse phase sum g. a torus containing two dynamic triggers, a prohibition node, a sum forming node, a transfer formation node, a push-pull ring shift register stored on magnetotransistor alements, the information inputs of dynamic triggers are connected respectively to the first and second information inputs of the device, and the outputs of dynamic triggers connected and connected to the input of the prohibition node, the output of which through the OR element, the other input of which is connected to the transfer bus, is connected to the read inputs of the two-bit bits ktnogo circular shift register. the inputs of the sum forming unit are connected to the outputs of the push-pull ring shift register operation, the first input of the transfer shaping unit is connected to the overflow output of the push-pull ring shift register, i.e., in order to improve speed, the second input of the transfer shaping unit is connected to the bus transfer, and the third to the output (Kl) -ro bit of the push-pull ring shift register, 2. A K-digit pulse-phase adder according to claim 1, characterized in that the transfer forming unit contains two magnetotransistor elements