SU419936A1 - DIGITAL SENSOR OF POSITION FUNCTIONS - Google Patents

Description

one

The sensor belongs to the diocetic systems of automatic control and control of the digital signal; they are digital; they are ideal: transducers and digital multi-channel position function sensors.

Digital position function sensors are known, containing ka ala signals, the outputs of which are connected to the inputs of the circuits forming the counting pulses and signals of the sign of the movement. The outputs of the formation circuits are connected respectively to the counting input and the 1 input controlling the reversal of the pulse counter. Such sensors do not allow a full reversing counter to be attached to the current values of the position function in the random position of the mutually moving elements of the memory device, which makes them compact to work and limits their applicability.

The proposed sensor differs from those known in that it includes an additional memory channel, a reference pulse allocation circuit, a code group allocation circuit and: mp3, a protection circuit, a decoder, a bit selection circuit, a switch, and a number input circuit for higher bits. Moreover, the outputs of all three memory genals are connected to the corresponding inputs of the reference pulse extraction circuit and the pulse code pattern selection circuit. One output of the reference pulse extraction circuit is connected to one input of the circuit and the decoder, the other to the lower bits of the reversible counter. The second output of the displacement signal forming signal circuit is connected to another input of the protection circuit, and its output is connected to a separate input of the pulse pattern selection circuit. One output of the latter through a decoder is connected to the bit selection circuit, which is connected to

to the input of the switch, the other with the input of the input scheme for the higher bits of the counter. The output of the input circuit of numbers to the higher bits of the counter is connected to another input of the switch, the outputs of which are connected by the old bits of the reversible counter. This allows the functionality of the digital position function sensor to be expanded.

The drawing shows a block. Scheme of the proposed sensor.

The sensor contains a common memory device with three channels 1, 2 and 3. The allocation circuit 4 of the reference pulses, 5 forming the counting pulses, 6 forming 1 sign signals

shifting, 7 allocating code groups H: pulses, 8 protection and 9 inputting numbers on higher bits, decipheror 10, bit selection AND pattern, switch 12 and reversible counter 13.

The outputs of channels 1 and 2 are separately connected to the inputs of circuits 4-7, the output of channel 3 is connected to the individual inputs of circuits 7 and 4. The output of circuit 4 is connected to a protection circuit, a decoder and 1 inputs 1 and lower-order bits of a reversible counter. The output of the circuit 5 is connected to the counter input of the counter, the output of circuit 6 is connected to the control input 1rece | rc of the counter and through the protection circuit - to circuit 7. One output output of the latter is connected via a decryptor and a bit selector circuit to the switch, the other through the number input circuit and senior bits with the second input of the switch. The switch outputs are connected to the older bits of the reversible counter. If the number of bits of the counter is k, and the total number of bits is, then the number of most significant bits is p – k, and the number of connection prices per millutator with counter 2 (p – k).

The sensor works as follows.

In the process of mutual movement of the elements of the sensor's memory device when changing the position of, for example, the sensor shaft, the inputs of circuits 5 and 6 receive signals in the form of bunks mutually orthogonal in function of the position of pulse sequences with a duty cycle of two and a period of four units of a function count shifted relative to each other friend by one unit in a particular direction. At the output of circuit 6, a displacement sign signal is received, which is fed to the input of the control of the reverse of the counter 13 and puts the counter i in addition mode or subtraction mode. At the output of circuit 5, a sequence of counting pulses is obtained with a period in a unit of the counting function of the position, which is fed to the counting input of a reversible counter. Due to this, the counter correctly tracks the increments of the position function, but does not yet express its current values.

Simultaneously with the output of all three channels 1, 2 and 3 of the memory, signals are received on separate circuits at the inputs of circuits 4 and 7, which use signals from channels 1 and 2 to select signals from channel 3. Scheme 4 extracts reference pulses from signals of channel 3, which appear in Moments, when the digits of the number expressing the current value of the position function have, for example, the code "10 ... O. These pulses arrive at the lower bits of the counter in k chains, where k is the number of younger bits, and record this number on them. The same pulses are passed to the inputs of the protection circuit 8 and the decoder 10 and set them to their original position. Scheme 7 extracts the code (Groups of digital pulses of the n-k most significant bits of the counter, coming from the output of channel 3 in the chromatic clock between the reference pulses, i.e. extracting from the signals of channel 3 the digital content of the high-order bits position function. The signal from the output of circuit 7 through the circuit 9 for inputting numbers to the highest bits is given in the presence of a code pulse and a "single or no zero" bus 12 of the switch 12. The signal from another

the output of the circuit 7 is supplied to the decoder 10, which, together with the bit selection circuit P, acts on the switch input corresponding to the discharge number and through it

for the higher bits of the counter 13, where the corresponding number is written. This ensures that the most significant bits of the counter are linked to the current values of the position function. As a result, the counter is not

not only correctly tracking the increments of the function, but also correctly displaying its current values both with its younger and its higher bits. When changing the direction of mutual movement of the elements of the sensor's memory device, i.e. when changing the counter operation mode ("addition -" subtraction), from the circuit of forming signals of the movement sign through the protection circuit to the circuit 7

groups of pulses, a signal arrives that disables its output from the scheme of introducing numbers to the higher bits for the time before the arrival of the next reference pulse. Since the high-order code changes by one when it passes through the reference pulse, remaining unchanged between the reference pulses, this ensures that the sensor operates correctly in reverse.

P

Subject invention

A digital position function sensor containing memory channels whose outputs are connected to the inputs of the formation circuit.

counting pulses and a displacement sign forming signal circuit whose outputs are connected respectively to a counting input and a pulse counter reverse control input, characterized in that

extension of functionality, an additional memory channel, a reference pulse allocation circuit, a pulse code pattern selection circuit, a protection circuit, a descrambler, a bit selection circuit have been introduced into it,

a switch and a number input circuit for high-order bits, wherein the iBcex outputs of three memory channels are connected to the corresponding inputs 1M of the reference pulse separation circuit and the pulse code pattern allocation circuit,

one output of the reference pulse extraction circuit is connected to the input of the protection circuit and the decoder, the other to the low-order bits of the reversible counter, the second output of the displacement sign forming signal circuit

connected to the second input of the protection circuit, and its output is connected to a separate input of the pulse pattern selection circuit, one output of which is connected to the input of the decoder and through it to the bit selection circuit,

which is connected to the input of the switch, and the other with the input of the input scheme of numbers to the high bits of the counter, the output of which is connected to another input of the switch, the outputs of the switch are connected to the high bits of the reversible counter.

g (n-n)