SU534037A1 - Pulse counter - Google Patents

Description

The invention relates to automation and computing and can be used in the construction of specialized automation devices, computers, as well as in the construction of digital measuring devices.

A pulse counter is known that contains one-bit counters 1 connected in series.

However, the known counter does not have extensive functionality.

A pulse counter is also known that implements the operation of counting the number of pulses in such a way that the high bit of the current value of the number of pulses is permanently fixed in the high bit of the device. This allows us to simplify the interface of automation devices with computers, as well as simplify the design of digital measuring devices. The known device contains a distributor with t valves at the outlets and t scaling circuits with elements PI1LI at the inputs and operates as follows. In the initial state, the enabling signal is set at the first output of the distributor, whereby the counting input of the device is connected to the input of the higher non-counting circuit. When it is refilled, one impulse arrives at the distributor input, which connects the counting

the input of the device to the input of the next scaling circuit, and the unit is recorded in the high scaling circuit. The position of the enable signal at the outputs of the distributor indicates the number of bits of the device 2 involved.

However, such a counter cannot work in subtraction mode, which limits its functionality.

The purpose of the invention is to expand the functionality of the counter.

Claims (2)

This is achieved in that a pulse counter containing t reversible non-cutting circuits with OR elements at the input, the output of the i-th reversing conversion circuit connected to the nerve input of the (i-1) th element OR reversing distributor with t valves at the outputs, the second inputs of which are combined and connected through a delay element to the counting input of the device, an additional OR element is introduced, two additional valves, a code matching unit, the first inputs of the additional valves being connected to the corresponding control inputs y the device, the block matching block inputs are connected to the code outputs of the reversing scaling circuits, and the output is connected to the second input of the first additional valve, the third input of which is connected to the counting input of the device, and the output to the donor input of the m-ro element OR and through the additional element OR - with the counting input of the reversing distributor, the output of the higher reversing scaling circuit is connected via the second additional valve 5 to the input of the additional OR element switched on at the input of the higher reversing recalc tnoj scheme. The drawing shows a block diagram of the proposed imiulsov counter. The pulse counter contains a reversing valve 1, gates 2, elements OR 3, reversible counting circuits 4, an additional element OR 5, additional valves 6 and 7, a delay element 8 and a block 9 15 of matching codes. The meter has an input bus 10 and bus 11 and 12 control mode. The counter in addition mode works as follows. The permissive signal in the initial state is installed at the first output of the distributor, and the counting pulses through the delay element, the first valve 2 and the first element OR 3 are fed to the input of the higher interleaving counting circuit 4. When it overflows, the signal from the output goes through the open valve 6 to input element OR 3 and writes to the high scaling circuit 4 unit, and also enters the input of an additional element ORO 5 and shifts the distributor by one bit. The counting pulses come through the second valve 2 and the corresponding element AND LI 3 to the input of the next scaling circuit 4.35 In the subtraction mode, the counter works in the following way. Suppose that in a pulse counter there is some two-digit number and the counter is put into subtraction mode. In this case, the number 40 decreases as long as the unit remains in the highest scaling circuit, and the rest scaling circuits — zeros (for the considered example is -10), and at the output of the code-matching block 9 there is a 45 enabling signal, and the next counting pulse comes simultaneously to the counting input of the distributor 1 and the counting input of the higher conversion circuit 4, as a result of which the resolving potential at the output of the 50 distributor 1 switches to one bit to the left, in the older conversion circuit the number becomes zero. The same counting pulse through delay element 8 passes through 10 20 covered valve 2 and sets the number 9 in the high-level scaling circuit 4. Thus, in the subtraction mode, the high-bit number located in the pulse counter is also recorded in the high bit, If Since the pulse counter starts when the number in it is zero, then in addition mode it is necessary to set the unit in the first position of the distributor, and in subtraction mode - in the last. The proposed pulse counter possesses wider functional capabilities in comparison with the known ones, namely, it allows performing both summation and subtraction with fixation of the higher bit of the current value of the number of pulses in the higher bit of the counter. The invention includes a pulse counter containing m reversing scaling circuits with OR elements at the input, with the output of the i-th reversing scaling circuit connected to the first input of the (/ -1) th element OR, the reversing valve with m ventilators MI at the outputs, the second inputs of which combined and connected via a delay element to the counting input of the device, characterized in that, in order to expand the functionality, an additional OR element, two additional valves, a block of code matching are introduced into the counter, add the first inputs The gates are connected to the corresponding control inputs of the device, the inputs of the code match block are connected to the code outputs of the reversing scaling circuits, and the output is connected to the second input of the first additional gate, the third input of which is connected to the counting input of the device, and the output is connected to the additional input / output element OR, and through an additional element OR - with a counting input of a reversible distributor, the output of a higher reversing scaling circuit is connected through a second additional gate to the input of an additional Nogo-OR gate and to an input of OR gate included in the reversing input of scaling circuit older. Sources of information taken into account in the examination: 1.Korotkov AM and others. Electronic counters. M., “Energie, 1971. 2. Avt. St. USSR № 464973, cl. H OZK 23/02, 1973 (prototype).