SU204022A1 - DEVICE FOR MEASURING TIME INTERVALS - Google Patents

Description

Notifying devices for measuring time intervals that implement the method of converting an interval into a number of pulses and containing a push-pull master pulse generator, a divider, a driver, a recorder on serially connected pulse-phase elements with collecting circuits in the input circuits, a trigger and keys.

The proposed device differs from the known ones in that one of the outputs of the push-pull master oscillator is connected through a divider and driver directly to the inputs of the collective circuits of the phase-pulse elements of the high-level recorder and to the inputs of the collective circuits of its younger bits through an additional normally open key, the control input which is connected to one of the trigger inputs connected to the starting pulse and stop pulse supply buses, and the second output of the master oscillator is connected through a normally private key to the second input of the first registrar collecting circuit of the first bit, and the control input of this normally private key is connected to the second output of the aforementioned high trigger.

FIG. Figures 1 and 2 show the options for the device block scheme.

In the circuit shown in FIG. 1, in the key / closed storage mode, and the pulses from the quartz-stabilized generator 2 through the driver 3 and the "OR 4" circuits arrive as clock pulses at the phase-impulse multistable element (FIME) 5 of all bits, as well as at FIME 6, the output

the pulses of which are reference, and their phase is taken to zero. In order for the FIME state not to change, all those and only those pulses that go to the input of the support element 6 must be sent to its input. In the storage mode for the first discharge element 5, this condition is satisfied. However: 5 of the second bit, the output pulses of the element 5 of the first bit, in addition to the clock, are received through the scheme “OR 4”. Due to the coincidence in time of the two pulses in the scheme "OR 4 of the second discharge, they merge and enter the elements 5 as one pulse. The same thing happens on inputs

elements 5 of all subsequent bits. Thus, in spite of the presence of links between the bits at the input of each element 5, only clock pulses act, and transfer pulses do not store the information recorded in it, represented by the phase of the element's output pulses relative to the reference sequence. from the output of element 6. -Account mode. Starts with the arrival of the startTOBcird- pulse to the input of the trigger unit 7, which opens the key 1, and the pulses from the output of element 6 through the delay line 8 arrive at the input of the OR 4 circuit of the first bit. Since the signals at the inputs of the assembly do not coincide with each other in time, pulses with a different frequency in relation to the clock frequency arrive at the input of element 5 of the first bit. The phase of the output pulses from element 5 of the first bit changes by one with the arrival of each pulse of the reference sequence. The transfer of the transfer pulse to the element of the second discharge occurs only in the case of the element 5 of the first discharge from the delayed pulse. First of all, this provides a recalculation of n, where n is the accepted base of the number system.

The following bits work in the same way. When the pulse arrives, the stop key 1 is closed and the device enters the storage mode.

The described meter, with its considerable simplicity, has a relatively low resolution, since the reference sequence pulses with a low repetition rate are used to fill the measured time interval. Meanwhile, a slight complication of the scheme. It is possible to increase the resolution of the device by 10, 100 or more times (the resolution will be limited by the frequency properties of the formers, and a value of 0.1 ms can be reached relatively easily, and using tunnel diodes 10 ms).

In the device shown in FIG. 2, a higher-frequency push-pull generator 9 is used, clock pulses are generated from the output of the divider 10, and through the driver 11 are sent to all FIME 12, and two low-order bits through a normally open key 13.

The storage mode is the same as described above.

With the arrival of the starting pulse, the reset device 14 is started, all elements 12 are set to the zero position, and the trigger 15 tilts, opening the key 16 and closing the key 1. The pulses from the generator output 9 through the G assembly pass to the first discharge elements 12, after recalculation to ten - to the second, and after recalculation to one hundred - to the third bit. Since the clock pulses on the element 12 of the first and second bits do not arrive in the counting mode, they work like ordinary memory counters.

Almost all existing means can be used to visually induce the measurement result. The most economical is the method of transforming the phase shift into a proportional DC voltage, followed by output to a magnetoelectric device with appropriate devices (diaphragm, optical design) for digital induction. If necessary, an exit to digital printing can be easily organized.

Subject invention

A device for measuring time intervals that implements a method of converting an interval into a number of pulses and comprising a push-pull master pulse generator, a divider, a driver, a recorder on series-connected pulse-phase elements with collecting circuits in the input circuits, a trigger and keys, characterized in that increasing resolution and simplifying the circuit, one of the outputs of the push-pull master oscillator is connected via a divider and a driver. Directly to the inputs of the collector1 x diagrams of phase-pulse elements of the higher bits of the recorder and to the inputs of the collective circuits of its lower bits via an additional normally open key, the control input of which is connected to one of the trigger inputs connected to the starting pulse and stop pulse supply buses, and the second output of the master oscillator is connected through a normally private key to the second input of the collector circuit of the first digit of the registrar, and the control input of this normally private key is connected to the second output of the mentioned above the trigger.

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