SU178177A1 - - Google Patents

Description

Scintillation hodoscope output devices containing shift registers and counters are known.

The proposed device is characterized in that it comprises a counter connected to a source of shift pulses, a first coincidence circuit, the inputs of which are connected to the first digit of the shift register and the source of clock pulses, and its output is connected to the input of the blocking generator, the output of which is connected through a switch to the output device of the state of the counter on the perforator connected to the indicated counter, and the second coincidence circuit, the inputs of which are connected to the source of clock pulses and to the phase inverter, is connected with the first digit of the shift register, and its output is connected to an amplifier connected to the inputs of the shift register and the counter.

This shortens the time it takes to output information to a tape recorder or punch by encoding information with a binary code when working in encoding mode.

The drawing shows the block diagram of the device.

The diagram 4 matches. Scheme 4 matches and circuit 5 of communication with a digital computer are also blocked by an external trigger (not shown).

The operation of the control circuit begins with the release of the match 4 circuit by switching the external trigger to one of its states. In this case, the coincidence circuit 4 transmits the pulse of the clock generator 6 and

amplifier 7 to the input circuit 8 delay. The non-held pulse of the circuit 8 reads the information of one address of the main memory (not shown in the drawing) to intermediate 5U 9, and the delayed pulse through the amplifier 10 resets the counter 11 to its initial state, "I in the counter 12, the trigger of the first group of rings is transferred and transferred intermediate memory through amplifiers 13 on the shift register 14,

and also through the amplifier 15, a marker pulse is applied to the perforator 16. Circuits 2 and 3 are released with the flip-flop of the trigger 1 and the circuit 4 is blocked.

In this case, with the emitter follower 17

the bit of the shift register, when there is information on it, is blocked through a phase inverter 18, the circuit 2 matches, and the circuit 3 is released. As a result, the next clock pulse arrives at blocking oscillator 19. With blocking oscillator 19, switch 20 is applied to impulse circuit 21 and counter amplifier 22. Regulator 14 impulses register 14 by one bit and delays through circuit 23 "I to counter 12. As a result, the information (the number recorded in counter 12) goes through pits 24 or shapers 25 to a punch or tape recorder 16. At the same time, with a block polling by a blockG generator via circuit 26 pulses and on the circuit 28, 29, SO delay. When outputting to the perforator, delay circuits 29, 30 are used. A delay circuit 29 is used to output a punch ribbon feed pulse, and circuit 30 is used to block the matching circuits 3 and 4 for the duration of one punch cycle.

Delay circuit 28 is used when outputting information to a tape recorder. The switching of the delay circuits is accomplished by the switch 31.

If the first bit of the shift register is free of information, then the coincidence circuit 3 is blocked, and the coincidence circuit 2 is released and, therefore, the pulses of the clock generator 6 through amplifier 7 and coincidence circuit 2 are passed to the amplifier 22, the input of the coding counter 12 and the counter //.

The pulses of the clock generator through the circuit 2 coincidence pass until the normal information of the shift register turns out to be on its nerve discharge. In this case, the number dialed by the counter 12 corresponds to the number originally recorded in the shift register.

The capacity of the counter 11 is equal to the number of register bits, therefore, after checking all the bits of the shift register from the output of the counter 11, a pulse is invoked to call the next group of information from the intermediate memory 9.

In the control circuit, the next number is searched before the circuits 5 and 4 matches are released by pulses from delay circuits 28 or 30, since with the application of a polling pulse to the counter, a pulse is fed from the blocking generator 19 through the amplifier 22 so that, if the next register bit contains no information, the coincidence circuit 2 will be open for the clock pulses and close with the appearance of the information in the first bit.

In the order described, the information of the entire intermediate memory 9 is sequentially processed and printed.

For the described case, when the number of channels is 98, the intermediate memory information is output to the register in fourteen cycles. At the end of information processing

the fourteenth group of intermediate memory to the counter 12 will receive the 98th pulse, and from the decoder 32 of this number, the trigger 1 will be tilted through the amplifier 33 into the initial state. As a result, circuits 2 and 5 are blocked

When the circuit 4 coincides and is released, then the next clock pulse will pass to the delay circuit 8 and to read the information from the next address of the main memory.

The decryptor of the number 34, the switches 35 and 36 in the circuit are used when operating the information output device at input 1ДВЛ1 and at information output without encoding it. The output device is used in a scintillation hodoscope, but can be widely used in various computing devices and in other multi-channel systems.

Subject invention

A scintillation device output device containing shifting registers

and counters, characterized in that, in order to reduce the output time of the information format of a tape recorder or perforator by encoding information on the counter's counter, using a binary code when operating in encoding mode, the OIO contains a counter connected to a source of shift pulses; the first coincidence circuit whose inputs are connected to the nerve discharge of the shift register and to the source of clock pulses, and its output

connected to the input of the blocking generator, the output of which through a non-switch is connected to the output device of the state of the counter on the perforator connected to the specified counter; second match scheme

the inputs of which are connected to a source of clock pulses and to a phase inverter connected to the first bit of the shift register, and its output is connected to an amplifier, under the switch to the inputs of the shift

register and counter. And MP. siitid to the one-player r