SU1741102A1 - Device for simulating conveyer-type engineering system - Google Patents

Abstract

The invention relates to computing, technical controls and modeling. The device contains an imitation process control unit, a group of imitations of technological operations, registers of technical systems, registers of storage of operation modes of circuits, comparisons, total system operation time and simple system counters, a number of groups of elements I, which expands the field of application of the device by the introduction of means to improve the management of the conveyor technical system by determining the temporary equipment downtime during its operation. 1 hp f-ly, 4 ill., 1 tab.

Description

The invention relates to computing and control and can be used to develop optimal control of a conveyor technical system by simulating its operation.

A device for modeling technical systems is known, comprising a random voltage generator, a clock pulse generator, a switch, a failure simulator unit, a digital-to-analog converter unit, a technical system model, a failure-fixing unit.

The disadvantage of this device is the narrowness of its functionality. The device makes it possible to investigate the reliability of technical systems, taking into account the processes of aging, wear and deregulation, but makes it impossible to carry out a complete imitation of the operation of the technical system.

The closest to the present invention is a device for simulating a technical system of a conveyor type, containing a control unit for the simulation process, from the first to the mth block for simulating technological operations, from the first to the mth registers of the state of technical systems, from the first to (t-1 ) -th group of elements AND, by n-1 element AND in each group, from the first to (t -1) -th registers of storage of operating modes, from the first to (t-1) -th comparison circuit. The information inputs of the imitation process control unit and all the imitations of technological operations are connected to the device inputs of the same name. The address inputs of all simulation blocks of technological operations are connected to the inputs of the job number assignment of the device, the inputs of the input coordinates of the control unit of the simulation process are connected to the same inputs of the device. Permission entry

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The load of the control unit is connected to the device enable input. The input of the mode for each of the blocks of imitation of technological operations is connected to the device input of the same name. The inputs of the initial installation of the simulation process control block, all the simulation blocks of technological operations, all registers of technical systems and all registers of storage of operating modes are connected to the input of the initial installation of the device. From the first to the last output resolution of the recording of the simulation process control unit are connected to the recording inputs, respectively, from the first to the mth technological operation simulation unit. The clock output of the simulation process control unit is connected to the synchronization input of all technological operation simulation units. The output of each simulation block of the technological operation is associated with the descent of the entry of the corresponding from the first to the mth register of technical systems, the information input of each of which is the device inputs for supplying a signal of a logical unit. The first outputs of the first PL-1 registers of technical systems are connected with the first information inputs of the first t-1 registers of storage of operating modes and with the first inputs of the first groups of the input of the first t-1 comparison circuits

The inputs from the second to the nth first groups of inputs of the first t-1 comparison circuits and the information inputs from the second to the nth registers of storing the operating modes from the first to (t-1) -th are associated with the outputs of the AND elements corresponding to the first to ( t-1) -th group so that the output of the first element AND of the group is connected to the second information input of the storage register of operating modes and the second input of the first group of inputs of the comparison circuit, the output of the second element AND of the group is connected to the third information input of the storage register of operating modes and the third input first group in odov circuit comparing output of the last

The (n-1) -th element of the AND group is connected to the nth information input of the operation storage register and the nth input of the first group of inputs of the comparison circuit. The outputs from the second to the nth all registers of technical systems are connected to the inputs of the AND elements. the corresponding group of elements And so that the K-th output of the register of technical systems is connected to the first input (K-1) of the element a of the AND group, the second inputs of all the elements and groups are connected to the corresponding outputs of the registers of the technical systems so that the second

the inputs of the elements of the K-th group are connected to the corresponding outputs of the (K + 1) th register of technical systems. The outputs of each register of storage of operating modes are connected with the second group of inputs of the corresponding comparison circuit, the outputs of the comparison circuits are connected to the inputs of the entry of the corresponding registers of storage of modes works and to managers

0 inputs of simulation operation blocks, so that the output of the Kth comparison circuit is connected to the input of the entry K-ro of the storage register of operating modes and with the control input of the (K + 1) -th block of the simulation of technological operations Last lth output m- The ro of the state system technical register is connected to the reset input of the simulation process control unit, whose information outputs are 0 with the device outputs for issuing information about the device operation time. The outputs of all technical system status registers serve as output data of the pump SRI system of inputs for supplying a signal

The 5 logical O of all simulation blocks of the technological operations except the first one are the corresponding inputs of the device.

The disadvantage of this device is the narrowness of its functionality. The device makes it possible to make an estimate of the total execution time of a set of works by a technical system and the execution time of a system group.

5 operations of the group of works, determine the state of the system (according to the performance of work by it) at any pre-specified point in time. but makes it impossible to identify bottlenecks - to determine equipment downtime

0 (system devices) during system operation

The purpose of the invention is to expand the field of application of the device by introducing means allowing to improve the management of the conveyor technical system by simulating the operation of conveyor systems with the possibility of determining the temporary downtime of equipment (system devices) during its operation.

0 The goal is achieved by the fact that

into a device for imitation of a conveyor-type technical system containing an imitation process control unit, m imitation blocks of technopological operations, m pe5 history systems of technical systems, t-1 groups of n-1 elements And, t-1 registers of storage of operating modes, m 1 comparison circuits, the information inputs of the simulation process control block and the information inputs of all the simulation blocks of technological operations are connected to the information inputs of the device, the inputs of the job numbers of all the simulation blocks of technological operations connected to the corresponding device inputs, input coordinates of the device, the load enable input of the simulation control unit is connected to the device load enable input, the mode setting input of each of the process operation simulation blocks is connected to the device mode setting input, the initial settings of the simulation process control unit are all blocks of imitation of technological operations, registers of the state of technical systems and registers of storage of operating modes are connected to the input of the initial mouth The device, from the first to the m-th outputs of the recording resolution of the simulation control unit are connected respectively to the recording resolution inputs from the first to the m-th simulation blocks of technological operations, the clock output of the simulation process control block is connected to the synchronization inputs of all m simulation blocks of technological operations, the output of each simulation block of technological operations is connected with the input of the entry of the corresponding from the first to the mth registers of the state of technical systems, the information input of each of which is The input of the device for signaling a logical unit, the first outputs of the first T-1 registers of technical systems are connected to the first information inputs of the first T-1 registers of storage modes of operation and the first inputs of the first groups of inputs of the first T-1 comparison circuits, the inputs from the second through the nth first groups of inputs of which and informational inputs from the second to the nth registers of storage of operation modes from the first to (t-1) -th are associated with the outputs of the AND elements corresponding to the first to (t-1) -th group so that the output of the 1st (I 1, 2 ,, ,, ,, n-1) element And groups You are connected to the (1 + 1) -m information input of the storage register of operating modes and the (1 + 1) input of the first group of inputs of the comparison circuit, the outputs from the second to the n-th registers of technical systems are connected to the inputs of the AND elements the corresponding group of elements And so that the K-th output of the register of technical systems is connected to the first input of the (K-1) -th element of the AND group, the second inputs of all the elements of the AND groups are connected to the corresponding outputs of the registers of the technical systems so that the second the inputs of the elements and the k-th group are connected with the corresponding current outputs (K + 1) -th register

the state of technical systems, the outputs of each mode storage register are associated with the second group of inputs of the corresponding comparison circuit, the outputs of the comparison circuits 5 are connected to the input inputs of the corresponding operation mode storage registers and to the control inputs of the technological operation simulation blocks so that the output of the Kth comparison circuits are connected to the input of the entry of the K-th register of operating modes and with the control input (KN) of the imitation block of technological operations, the n-th output of the m-ro register of technical systems with one with

5, the reset input of the simulation control unit, whose information outputs are the outputs of the device for issuing information about the device operation time, the outputs of all technical system status registers 0 serve as system status data outputs, inputs for giving a logical signal O of all technological operation simulation blocks , besides the first, are the corresponding inputs of the device, m total meters of the total operating time of the systems and T-1 time meters of the simple systems are entered, the inputs of the initial installation and the input s complete synchronization of all counters of time

0 of the systems and all time meters of the simple systems are connected respectively to the input of the initial installation of the device and the clock output of the simulation process control unit, the n-th output of the first register of the state of technical systems is connected to the count resolution input of the first counter of the total operating time of the systems, nth the outputs from the second to the m-th registers of the state of technical systems are associated with the first inputs of the counting resolution from the second to the m-th counters of the total operating time of the systems and with the first inputs of the counting resolution of all the counters in In other words, simply the systems so that the n-th output of the K-th register of the state of the technical systems is connected to the inputs of the K-th counter of the total operating time of the systems and the (K-1) -th time counter of the systems, the first outputs are from the first to (t -1) -th technical system status registers are linked

0 with the second inputs of the account resolution from the second to the m-th counters of the total operating time of the systems and with the second inputs of the resolution resolution of all the time counters of the simple systems so that the first output of the K-th

The 5th status register of technical systems is connected to the inputs (K + 1) of the total operating time counter of the systems and the Kth time counter of just systems; the outputs of blocking the account from the second to the mth block of the simulation of technological operations are connected to the third inputs of the resolution enable from the first to (t-1) -th time counters of just systems so that the output of the K-th block of simulation of technological operations is connected with the input of the {K-1) -th time counter of just systems, the outputs of all counters of the total operating time of the systems are the outputs of the device for issuing information The information about the total operating time of the systems, the outputs of all the time counters of just the systems serve as the outputs of the device for issuing the time data of just the devices of the system.

The imitation process control block contains a decoder, a delay element, a pulse impulse, a counter, a register, and cvoi-block last, the output of which is connected to the input of the stop of the pulse generator, the reset input of which is the reset input of the block, and the start input the input of which and the reset input of the counter are connected to the input of the initial installation of the block, the output of the pulse generator is connected to the clock output tviOKa and to the counting input of the counter, the outputs of which are connected to the information outputs of the block and to the first inputs The pressure circuit, the second inputs of which are connected to the register outputs, whose information inputs are connected to the information inputs of the block, and the input input is connected to the output of the first digit of the decoder, the outputs of the other ojs of which are connected to the first through in-u outputs of the 1si block, The information and control codes of the decoder are associated with the inputs of the input coordinates and the block load resolution.

The essence of the invention is that the device makes it possible to improve the management of the conveyor technical system by simulating its operation with the ability to determine the temporary downtime of equipment (system devices) during its operation. The known device does not provide such a possibility.

1 shows a functional diagram of the device; figure 2 - scheme of the first block of imitation; FIG. 3 is a diagram of the second simulation block; Fig. 4 is a block diagram of a simulation process control unit.

A device for simulating a conveyor-type technical system contains informational 1 inputs, inputs 2 input coordinates, input 3 loading permissions, inputs 4 assignments of job numbers, input 5 assignments of the mode, input 6 of the initial installation, block 7 of the simulation process control, the first

8.1, the second 8,2rn-th 8.t blocks of imitation

technological operations, the first 9.1, the second 9.2m th 9.t registers of the state of technical systems, the first 10.1, the second

10.2t th 10.t full time meters

system operation, the first 11.1, the second

11.2, ..., (t-1) -th 11, t-1 time counters of just systems, the first 12.1, the second 12.2 (t1) -y 12, t-1 groups of elements And n-1 elements And in each group , the first 13.1, the second 13.2, ..., (t-1) th 13.t-1 registers of storage of operating modes, the first 4.1, the second 14.2,. ,,, (t-1) -th N. t-1 comparison circuits, outputs 15 for outputting information about the operating time of the device and 16 data on the state of the system, outputs 17 for issuing information on the total operating time of the systems, and outputs 18 for issuing data about the time of just devices of the system,

The first block of imitation of technological operations contains information

19 inputs, inputs 20, job numbers, inputs, mode 21, write resolution 22, synchronization 23 and initial setting 24, switch 25, first delay element 26, address counter 27, second element AND 8, main memory node 29, first element I / I 30, operation duration counter 31, single-vibrator 32, second delay element 33, output 34 of the block.

Second (third, fourth) block

imitations of technological operations contains informational 35 inputs, inputs 36, setting job numbers, setting inputs for mode 37, recording resolution 38, control input 39, inputs for initial setup 40 and synchronization 41, switch 42, first element 43, address counter 44, element 45 delay, the node 46 RAM, the second element And 47, the counter duration of the operation 48, the trigger 49, the one-shot 50, the output 51 of the indication of the end of the operation and the output 52 of the account lock.

The simulation process control block contains information inputs 53,

input coordinates 54, load enable inputs 55, setup 56 and reset 57, decoder 58, delay element 59, pulse generator 60, counter 61, register 62, pressure circuit 63, information outputs 64, clock output 65, write resolution outputs 66.

The first block of imitation of technological operations contains the following links. The information inputs of the RAM node are connected to the information inputs of the block, the first group of information inputs and the control input of the switch are connected respectively to the job number job inputs and the job input

the block mode, the control input of the RAM node is connected to the block write resolution input, the inputs of the initial installation of the address counter and the one-one, the input of the first delay element and the first input of the first element I are connected to the input of the initial installation of the block, the count input of the operation duration counter connected to the synchronization input of the block, the output of the first delay element is connected to the first input of the second element I, the output of which is connected to the input of the recording of the operation duration counter, and the second input through the second element the delay is connected to the one-shot output, which is connected to the second input of the first element I and to the counting input of the address counter, the outputs of the address counter are connected to the second group of information inputs of the switch, the outputs of which are connected to the address inputs of the operating memory node, the outputs of which are associated with the installation the inputs of the operation duration counter, the control input of which is connected to the output of the first element I, the output of the operation duration counter is connected to the trigger input of the one-shot, the output of which is connected n to the output of the block.

Second (third, fourth) block

imitation of technological operations contains the following links. The information inputs of the operating memory node are connected to the information inputs of the block, the first group of information inputs and the control input of the switch are connected respectively to the inputs of the job number assignment and the input of the block mode assignment, the control input of the RAM node is connected to the write enable input of the block, the initial setup inputs the address counter, one-shot, zero trigger input and the first input of the first element And connected to the input of the initial installation of the block, the first input of the second element And connected to the input of the syn block synchronization, the input of the delay element and the installation input into the trigger unit are connected to the control input of the block, the output of the first element I is connected to the control input of the operation duration counter, the initial installation inputs, the recording input and the counting input of which are connected respectively to the outputs of the operating memory node the delay element and the second element And the second input of the second element And is connected to the direct output of the trigger, the information input of which is the input of the block for supplying a logical zero signal, and the input It is connected to the output of the signal about the zero state of the operation duration counter,

the output signal of the zero state of the operation duration counter is connected to the one-shot trigger input, the address inputs of the RAM node are connected to the switch outputs, the second group of information inputs of which are connected to the address counter outputs, whose counter input and the second input of the first And element are connected to the vibrator output is one0 and is connected to the output of the indication of the end of the operation of the block, the direct output of the trigger is connected to the output of the blocking account block.

5 A conveyor technical system is any set of devices that perform all the work entering the system in the same order (all work consists of a sequence of operations, each of which is performed by a corresponding device). We assume that the conveyor technical system consists of m devices and performs n jobs. Each job is performed sequentially on

5 devices 1, 2, implementing, respectively, the first, second m-th operation

this work. On any device i, the next operation starts immediately after it is performed by device 1-1, immediately preceding device I (if device I is free) or after releasing i from previous work (if device i is busy). The time for performing any operation of each job is appropriate

5 of this operation, the device is considered known. If by the time the device I is released from performing work j, device I has yet completed the execution of work j + 1, then device i is forced to idle until the device is released 1-1 (with 22 l m).

The device works as follows.

From an external source (for example, computer memory), information corresponding to the time spent by the technical system devices on each operation of each of the works is entered into the device. This information

0 is written to the RAM nodes that are part of the process simulation simulation blocks. Depending on the signal level at the input. The control of the RAM node works as follows

5, if at this input there is a signal of a single level, then at the outputs of the RAM node there is information read from a cell whose address is presented at the inputs of the task

job numbers block. This is the mode of reading information. If a negative polarity impulse takes place at the control input, then the cell whose address is presented at the inputs of the job numbers is recorded with the information presented at the information inputs. This is the mode of recording information. To write information to the memory nodes, a unit level signal is input to input 3 of the device boot, and a zero level signal is transmitted to input 5 of the device mode setting, which switches switches 25 (first 8.1 operation block) and 42 (second 8.2, third 8.3 , .. ,, gp-y 8, gp blocks of operation) to the state in which information passes to their outputs, presented at the inputs of the first group. Then, a code is supplied to the input inputs of the coordinates of device 2. the determining unit of imitations of technological operations (i.e., a memory storage unit) to which information will be recorded. This code goes to the information inputs of the decoder 58 of the control unit of the simulation process 7. After that, the inputs of the job number 4 and the information 1 inputs of the device are given respectively the cell address of the RAM node and the information for recording. A negative-polarity pulse, then fed to input 3 of the device loading, passes to the control input 7 of the same name and crashes the encryption of the op 58. At one i of the outputs of the decoder (namely, the output corresponding to the code at the input 2 of the input coordinates of the device) has place a negative polarity impulse (at the other outputs of the decoder there are signals of a logical unit). This pulse records information in the memory node. After that, the next address (job number) and information for recording are fed to the inputs 4 and 1 of the ycipony and written to the next cell of the RAM node, etc. After completion of writing to the next block of random access memory, the code that defines the next block of simulation of technological operations (the next node of the random access memory), etc., is supplied to the inputs of the input coordinates of the device 2. After the information has been written to all the RAM blocks, a unit level signal is sent to the input 5 of the device mode setting, bringing the switches 25 and 42 into a state where the information presented at the inputs of the second group passes to their outputs.

In block 8.1 the information corresponding to the time of the first operation of each work is stored, in block 8.2 - information corresponding to the time of the second operation of each of the works, .. ,,, in block 8.gl - information that corresponds to the time of the main operation of each of work, At this (I) -m (1 i t) addresses of node 29 and operative memory node 46 information is recorded about the time of each operation of the 1st work (recalculation of addresses of memory nodes starts from zero): ) -at node address 29 - the first operation of the 1st

work, at (-1) -th addresses of nodes 46 - the second operation of operation (block 8.2), the third operation of the i-th work (block 8.3) ..., --th operation of the m-th work.

According to the information inputs 1 of the device, from an external source, the register 62 of the control block 7 of the simulation process records information corresponding to the monitoring time. To implement

recording information to the inputs 2 of the input coordinates of the device is supplied with a code corresponding to register 62 (the total number of coordinate inputs of the device must therefore not be less (Iog2m +1).

After that, the information inputs 1 of the device are supplied with information for writing to the register. The impulse of the negative polarity then fed to the input 3 of the device load resolution causes the decoder 58 to operate. A negative polarity pulse from the output of the B8 decoder passes to the input of register 62 and, with its front O - / 1, records information presented on the information inputs of register 62 ( on the information inputs of the device 1).

To bring the device back to its initial state 6, a pulse of the initial setting of negative power is applied to the input, by which all blocks of the operation are reset to the initial state, if the registers of the technical systems and operating mode storage, as well as the counter 64 of the simulation process control block 7 transferred to the zero state and on the front delayed by the element 59 of which the generator 60 of the control unit 7 starts to process clock pulses. Since the initial setup signal registers

9.1.,., 9.t and 13.1 ,. ., 13.t-1 is transferred to the zero state, on the first and second groups of inputs of 14.114.t-1 circuits of the comparison

the same combinations of signals are present, and the comparison circuits produce

single level signals. In the initial state, the blocks 8.18.t are configured for the first operation.

Namely, block 8.1 is configured for the first operation of the first job, block 8.2 for the second operation of the first job, ..., block 8.t for the th operation of the first job. At the outputs of these blocks there are single level signals. With a delay (element 59 of block 7} after the end of the pulse of the initial installation of block 8.1 of the operation, synchronized with clock signals arriving at its input 23 from the output of generator 60 (i.e. from the clock output 65 of block 7 of the simulation process control) begins counting the execution time the first operation of the first operation. The blocks 8.28.t continue to remain in the initial state. In this state, the device remains until the next clock signal arrives in block 8.1, under the control of which the time will run nor the first operation of the first operation (the sequence number of this clock signal is equal to the number of units of time spent by the first device of the technical system to perform the first operation of the first work). Immediately after that, i.e. before the next clock signal arrives, block 8.1 tunes to the first operation of the second operation, and at its output a short negative pulse appears, the duration of which is less than the duration of the pause between the clock signals. Block 8.1 continues to work similarly, now counting down the time for performing the first operation of the second work, and the following changes occur in the operation of the device.

The falling edge of the signal from the output of block 8.1 to the first digit of the first 9.1 state system technical register is recorded 1. On the leading edge 0 1 of the signal from the output of block 8.1, 1 appears at the first output of register 9.1 (at the output of the first register bit) . A single signal from the output of register 9.1 arrives at the first input of the first group of the comparison circuit 14.1. Due to the mismatch of the combinations on the first and second groups of inputs of the comparison circuit 14.1, a zero level signal appears at its output. The output of the circuit 14.1 is connected to the input of the register entry 13.1 of the storage of the operating mode recording information on the falling edge of the signal on the input of the entry. Thus, a change in the signal level from 1 to O at the output of the comparison circuit 14.1 leads to the recording of information in register 13.1. As a result, the combinations of signals in the first and second groups of inputs of the circuit 14.1 coincide, and it produces a single-level signal. Thus, at the output of the comparison circuit 14.1, a negative polarity pulse occurred. This pulse arrives at the control input of block 8.2 and allows time countdown for the second operation of the first operation. If we make an analogy with the operation of the conveyor technical system, by this time the first device of the system has completed the first operation of the first work and the beginning of the first operation of the second work, and the second device has started the second operation of the first work.

The appearance of a second negative pulse at the output of block 8.1 indicates the completion of the first operation of the second work. At the output of the second bit of the register 9.1, the state of the technical systems appears 1.

The appearance of the first negative pulse at the output of block 8.2 indicates the completion of the second operation of the first operation. At the output of the first bit of register 9.2, 1 appears, which causes the appearance of a negative pulse at the output of the comparison circuit 14.2, and block 8.3 is included in the work, counting the time for performing the third operation of the first work.

Suppose that the appearance of the second (third, ...) negative pulse at the output of block 8.1 is preceded by the time of the appearance of the first negative pulse at the output of block 8.2. Block 8.1 starts counting the time of the first operation of the third (fourth, ...) work, and block 8.2 continues to count the time for performing the second operation of the first work. In this situation, the second operation of the second (third, ..,) work waits for the completion of the second operation of the previous work. As soon as this happens, at the output of block 8.2, a negative pulse is recorded, recording 1 in the first register register 9.2 of the state of technical systems. At the output of the first element 1/1 of the group 12.1 in TC 1 (i.e. there is a transition). resulting in a negative pulse at the output of the circuit 14.1, allowing time countdown for the second operation of the second operation (block 8.2).

Suppose now that the appearance of the first negative pulse at the output of block 8.2 precedes in time the appearance of the second negative pulse at the output of block 8.1. This means that the execution of the second operation of the first operation is completed, but the second device of the technical system that performed it waits for the first device to finish the operation of the first operation of the second operation. The appearance of a second negative pulse at the output of block 8.1 causes the appearance of a negative pulse at the output of comparison circuit 14.1, which allows time counting for the second operation of the second operation.

Further, the device operates in a similar way.

The occurrence 1 at the output of the nth digit of the register 9.t of the state of the technical systems indicates that the execution of the mth operation of the nth work, i.e. All work technical system performed. This single-level signal passes to the fault input of the generator 60 of the simulation control unit 7 and causes the generator to stop. At the outputs 15 of the device connected to the outputs of the counter 61 (i.e., the outputs 64 of block 7), information on the operating time of the device (technical system) is presented.

The control unit of the simulation process 7 allows analyzing all sorts of situations arising during the operation of the device, i.e. analyze the state of the device at any predetermined point in time. So, if the state of the device at the moment of time t (control time) is of interest, then when the register 62 of the block 7 is loaded, information corresponding to the time t is written in it. When the counter 61 of block 7 reads up to this point (the counting input of counter 61 receives clock signals from the output of the gene- 60), the pressure circuit 63 (completed: a comparison circuit) of the block 7 generates a positive polarity signal passing to the input of the generator 60 stop and stopping it (if the combinations do not match on the first and second groups of inputs of the pressure circuit 63, a zero level signal occurs at its output). At outputs 16 of the device, information about its state is presented.

If you are interested in the total operating time of a technical system during the performance of all work, then when register 62 is loaded, information corresponding to the time that is known to exceed the execution time of all work is recorded in it. The operating time information is fed to the outputs 15 of the device.

Registers 9.19.t. of the state of technical systems - n-bit push-pull registers with recording information in the first stage on the falling edge of the signal

at the input of the entry and with the census of information in the second stage on the leading edge of the signal at the entry of the entry. The input of the first bit of each of the registers is connected to a logical unit. The inputs of each of the subsequent bits are connected to the output of the previous one. The presence of 1 at the output of the i-ro bit of the j-ro register means that by this time j, the operation of the 1st job has been completed (1 i n, 1 j m).

Consider the work of blocks 8.18t

imitations of technological operations.

The signal of the initial installation (negative polarity pulse), fed to the input 24 of block 8.1 and to the inputs 40

blocks 8.28.t, address counters 27 (block

8.1) and 44 (blocks 8.2, ..., 8.gl) are transferred to the zero state, at the outputs of one-vibrator 32 (block 8.1) and 50 (blocks 8.2 ..., 8.t) appear ( guaranteed) signals of a single level, at the output of the counter 31 (block 8.1) and a signal about a non-zero state of each of the counters 48 (blocks 8.28.t) there appear signals of a zero level. Since all the counters 27 and 44 addresses are reset, and

Since switches 25 and 42 transmit signals from the inputs of the second group to their outputs, then information about the first operation is present at the outputs of the RAM nodes. Next, we consider the operation of blocks 8.1 and

8.28 gp separately.

Block 8.1. The zero signal level of the initial installation blocks the operation of the element And 30, at its output there is a signal of zero level, under the influence of which

the counter 31 is transferred to a state in which a zero level signal occurs at its output. After the expiration of the negative pulse of the initial installation, a single level signal is constantly present at the first input of the element 30, allowing the signal from the output of the one-vibrator 32 to the control input of the counter 31 to pass.

Under the influence of a negative initial impulse, a single level signal appears at the output of the one-shot 32. Delayed by element 33, this signal arrives at the second input of element 28. The parameters of element 26 are such that the delay formed by it exceeds the delay formed by element 33 by duration. Thus, by the time when the output of element 26 is delayed

17 174110218

(differential) negative impulse Suppose that the number written in

the initial installation, the output element of the counter 31 is not zero. Incoming on

33 unit level is already present. The input of the 23 block clock signals is passed to

Thus, a change in the level of the signal-input of the synchronization of the counter 31 and the decrement at the first input of the E 285 element mentates it. The next clock signal causes the same signal change on its counter 31, and at its output it has an output. The front signal is the start of the transition. Further, the block 8.1 is set by the delayed element 26, it operates in the same way, the duration counter 31 records the parameters of the one-shot 32 and the element of the first operation of the first operation. 10 and delays 33 are such that the time interval is later on at the first input of the element From the trailing edge of the pulse () from 28, a single-one-output single-up signal to the leading edge of the th level is constantly present, allowing the passage of a signal-pulse () at the output of the hall element produced by the single-vibrator 32 and shorter a pause between the delayed element 33, the output of the ele-15 two adjacent clock signals. This cop (fronts of these signals — ensures stable operation of block 8.1; information is entered into the counter; Thank you for introducing a delay formed during the operation of the device) by element 33, the negative one itself. The operation of block 8.1 (and the entire pulse at the control input of the device counter 31) begins after the end of 20, precedes in time the change in the level of the negative pulse of the start-n signal 0 - U1 at the input of the counting installation. With a delay, the formed 31, i.e. control and write operations by element 59, after the arrival of front 1 are spaced out in time. Formed by the initial installation signal, the block 7 by the control 33 delay ensures that the clock begins to generate the clock signal to the address counter 27 and the node 29. The parameters of element 59 are such that the operative memory (read mode) until the duration of the delay of the arrival of the front of the signal at the input exceeds the duration of the delay, the pre-entry of the counter 31, i.e. provides the element 26, which is charged by element 26 (this ensures that correct information is written to counter 31 (about stable operation of block 8.1 at the beginning of -30 time of the next operation), counting the time of the first opera — consider block 8.2 (blocking the first work). 8.38 .gl work similarly).

If the number recorded in the counter 31, the non-zero signal level of the initial signal is zero, then O remains at its output, the insertion blocks the operation of the AND 43 element, and otherwise the output is from-35 at the output of the signal zero change of signal 1. Single-Vibrator The 32 level, under the influence of which the counter is triggered by the signal front () on 48 and is transferred to the state in which the start input, therefore a change in the signal on its output of the zero state signal on the output of the counter 31 leads to a zero level signal, and Starting PC monostable 32, the output 40-koto output signal of non-zero state - by cerned is a short negative signal im single layer. After the end of the pulse, which increments the pulse counter 27 of the initial setup pulse to the addresses and which, through element 30 and the post-first input of the element 43, constantly hits the control input of the counter 31. There is a signal of a single level, the result is at the outputs of the node 29 An operational 45 signal passing from the memory output appears information about the time of the single-vibration 50 to the control input of the first operation of the next pa-counter 48,

bots, and at the output of the counter 31, the initial setup impulse appears at a zero level. From the output of the one-shot 32et to the zero input of the trigger 49 and translates

a negative impulse arrives at the exit50 of its zero state. Zero Signal

34 block. In addition, this pulse, the back-level from the output of the trigger 49 goes to the jannous element 33, through the element 28 of the input element 47 and blocks the input to the input of the counter 31, which is the clock signal from the input 41 of the block at its front, enters the counter input the counter 48. Negative information from the outputs of the operational node 55, the pulse at the input 39 of the block 8.2 sets the memory. If countdowner 49 was written to the counter in the unit, thereby resolving zero, then block 8.1 continues the clock signal passing to the counter in a similar way: the output of the counter 3-1 is the input of the counter 48. A delayed element will have a transition, etc. 45 the pulse front from input 39 goes to

the entry entry of the counter 48, and in the counter information is recorded from the outputs of the node 46 of the RAM. If zero is recorded in counter 48, then a 1L # 0 transition occurs at the output of the signal about the zero state of the counter. This change in the signal at the output of counter 48 entails entering zero into the trigger 49, thus blocking the passage of clock signals to the counting input of the counter 48 A change in the 0 41 signal at the output of the signal about the zero state of the counter 48 triggers a one-shot 50, a negative pulse from the output of which goes to the output 51 of the AND block, moreover, increments the address counter 44 and through the element 43 And goes to the control input account Sensor 48 At the output of the signal about the zero state of the counter, a zero level appears.

If a non-zero number is written to counter 48, then the clock signals from input 41 through element 47 also go to the counter input of the counter and decrement it. The next clock signal flushes counter 48, and a 1 transition is observed at the output of the signal about zero. Then block 8 2 functions in the same way.

The delay element 45 is necessary for temporarily loving the operation of the block 8.2 and the device, since the time interval between the pulses at the output 51 of the block and at its input 39 can be very significant

Let us consider the operation of the device to simulate a technical system of a conveyor type to determine the total operating time and time just K-i o the device of the system. The total time of the K-ro device's operation is the time interval (number of clock pulses) between the arrival of the first job on the K device of the system (the imitation of technological operations 8.K starts counting the time for the K-th operation of the first job) and the end of the last n-th work on the K-th device of the system (imitation of technological operations 8.K has finished the countdown for the K-th operation of the last work). The time constant of the K-ro device of a system is defined as the sum of the time intervals during which the K-th device, having performed the K-th operation of the next work i (1 i n-1), does not start the K-th operation of the next work i + one. The idle time can be caused by the fact that by the moment of completion of the K-th operation of work i the execution of the (K-1) -th operation of 1 + 1 has not been completed (i.e. the technological operations simulation block 8.K has completed the countdown for K operations of the i-th work, and block 8.K-1 has not yet completed the countdown time for (K-1) -th operation (M) -th work). Downtime is possible on all devices of the system, except the first.

The accumulation of information about the total operating time of the K-th device of the system is carried out by the corresponding counter 10. To the total operating time of the systems, about the time simply by the corresponding counter 11. K-1 time is just the systems The time is counted by all the counters

the impact of clock pulses generated by the block 7 of the process control simulation. When the device is initialized under the influence of the initial setup pulse, all counters are reset to the initial

the zero state, and the outputs 17 of the total time information and the 18 time data are simply (system devices) of the systems for simulating, there are zero level signals.

In order to realize the function of counting the total operating time of the K-th device of the system, the operation of the corresponding counter 10.K is blocked until the start of recalculation of the time for the K-th operation of the first operation

(with the exception of the counter 10.1, which starts counting immediately after the end of the deisty pulse of the initial setup) This moment of time coincides with the instant of appearance of the signal of a single level

the output of the first bit of the register 9.K-1. The appearance of the signal of the unit level at the output of the n-th bit of the register 9. K indicates the end of the execution time of the Kth operation of the nth job (the simulation workflow block 8.K has finished for all works) and blocks the operation of the counter 10.K. Thus, the operation of the counter 10.1 is blocked by a single level signal at its input (direct) resolution

the account coming from the output of the n-th bit of register 9.1, and the operation of the counter 10. K (2 K t) is blocked by signals of a single level at the first input of the counting resolution (direct) coming from the output of the n-th

register bit 9.K and zero at the second input of the account resolution (inverse), coming from the output of the first bit register 9.K-1.

Blocking on the first and second inputs of counter counting

11,111.GP-1 is carried out similarly

blocking counters 10.210.t. For

prevent the 11K counter from tripping while the corresponding

8.K + 1 block counts the time for the Kth operation of some work, the account is locked; to the third input of the resolution of the (direct) counter 11.Ks of the output 52 of the block 8.K-1 a prohibitory signal of the unit level is given. In accordance with the logic of operation of block 8.K-1, the trigger 49 is set to one state only for the time during which the counting is carried out for the operations performed by the block. In all other cases, i.e., until the block starts working (until the first operation system arrives at the K device) and during block idle times, the trigger 49 is in the zero state, and the signal from its output does not block the counter 11. K.

The table shows the modes of operation of the counters 10.1, 10.K (2 K t), 11, K (t-1).

During the operation of the device, at outputs 17 and 18 there is information about the total time and data about the downtime of the system devices. Information and data make sense at any time the device operates as accumulated during the corresponding simulation time presented at the outputs 15.

Thus, the proposed device, in contrast to the analog, allows to improve the management of the conveyor technical system by simulating its operation with the ability to determine the temporary downtime of equipment (system devices) during its operation.

The most appropriate use of the proposed device is in order to imitate the operation of technical systems, the criteria for evaluating the quality of operation of which are the total execution time of the totality of work, the equipment load factor, the maximum duration of equipment downtime, etc. The device makes it possible to estimate the total execution time the set of works by the technical system and the time of the system execution by the group of operations of the group of works, allows to determine the state of the system (according to its performance bot) at any given time in advance. The device also allows detection of narrow spaces, i.e. identify equipment downtime (system device) during system operation. With the help of the proposed device, tasks of optimal ordering of works can be solved, performed by the system.

To evaluate the advantages of the device, let's compare it with the base object, which we will consider as an algorithm for studying a conveyor technical system. The device simulates the process of functioning of the system under study by a physical process that usually takes place on a different time scale, but with an unambiguous correspondence between the parameters of the model and the original. At the same time, in contrast to computer simulation (using the above algorithm), the proposed device uses not a mathematical model, but a physical analogue of the system under study (electrical circuit). The use of the proposed device in the study of a conveyor technical system allows us to significantly reduce the time of research and the cost of computer time (computer time) required to simulate (research) the system,

Claim 1. Device for imitation of a technical conveyor-type system containing an imitation process control block, m imitation blocks of technological operations, m registers of technical systems, t-1 groups of n-1 And elements, t-1 registers of operating mode storage, t-1 comparison circuits, informational inputs of the simulation process control unit and informational inputs of all m process simulation blocks are connected to the information inputs of the device, the job assignments of job numbers of all m technology simulation blocks The main operations are connected to the corresponding inputs of the device, the inputs of the input of the control unit of the simulation process are connected to the inputs of the input coordinates of the device, the enable input of the load of the control unit of the simulation process is connected to the input of the permission of the device load, the input of the mode setting of each of the simulation workflow blocks device mode, the inputs of the initial installation of the imitation process control block, all m blocks of imitation of technological operations, state registers Historical systems and storage registers of the operation modes are connected to the input of the initial installation of the device, the first to the tth outputs of the recording recorder control unit write resolution are connected respectively to the recording enable inputs of the first to the mth process operation simulation blocks, the clock output of the process control block is imitation is connected to the synchronization inputs of all blocks of imitation of technological operations, the output of each block of imitation

technological operations are connected with the input of the entry of the corresponding from the first to t registers of the state of technical systems, the information input of each of which is the input of the device for supplying a signal of a logical unit, the first outputs of the first t -1 of the registers of the technical systems are connected to the first information inputs of the first t-1 registers of storage of operating modes and with the first inputs of the first groups of inputs of the first t-1 comparison circuits, the inputs from the second to the n-th first groups of inputs of which and the information inputs from the second to the nth the first to (t − 1) -th mode storage registers are associated with the outputs of the AND elements corresponding to the first through (t − 1) -th groups so that the output i-ro (I 1, 2, ..., p -1) An AND group element is connected to the (1 + 1) -th information input of the storage register of the HOOOG modes and the (I1) -th input of the first group of inputs of the comparison circuit; the outputs from the second to the n-th state of the technical systems are associated with the inputs of the elements And the corresponding group of elements And so that the K-and the output of the state system technical register is connected to the first input of the (K-1) -th element of the group I, the second input The s of all elements and groups are connected to the corresponding outputs of the status registers of the technical systems so that the second inputs of the elements of the Cth group are connected to the corresponding outputs of the (K + 1) th register of the state of technical systems, the outputs of each mode storage register the works are connected with the second group of inputs of the corresponding comparison circuit, the outputs of the comparison circuits are connected to the inputs of the entry of the corresponding registers of storage of operation modes and to the control inputs of the simulation operation blocks so that the output of the K-th circuit comparison is connected to the input of the entry of the K-th storage register of operating modes and with the control input of the (K + 1) th simulation block of technological operations, the n-th output of the t-th register of the state of technical systems is connected to the reset input of the simulation control block, information outputs of which are outputs of a device for issuing information about the operation time of a device, outputs of all state system technical registers serve as outputs of system state data, inputs for giving a logical zero signal of all simulation blocks of those The ecological operations, besides the first, are the corresponding inputs of the device, characterized in that, in order to expand the field of application of the device by introducing means allowing to improve the control of the conveyor technical system by simulating the operation of conveyor systems with the ability to determine temporary equipment downtime during its operation, The device includes m total system operating time counters and t-1 time meters for simple systems, inputs of the initial installation and synchronization inputs for all counters s complete runtime systems and all systems simply time counters are respectively connected to the input of the initial installation of the device and to the clock output

imitation process control unit, the pth output of the first register of the state of technical systems is connected to the counting input input of the first counter of the total operating time of the systems, lth outputs from the second to main

technical system status registers are associated with the first count resolution inputs from the second to the mth counters of the total operating time of the systems and the first count resolution inputs of all time counters of the simple systems so that the nth output of the Kth technical systems status register is connected with the inputs of the K-th counter of the total operating time of the systems and (Kl) -ro of the time counter of just the systems, the first outputs with

the first to (t-1) th registers of the state of technical systems are associated with the second counting resolution inputs from the second to chth counters of the total operating time of the systems and with the second counting resolution inputs of all

just the time of the systems, so that the first output of the K-th state system status register is connected to the inputs (K + 1) of the total system operating time counter and the K-th time counter of the systems, the counting outputs from the second to the mth The technological operations simulation blocks are associated with the third count resolution inputs from the first to (t −1) -th time counters of just systems so that the output of the K-th block

imitations of technological operations are connected with the input of the (K-1) th time counter of just systems, the outputs of all the counters of the total operating time of the systems are the outputs of the device for issuing information about the total

the system operation times, the outputs of all the time meters of the simple systems serve as the outputs of the device for issuing time data of just the devices of the system.

2. The device according to claim 1, wherein the control unit, the simulation process contains a decoder, a delay element, a pulse generator, a counter, a register and a comparison circuit, the output of which is connected to the generator stop input

pulses, the reset input of which is the reset input of the block, and the start input is connected to the output of the delay element, whose input and the reset input of the counter are connected to the input of the initial installation of the block, the output of the generator. pulses are connected to the clock output of the block and the counting input of the counter, outputs which are connected to the information outputs of the block and to the first inputs of the comparison circuit, second

These inputs are connected to the outputs of the register, the information inputs of which are connected to the information inputs of the block, and the input of the input to the output of the first digit of the decoder, the outputs of the remaining bits of which are connected from the first to the mth output of the block write resolution, information and control The inputs of the decoder are associated with the inputs of the input coordinates and the resolution of the load block.

Note. X-level signal does not matter

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Claims (2)

Claim 1. Device for simulating a technical system of a conveyor type, containing a control unit for the simulation process, m units for simulating technological operations, m status registers for technical systems, t-1 groups of p-1 elements 14, t-1 registers for storing operating modes, t-1 comparison schemes, the information inputs of the control unit for the simulation process and the information inputs of all m units of the simulation of technological operations are connected to the information inputs of the device, the inputs of the job numbers of all m units of the simulation of technological operations are connected are connected with the corresponding inputs of the device, the inputs of the input of the coordinates of the control unit of the simulation process are connected to the inputs of the input of the coordinates of the device, the input of the download permission of the control unit of the simulation process is connected to the input of the permission to download the device, the input of the job mode of each of the simulation blocks of technological operations is connected to the input of the job of the device mode, inputs of the initial installation of the control unit for the simulation process, all m blocks of simulation of technological operations, status registers of technical systems and register Storage modes of operation are connected to the input of the initial installation of the device, from the first to the mth recording permission outputs of the simulation process control unit are connected respectively to the recording permission inputs from the first to the mth simulation process units, the clock output of the simulation process control unit is connected to the inputs synchronization of all blocks of simulation of technological operations, the output of each block of simulation of technological operations is associated with the input of entering the corresponding state register from the first to the mth systems, the information input of each of which is the input of a device for supplying a signal of a logical unit, the first outputs of the first t-1 registers of status of technical systems are connected to the first information inputs of the first t-1 registers of storage of operating modes and with the first inputs of the first groups of inputs of the first t- 1 comparison schemes, inputs from the second to η-th first groups of inputs of which and information inputs from the second to p-th registers of storage of operating modes from the first to (t-1) -th are connected with the outputs of the elements And corresponding from the first to (t-1) -th group so that the output of the J-th (I = 1, 2, ..., 0-1) element of the group AND is connected to the (1 + 1) -th information input of the operating mode storage register and with (ΗΊ) -μ the input of the first group of inputs of the comparison circuit, the outputs from the second to the nth state registers of technical systems are connected to the inputs of the elements AND of the corresponding group of elements And so that the Kth output of the state register of technical systems is connected to the first input (K -1) of the element AND groups, the second inputs of all elements AND groups are connected to the corresponding outputs of the status registers of technical systems so that the inputs of the elements of the Kth group are connected to the corresponding outputs of the (K + 1) -th state register of technical systems, the outputs of each operating mode storage register are connected to the second group of inputs of the corresponding comparison circuit, the outputs of the comparison circuits are connected to the recording inputs of the corresponding mode storage registers work and to the control inputs of the blocks of simulation of technological operations so that the output of the Kth comparison circuit is connected to the input of entering the Kth register of storage of operating modes and to the control input of the (K + 1) th block of them of technological operations, the nth output of the status register of the technical systems is connected to the reset input of the control unit of the simulation process, the information outputs of which are the outputs of the device for issuing information on the operating time of the device, the outputs of all status registers of technical systems serve as outputs of data on the status of the system, inputs to signal a logical zero of all the blocks of the simulation of technological operations, except the first, are the corresponding inputs of the device, characterized in that, in order to expand In the scope of application of the device by introducing tools to improve control of the conveyor technical system by simulating the operation of conveyor systems with the possibility of determining temporary downtime of the equipment during its operation, m counters of total system uptime and t-1 system downtime counters are introduced into the device, inputs initial installation and synchronization inputs of all counters of total operating time of systems and all counters of downtime of systems are connected respectively to the input of the initial setting new to the device and to the clock output of the simulation process control unit, the nth output of the first register of the state of technical systems is connected to the input of the account resolution of the first counter of the total operating time of the systems, η-e outputs from the second to the tth state registers of technical systems are connected to the first inputs resolution of the count from the second to the mth counters of the total operating time of the systems and with the first inputs of the resolution of the count of all the system downtime counters so that the nth output of the Kth state register of technical systems is connected to the inputs of the Kth account a full-time system timer and (K-1) -th system downtime counter, the first outputs from the first to (t-1) -th status registers of technical systems are connected to the second count resolution inputs from the second to the t-th total time meters systems and with the second inputs for allowing counting of all system downtime counters so that the first output of the K-th status register of technical systems is connected to the inputs of the (K + 1) th total time counter of systems and the K-th system downtime counter, interlock outputs accounts from the second to the mth blocks and the iterations of technological operations are connected with the third inputs of the resolution of the account from the first to (t-1) -th system downtime counters so that the output of the K-th block of simulation of technological operations is connected with the input of the (K-1) -th counter of downtime of systems, outputs all counters of the total operating time of the systems are the outputs of the device for issuing information about the total operating time of the systems, the outputs of all the counters of downtime of the systems serve as the outputs of the device for issuing data on the downtime of the devices of the system. 2. The device according to claim 1, the fact that the control unit, the simulation process contains a decoder, delay element, pulse generator, counter, register and comparison circuit, the output of which is connected to the input of the generator stop pulses, the reset input of which is the block reset input, and the start input is connected to the output of the delay element, the input of which and the counter reset input are connected to the input of the unit initial setting, the output of the pulse generator is connected to the clock output of the block and to the counter input of the counter, outputs which is connected They are connected with the information outputs of the block and with the first inputs of the comparison circuit, the second inputs of which are connected to the outputs of the register, the information inputs of which are connected to the information inputs of the block, and the input of the input is connected to the output of the first bit of the decoder, the outputs of the remaining bits of which are connected from the first to the mth block write permission outputs, information and control decoder inputs are connected to 10 input coordinates and block load permission. Logical signal level at: Counter 10.1 10.K (2 <K <t) 11.K (1 sKsm-1) First time account authorization 0 1 0 1 X 0 1 X X Second Inlet Account Permission - - 1 x 0 1 xxx Third entry account authorization - - - 0 X X 1 Mode of operation Score Lock • Account Account Lock Account Account Lock Note. The X-level of the signal does not matter (Riga! Fig.Z