SU1728665A1 - Device for measuring time intervals - Google Patents

Abstract

The invention relates to a pulse technique and can be used when measuring time intervals. The purpose of the invention is to simplify the device. A device for measuring the duration of time intervals comprises a pulse generator 1, an element AND 2, a pulse shaper 3, a pulse counter 4, a first 5 and a second 6 registers, a comparison block 7, a trigger 8 and a block of elements TO. New is the introduction of the element OR-NOT 9 and the implementation of registers 5 and 6 in the form of registers with the third state. 1 h. item f-ly, 1 ill.

Description

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The invention relates to a pulse technique and can be used when measuring time intervals.

A device for measuring time intervals is known, which contains a pulse generator, the first element AND, to the first input of which the output of the pulse generator is connected, the pulse shaper, the element NOT, the input bus that is connected to the second input of the first element AND, to the input of the pulse shaper and the element input is NOT, the first pulse counter is a software block, the interval interval sensor is the second pulse counter, the clock input of which is connected to the clock input of the first pulse counter and to the output of the first element I, bl comparing, the first inputs of which are connected to the sensor outputs of the selection intervals, the first trigger, the clock input of which is connected to the output of the comparison unit, the second trigger, the single output of which is connected to the control input of the second pulse counter, the output of the loan which is connected to the input of the installation in the second position trigger, the reset input of which is connected to the reset input of the first trigger, to the reset input of the first pulse counter, to the input of the pulse generator and to the recording input of the second pulse counter, times the common outputs of which are connected to the second inputs of the comparison unit, the second element I, the first input of which is connected to the single output of the first trigger, the block of elements AND, to the first inputs of which the corresponding outputs of the first pulse counter are connected, the output buses that are connected to the outputs of the corresponding elements And the block, to the second inputs of which the output of the second element I is connected, the second input of which is connected to the output of the element NO.

The disadvantage of this device is the complexity and, as a result, low reliability of operation,

The closest in technical essence to the present invention is a device for measuring time intervals, comprising a pulse generator, an element NOT, the first register, the first element I, to the first input of which the output of the pulse generator is connected, the pulse shaper, the first pulse counter, to the information inputs of which the outputs of the first register, the OR element, the first input of which is connected to the output of the first pulse counter, the second register, the second pulse counter, the reset input of which is connected to the second one element OR and with the second output of the pulse generator, the first output of which is connected to the recording input of the first pulse counter, the subtractive input of which is connected to the output of the first AND element and to the summing input of the second comparison pulse counter, the first inputs of which are connected to the outputs of the second register, trigger, the reset input of which is connected to the output of the OR element, the second element AND, to the first input of which the output of the trigger is connected, a group of elements AND, the first inputs of which are connected to the outputs of the corresponding bits From the second pulse counter and with the corresponding second inputs of the comparator unit, the output of which is connected to the installation input to the single position of the trigger, the input bus that is connected to the second input of the first element I, to the input of the pulse former and to the input of the element NO, the output of which is connected to the second the input of the second element And, the output of which is connected to the second inputs of elements AND groups, output buses, to which outputs of elements AND groups are connected.

A disadvantage of the known device is the complexity due to the presence of a second counter and an OR element.

The aim of the invention is to simplify the device by reducing hardware costs.

The goal is achieved by the fact that the device for measuring time intervals, containing a pulse generator, element AND, to the second input of which is connected the output of the pulse generator, pulse generator, pulse counter, summing the input of which is connected to the output of element And, the first and second registers, block comparison, to the second inputs of which the outputs of the first register are connected, the trigger, the first input of which is connected to the output of the comparison unit, the block of elements AND, the first inputs of which are connected to the corresponding output With the pulse counter and with the first inputs of the comparison unit, the input bus, which is connected to the third input of the And element and to the input of the pulse former, the output of which is connected to the reset input of the pulse counter, the output buses that are connected to the outputs of the AND elements of the block, is entered the OR element- NOT, the first input of which is connected to the zero output of the trigger and to the control input of the first register, the outputs of which are connected to the corresponding outputs of the second register, to the control input of which the single output of the trigger is connected, sec oh whose input is connected to the output of the pulse former, the input

which is connected to the second input of the element OR NOT, whose output is connected to the second inputs of the elements AND block, the output of the pulse counter overflow is connected to the first input of the element I.

The drawing shows a functional diagram of the device.

A device for measuring time intervals contains a pulse generator 1, an element 2, the first input of which is connected to the output of a pulse generator 1, a driver of 3 pulses, a counter of 4 pulses, the summing input of which is connected to the output of element I2, and the first input of which overflows pulse counter 4, first 5 and second 6 registers, comparison unit 7, each second input of which is connected to the corresponding outputs of the first 5 and second 6 registers, trigger 8, to the first input of which the output of block 7 is connected element, OR-NOT 9, the first input of which is connected to the control input of the first register bis zero output of the trigger 8, the unit output of which is connected to the control input of the second register 6, the block of elements AND 10, the first input of each element AND which is connected to the corresponding the first input of the comparator unit 7 and with the corresponding output of the pulse counter 4, the reset input of which is connected to the output of the pulse generator 3 and the second input of the trigger 8, the input bus 11, which is connected to the second input of the I2 element, to the input of the formate 3 pulses and a second input of OR-NO element 9, the output bus 12 to which are connected outputs of the AND unit 10, whose second inputs are connected to the output of OR-NO element 9.

The pulse former 3 is a forward edge pulse former, i.e., when a time interval appears at the input of a signal, it emits a pulse of a specified duration. The duration of the pulse emitted by the shaper 4 is set such that the pulse counter 4 and the trigger 8 are clearly set to the zero position,

As registers 5, for example, buffer registers K580 EI 82 can be used, which are in the third state when there is a high level signal at the control input (OE input).

The first input of trigger 8 is a counting input, the second is a reset input.

Register 5 contains the code of the maximum duration of the measured interval - Mmax, and register 6 - the code of the minimum duration of the measured interval - YMIN.

At the overflow output of the 4-pulse counter, a zero signal appears with the counter contents of 11, .. 1 and no pulse at the summing input.

A device for measuring time intervals operates as follows.

The device is intended to measure time intervals, the duration of which t is within:

Cumin - t Tmzks

where Tmin and gmax are the minimum and maximum values of the measured intervals, which are given by the codes NMHH (NMHH

 - and NMaKc (NMBKC y ZONOSIMYM B

registers 6 and 5, respectively (T - the period of the pulses of the generator 1). Circuit write codes NMHH and NMaKc in registers 6 and 5 in the drawing are not shown.

In the initial state, in the absence of a measured time interval on bus 11, the pulse counter 4 records the measurement result of the previous time interval, trigger 8 is in an arbitrary position, generator 1 pulses do not pass through element 2, or overflow counter 4. single or zero signal, depending on the code located in the counter 4.

At the time of arrival of the measured time interval on the bus 11, the driver 3 along the leading edge of this interval generates a pulse that sets the counter to zero. 4 pulses and a trigger 8. At the overflow output of counter 4, a single signal appears (if it had a zero signal before), a single signal appears at zero output of the trigger 8 (if it had a zero signal before). At the output of the element OR- NOT 9, a zero signal is set. Register 5 is in the third state, and the NMHH code is located at the outputs of register 6 and at the second inputs of the comparison block 7. Through the element And 2 pulses of the generator 1 begin to flow to the summing input of the counter 4 pulses, which fixes them.

If the duration of the time interval received by the bus 11, then at the moment of the end of this interval the element 2 is closed ..

For weekend tires 12, the code accumulated in counter 4 is not passed because the block of elements AND 10 is closed due to the presence of a zero signal at the output of the element OR — NOT 9. In this position, the device is before the arrival of the next time interval on bus 11, the arrival of which the device starts to work as described above. If the duration of the Gmin g Gmax time interval arriving on bus 11, then at the moment when NMHH code 4 is running in counter 4, comparison block 7 is triggered and the trigger 8 is set to the single position on the leading edge of the signal at its output. Register 6 is transferred to the third state, and register 5 is transferred to the working state. At the outputs of register 5 and at the second inputs of the comparison block 7, the code of the Nmax number appears. At the time of the end of the time interval, the AND 2 element is closed on the bus 11 and a single signal appears at the output of the ORID 9 element, since its two inputs contain zero signals and the block of AND 10 elements open. In the counter 4 there is the code of the measured 7 th time interval N y, which

through the block of elements And 10 enters the output bus 12. In this position, the device is located until the next time interval arrives on the bus 11, at the arrival of which the device starts to work as described.

If the duration of the time interval r tmax arriving on bus 11, then at the moment when NMHH code is in counter 4, the comparison unit 7 is activated and on the leading edge of the signal at its output the trigger 8 is set to the single position, the register 6 is brought to the third state , and register 5 - in the working. At the outputs of the register 5 and at the second inputs of the comparison block 7, the code of the Mmax number is set. At the output of block 7, the signal disappears. At the moment when the code of the NMBKC number in the counter 4 is set to Wits, the comparison unit 7 operates a second time and the trigger 8 is set to the zero position on the leading edge of the signal at its output. The first input of the element OR- NOT 9 receives a single signal from the zero output of the trigger 8. Further, if the duration of the time interval received on the bus 11 is 2KT, where K is the width of the counter 4, then at the moment of the end of the generator 1 pulse written to counter 4 , code 11 ... 1, at the output of the overflow of the counter 4 pulses, a zero signal appears, closing element AND 2, the generator 1 pulses will no longer be passed to the summing input of counter 4. On the output buses 12, the code accumulated in counter 4 (or code 11 ... 1, if r 2Kt) is not passed, so to to block the AND 10 is closed a zero signal output from the NOR element 9. In this position the device is until the next time slot on the bus 11. At arrival of the next slot device starts to operate as described above.

Experimental studies of the layout of the proposed device showed the operability of the device and the reduction in the number of IC cases implementing the device. In addition, the situation is excluded, it is possible in the prototype, when the duration of the time interval t Tmax, namely, when the condition

The r-2KT p m gmax (where K is the width of the known counter 3, n is an integer (n 1.2 ...), a false result of measuring the time interval is output.

Claims (2)

1. A device for measuring time intervals, comprising a pulse generator, an element I, to the first input of which a pulse generator output is connected, a pulse shaper, a counter pulses, the summing input of which is connected to the output of the element I, the first and second registers, the comparison unit, to the second inputs of which the first register is connected, the trigger, the first input of which is connected to the output of the comparison unit, the block of elements AND, the first inputs of which are connected to the corresponding outputs of the counter pulses and with the first inputs of the comparison unit, the input bus, which is connected to the second input of the element I and to the input of the pulse former, the output of which is connected to the reset input of the pulse counter, output buses that oedineny to the outputs of the AND unit, wherein o f e c In order to simplify the device, an OR-NOT element is introduced, the first input of which is connected to the zero output of the trigger and the control input of the first register, the outputs of which are connected to the corresponding outputs of the second register, to the control input of which a single trigger output is connected, the second input which is connected to the output of the pulse former, the input of which is connected to the second the input element OR NOT, the output of which is connected to the second inputs by the AND element of the block, the output of the pulse counter overflow is connected to the third input of the element I. 2. Device pop. 1, characterized in that registers with the third state are used as the first and second registers.