SU1422233A1 - On-line control and monitoring apparatus for automatic control systems - Google Patents

Description

The invention relates to computer technology and can be used as an operational control device in a dispatch control system, in the field of traffic control, for controlling the progress of work on networks, schedules, etc.

 UejUi invention - extending functionality by providing access n users to the device memory.

FIG. 1 is represented functional; device layout; in fig. 2 - functional diagram of the data call station; Jha figs 3 - functional scheme of the priority block; in fig. 4 - functional input unit diagram.

 The device contains an information input block 1, an address counter 2, a control block 3, a memory block 4. register 5, adder 6, elements OR 7-13, group of elements AND 14 | -14 „, group of blocks ISj. 15g ,, indications, a group of 16aCall data consoles, priority block 17, trigger 18, prohibition element 19. The priority block contains a group of inverters 20., -20гг-1 and a group of elements and 2 Ц 21 ... ,, The input block 1 contains a photo-spacing unit 22, elements OR 23 and 24, elements AND 25 and 26, register 27, driver 28 signals .

The data call station (LDPE) contains a signal former and a set of buttons: A — selection of the forward mode or the transported matrix; B - buttons for setting the starting address; D - turning on the mode “Reading E - turning on the display unit and blocking data entry.

Buttons A, B, and D perform the functions of duplicating buttons a, b, and d of the block, respectively.

Integrated circuits K537RUZ, K155IE7, K155IE5, K155IR1, K155IMZ, K155TM2, K155LET, K155LAZ, etc. can be used as chargers, counters, registers, adders, trigger, elements OR, AND, NOT. 15 in the proposed device perform the same functions as in the well-known, therefore, the circuits and operating order of the said blocks correspond to that described in the well-known.

Block 1 input information in relation to the known additionally has two inputs. The first input connected to the output of the element OR 13, in the input unit, is connected to the input of the signal conditioner 2B and serves to block the input unit. The second input, connected to the output of the element OR 12, in the input block is connected to the input of the element OR 24 and serves to set the address. Otherwise, the composition and operation of the input unit is no different from the known and also contains

five

buttons, signal conditioners, photo reader, temporary register

information storage, logical elements.

The device works as follows.

Operator with input block 1

information, selects the mode of operation and, accordingly, the type of problem to be solved, sets the starting addresses of the record, enters or searches for information, summarizes; 1, indicators, sorting, etc.

The operation of the proposed device in these modes is no different from the operation of the known.

In the recording mode of the matrix element, the next indicator goes to the information input of the memory block 4. At its address input, the address of the matrix element is set, where this indicator should be placed, and the record “Sign. .Address information arrives at the input of counter 2

0 addresses from input information block 1 and is written into this counter by a signal generated in control block 3 by a command from the input block. The input of information is synchronized with a clock pulse generator included in control unit 3.

If the indicators are to be presented in the form of a direct matrix, then first the address of the first page is recorded in the address counter 2, and then alternately

Q is formed by the addresses of all elements of this page by adding to the counter 2 addresses of units. Each clock pulse records the next indicator in the selected element of the memory block 4 and forms the address of the next element, i.e. it adds one unit to the counter 2 addresses. When filling out all the elements and pages, block 3 controls stop. 1v € t entry.

When recording information while transporting the matrix, the address of the first element is recorded first.

 in the counter 2 addresses. The information is recorded in the element of the memory block 4 corresponding to this address. Then the page numbers are alternately switched.

In the address search mode by the set indicator, the contents of the memory elements are read according to the enumerated addresses, the addresses are formed by the control unit 3 together with the information input unit 1 in the same way as described and in accordance with

0 e direct or transported matrix mode. When reading the memory in each clock cycle from the indicated elements of the memory block 4, the indicators are read to go to the first input of the adder 6 To the second input of this adder from the register 5

5 receives the reverse code of the compared indicator. The adder 6 operates as a comparison circuit. With the coincidence of indicators from the output of the adder 6, the signal is received in block 3

control, which in turn stops reading and provides the display of the contents of the address 2 address in the display unit 15.

When the indicators are summed over the elements of the same name of all the pages or all the elements of one page, the address information is formed in the same way as the construction of a transposed or direct matrix, respectively, with the feed of read pulses of the memory synchronously with the change of addresses. The information read from the memory block 4 is fed to the input of the adder 6, which operates in accumulating mode. After reading all the addresses, the control unit turns on the display unit 15, the result of the summing comes from the adder 6 and is displayed on the display unit 15.

The access to the memory block 4 by the users is provided with the help of the control panel 16. For this, the corresponding display block 151 (, n) is activated with the E key. In this case, the signal from the PVD shaper enters the cad display unit 15, the priority block and the I4i (, n) element, and through the OR 13 element enters the block 1. In this block, the shaper 2.8 signals are blocked and further does not allow the operator affect the device. Then, using buttons A and B, the user sets the type of matrix and the starting address of the zone of memory block 4. The matrix type setting signal is fed through the element OR 10 and acts on the corresponding input of the control unit 3. The code of the starting address through the element OR 12 enters the block 1, and then through the element OR 24, the register 27 of this block - to the input of the CA. Button D through the element OR 11 gives the signal. It is fed to the corresponding input of the control unit 3 and through the element OR 7 to the input of the record of the counter 2 addresses. It records the starting address of the zone of the memory block 4 and includes the mode "Read. Set0

The solution works in the mode of address search or summation of indicators. Information enters the included display unit 15.

Block 17 connects users according to their priority level. If, for example, console 16 has the highest priority, then it can be turned on at any time. The signal from the output of the inverter 20 closes the elements And 21: -21p / and prohibits the inclusion of other consoles. Remote 16: can be turned on only when the LDPE 16 is turned off | When the remote control 162 is turned on, the elements are closed, and so on.

5 DUs to prevent the user from connecting during data entry, all of the consoles are locked at the time of entry. This happens as follows. When the BV button is set to the Record trigger 18 mode, it switches to one state. The signal from the output of this trigger goes to the preamplifier inputs of the 16i-1b shaper of LDPE signals and block them. When installing the button d BV mode "Reading trigger 18

5, J, atec in the zero state and the blocking signal is removed.

For proper user interaction with the operator, the following condition must be met.

If the user connects at the time when the operator resolves tasks related to reading. Of data from the memory block, information will be received in the switched on display unit 151 {, n). At this time, the user should not change the mode of operation of the device.

5 The user should implement his tasks only after the end of the reading mode set by the operator. The end of this mode is determined by indication block 15i (p). Functional composition

The operation of the control unit does not differ from that known.

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CPU2.5

Claims (2)

1. OPERATING CONTROL DEVICE IN AUTOMATIC CONTROL SYSTEMS, comprising a control unit, a first OR element, a register, a prohibition element and series-connected information input unit, an address counter, a memory unit, an adder, a second OR element and a first indication unit, the second input of which is connected to the first output of the control unit, the second outputs of which are connected to the second inputs of the memory unit, and the first input of the control unit is connected to the second output of the adder, the second input of the control unit is connected to the second output of the unit information input, the third output of which is connected to the third input of the control unit, the third output of which is connected to the second input of the address counter, the first output of which is connected to the second input of the second OR element, the fourth outputs of the information input unit are connected to the third inputs of the memory unit and the first inputs of the first element OR, the second inputs of which are connected to the outputs of the prohibition element, and the outputs - with. the inputs of the register, the outputs of which are connected to the second inputs of the adder, the outputs of which are connected to the inputs of the prohibition element, characterized in that, in order to expand the functionality by providing access to η users AND device memory, a trigger, priority block, five elements are introduced into it OR, η data call desks of n AND elements and η additional display units, the first inputs of which are connected to the outputs of the second OR element, and the second inputs - with the outputs of η AND elements, respectively; the first inputs of which are combined and connected to the first output of the control unit, and the second inputs are connected to the inputs of the third OR element and to the corresponding outputs of the priority block, whose inputs are connected to the first outputs of the corresponding data call consoles, the second, third and fourth outputs of which are connected to the inputs of the fourth , of the fifth and sixth OR elements, respectively, the output of the fourth OR element is connected to the fourth input of the control unit ^ the output of the fifth OR element - with the fifth input of the control unit and the first input the seventh OR element, the second input of which is connected to the fourth output of the control unit, and the output of the seventh OR element - with the third input of the address counter, the output of the sixth OR element is connected to the first input of the information input unit, the second input of which is connected to the output of the third OR element, the third output the information input unit is connected to the first input of the trigger, and the sixth outputs are connected to the second input of the trigger and the second input of the fifth OR element, and the output of the trigger is connected to the inputs η of the data call panels. 2. The device according to g. 1, characterized in that the priority block contains (n — 1) elements And and (n — I) inverters, the inputs of which are the inputs of the block, and the output of the i-ro inverter is connected to the inputs of all subsequent ones, starting with the i-ro of the And element, the outputs of which are the outputs of the block, the input of the first inverter is the output of the block, the second inputs of the elements AND are the second inputs of the block.