SU1406504A1 - Device for measuring active power - Google Patents

Abstract

The invention can be used to measure active power in power systems in normal and emergency conditions. The device contains input converters 1, 2 voltage and current, respectively, multiplying unit 3, voltage to frequency converter 4 with linear and separating inputs, counters 5, 6, memory register 7, digital-to-analog converters 8, 9, driver 10, element 11 delay, generator 12 pulses. The device performs increased performance by obtaining information about the amount of active power in the monitored network at the end of each conversion cycle, equal in duration to the voltage-; no (current) in a controlled network, 1 Il. . i, I about (L k. Od SP

Description

The invention relates to electrical measuring equipment and can be used to measure active power in power systems in normal and emergency modes.

The purpose of the invention is to increase the device speed by obtaining information about the amount of active power in a controlled network in the KOH-JQ of each conversion cycle, equal in duration to the voltage (current) period in the controlled network.

The drawing shows a structural diagram of the proposed device. 15

The device contains input converters 1 and 2 of voltage and current, a multiplication unit 3, the inputs of which are connected to the outputs of input converters 1. and 2 voltage and current, pre-20 voltage generator with frequency and linear and dividers, the first 5 and the second 6 counters, a memory register 7, the first 8 and the second 9 digital-to-analog converters, a driver 10, an IJ delay element, and a generator of 12 pulses.

The linear input of the voltage-to-frequency converter 4 with the linear and linear inputs is connected to the output of the multiplier 3. The delimiting input of the converter 4 voltage to frequency with a linear and separating input is connected to the output of the first digital-analog converter 8. The output of the voltage converter 4 to frequency is connected to the linear and the separation input is connected to the counting input of the first counter 5, the output of which is connected to input to memory register 7, the output of which is connected to the input of the second digital-to-analog converter 9. The installation input of memory register 7 is connected to the output of the driver 10, the input of which is an input for voltage with the frequency of the controlled network. The installation input of the first counter 5 is connected to the output of the delay element 11, and the input of the latter is connected to the output of the driver 10, the installation input of the second counter 6 is connected to the output of the delay element 11, the counting input to the output of the pulse generator 12, and the output is connected to: information the input of the first digital-to-analog Converter 8, the installation input of which is connected to the output of the imaging device 10,

35

45

50

55

The device works as follows.

The counting input of the second counter 6 from the generator output 12 pulses continuously receives pulses with a stable frequency f |. C, much higher than the frequency {(network).

10 forms from the input voltage, the frequency of which is equal to the frequency of the controlled network, clock pulses that arrive at the input element

11delays and on the installation inputs of the memory register 7 and the second digital-to-analog converter 8.

At the moment of appearance at the output of the pulse delay element 11, the second counter 6 is set to the zero state, and the first counter 5 is set to the initial state, after which the second counter 6 starts counting the pulses to its counting input from the generator output 2 pulses. By the end of the period, a number equal to

0

R

five

five

0

five

P.

and f

HZ

t,

(one)

where T is the duration of the voltage (current) period in the controlled network;

f - stable pulse frequency of the generator 12 pulses.

At the beginning of the next period, a clock pulse arrives at the output of shaper 10 arriving at the installation inputs of the first digital-analog converter 8 and memory register 7. In this case, the number n from the second counter 6 is transferred to the memory register of the first digital-analog converter 8, as a result the voltage at its output will be equal to

 Kf g „,. (2) where K - coefficient of proportionality.

The memory register 7 from the first counter 5 records the number corresponding to the result of the conversion over the previous measurement period.

After a time interval t of delay introduced by delay element 1I (time interval t, negligible compared to the period duration), a pulse appears at the output of delay element 11, with the result that the second counter 6 is again set to zero, and the first counter 5 - to the initial state, after which, in the second counter 6, the next cycle of counting the pulses from the pulse generator 12 begins.

Because the line input of the converter 4 voltage to frequency. With the linear and remote 6 inputs of the multiplication unit 3, a signal is proportional to the product of the instantaneous values of current and voltage in the monitored network, and the separating input from the output of the first digital-to-analog converter 8 receives a voltage signal ,,,, determined by the formula (2 ), the value of which is proportional to the period duration, then the instantaneous pulse frequency at the output of the voltage-to-frequency converter 4 with linear and separating inputs is equal to fgtix f, mj, over the period n about the formula,. To PNC 1 U i

(3)

-out pnch

TO

Pnch 2

 to f

um

(3)

where and kpch the voltage transfer ratios of the voltage-to-frequency converter 4 are linear and divide, respectively.

Pulses with a frequency determined by the formula (3) over the period from the output of the converter 4 voltage to the frequency with linear and dividing inputs arrive at the input of the first counter 5. By the end of the period coinciding in time with the end of the conversion, the output code counter 5 corresponds to the value

35

Claims (1)

25 The invention The device for measuring a; tive power, containing input voltage and current transducers, a multiplication unit, the inputs of which are connected30 to the outputs of the input voltage and current transducers, characterized in that, in order to increase speed, the converter is additionally inserted voltage to frequency with linear and separating inputs, first and second counters, memory register, first and second digital-to-analogue converters, driver, delay element, generation, 40 P pulses, while first entry --W-CLL (jf -itll ..i uio / t voltage to frequency converter . K nc1-K-tru -T .. K n „, K - f .. t J are connected to the output of the multiplication unit by linear and separating outputs, the second input is connected to the output of the first digital 45 analogue converter, and the output is connected to the counting input the first counter, the output of which is connected to the input of the memory register, the output of which is connected to the input of the second digital - the active power of the 50 analog converter, the setup input of the memory register is connected to the output of the driver, the input of which is an input for voltage with the frequency of the monitored network, 55 installation inputs of the first and second counters are connected to the output of the delay element, the input of which is connected to the output of the imaging unit, the counting input of the second counter is connected pitch mn TO. where K,  And about To PNC- ( -. "" ...... "" m pchni gi K, R, (four) t) - coefficient of proportionality; uicJt Those. visibility in a controlled network. the code at the output of the first counter is proportional to the active power. At the end of the conversion cycle, the pulse from the output of the imaging unit 10 is fed to the installation inputs of the memory recorder 7 and the first digital-to-analogue converter 8, as well as to the input of the delay element 11. In this case, the number from the first counter 5, determined by the formula (4), which is fed to the input of the second digital-to-analog converter 9, is recorded in the memory 7, as a result of which the analog signal at the output of the latter is proportional to the active power in the monitored network , and the input of the second digital-to-analog converter 8 receives the code 5 from the output of the second counter 6, corresponding to the number n, (I). After an interval of time delay (tj T) introduced by the delay element 11, the pulse from the output of the latter sets 0..the zero state is the second counter: 6 and the initial state is above the first counter 5, after which the conversion process is repeated. Eup 8 block, chilotte etu io (3) 35 30 40 (four) .1406504. about with the output of the pulse generator, the output converter, the set-up of which is connected to the information input of which is connected to the output of the first digital-to-transformer.