SU1403301A1 - Voltage inverter control method - Google Patents

Abstract

The method is intended for use in an AC electric drive with frequency-current control. The aim of the proposed method is to improve the accuracy of controlling the output current. In the proposed method, the sign of the error signal is determined; As a result, the output current is regulated with an alternating error, and the switching frequency of the inverter valves is bounded from above, which ensures a more accurate correspondence of the load current modulus to the specified value. 2 Il. yu (L

Description

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 This invention relates to electrical engineering, which can be used in voltage inverters designed for variable frequency drives.

The purpose of the invention is to increase the accuracy of controlling the output current of the inverter.

FIG. Figure 1 shows a functional diagram of a device that implements the proposed: - a first method for controlling a single phase iliocTOBbiM inverter; in fig. 2 - diagrams of the control signals of this device.

 The device contains a comparator 1, you- | (one of which is connected to the information inputs of two D-flip-flops 2. A gating stroke of the D-flip-flops is connected to the output of jbaTopa clock pulses 3.

The essence of the method is as follows. The setpoint signal, which determines the current rate in the inverter load, supplies one of the inputs of comparator 1, to the alternate input of which a signal is sent, 1 ~ 1 proportional to the load current. In compa- turer 1, signals 1h and 1h are compared, and, if, at output 1 of compiler 1, a signal appears UK "1, if is signal" O, which is fed to the data inputs of two D-flip-flops. A change in the state of D-flip-flops occurs at the moments when the D-flip-flops of clock pulses generated by the clock pulse generator UTG generated by the pulse pulse generator 3 arrive at the gate of the strobe pulse. the gate input of the b-flip-flops on their direct outputs V2, V4 1o are the signals "1, and on the inverse outputs Vi, UZ the signal" O. These signals are supplied to the control inputs of the s-j OBbix keys 4, 5, 6, 7 (Fig. 1) of the inverter and switch them to the state when the keys 5 and 7 are closed, and the keys 4 and 6 are open to the load 8, a negative polarity voltage pulse is applied. Under the action of a negative voltage pulse, the load current decreases, resulting in a change

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signal error. If the sign of the error signal has changed, then the output of the comparator will be a signal. “Oh, and at the moment when the clock pulse arrives at the gate input of D-flip-flops, its direct outputs V2, V4 receive a signal“ O, and on the inverse outputs - “1. These signals go to the control inputs of the power switches and switch them to a state in which the keys 5 and 7 are open and the keys 4 and 6 are closed. At the same time, a positive voltage pulse will be applied to the load, under the action of which the load current will begin to increase, which will change the sign of the error signal. If the sign of the error signal is changed, then the output of the comparator 1 will be the signal "1. Further, the processes are repeated.

FIG. 2 shows the load current curve of an inverter controlled by the proposed method. Tracking is carried out with a sign of the error of adjusting the output current, which provides a more accurate, when compared with a known method, matching the average load current modulus to its specified value.

Claims (1)

Invention Formula The method of controlling the inverter voltage, which generates a reference signal and a signal proportional to the instantaneous values of the load current, generates an error signal by comparing the reference signal and a signal proportional to the instantaneous values of the load current, determine the sign of the signal errors and form the switching signals of the inverter valves, characterized in that, in order to increase the control accuracy of the output current of the inverter, they generate clock pulses of a stable frequency, which store the sign of the error signal in the circuit. you forming imgtulsov clock, it is compared with the sign of the error signal at the time of forming the preceding i.mpulsa clock signals and switching inverter gates are formed when changing the sign of the error signal. and mr I i and i and I I 1 I I I I N and I I and K // J1 l / f, K4i p p p l pgias Q:) U2.2