SU1300636A1 - Shaft turn angle-to-digital converter - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used to measure angular displacements. The aim of the invention is to improve the accuracy of the shaft angle converter into a code, which is achieved by inserting the switch 7, the third counter 10 and the accumulating adder 11. The accuracy is improved due to the fact that the lower bits of the output code in the counter 10 are formed by converting and summing the time intervals of different durations, the number of which at the beginning of the cycle is recorded in counter 9 and equal to the number of phase pulses taken from the comparators 6 during the sinusoid period. Addition is performed by accumulating adder 11 controlled by pulse generator 12. The pulses from the transfer output of the adder 11 are fed to the counter 10, forming the code of the least significant bits. In the counter 10, the pulses of the generator of the 12 pulses multiplied by the variable fractional coefficient are accumulated. The switch 7 is controlled by the counter code 8, which is simultaneously recorded in the higher bits of the counter 10. 2 Cp f-ly, 3 ill. R SL 3i CA 35

Description

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15

1 1300636

The invention relates to automation and computing and can be used in object management systems with digital information processing, and can also be used to measure angular displacements.

The purpose of the invention is to improve the accuracy of the converter.

Fig. I shows a structural diagram of a shaft angle-to-code converter; figure 2 - implementation of the accumulating adder; on fig.Z - the same, an example.

The converter of the angle of rotation of the shaft into the code contains a multiphase power supply unit 1, a multiphase phase shifter 2 consisting of a 3 angle sensor and a phase splitter 4, comparators 5 and

6.1 - 6.t, switch 7, counters 8 - 10, accumulating adder 11 and generator 12 pulses.

Accumulating adder I5 contains (p-1) O-flip-flops 13, where n is the number of digits of counter 9, the element is NOT 14, one element is And 15 and p is adders 16 (Fig. 2) or (p-1) adders 1 b, (p-1) D-flip-flops 13, the element is NOT 14, two elements are AND 15 and the element is OR 17 (FIG. 3).

Converter angle of rotation of the shaft in the code works as follows.

A multiphase power supply unit produces a voltage for powering a datant pulse is the beginning of m time intervals, each of which

2li

which are proportional to - (1-1) + H, and

m

The ends of the time intervals, respectively, are the phase pulses at the outputs of the Comparators 6.1-6. The code of the angle to be converted is formed by converting and summing these time intervals and dividing by the number of intervals equal to the number of phases. If, where p is an integer, then the division is greatly simplified. For example, we take ha 2 8.

Phase pulses at the outputs of the Comparators 6-1 ,, 6-2, ..., 6-t arrive at the switching inputs of the switch 7. The switching control is controlled by the output code of the counter 8. With the code 000 () in the counter 8, the switch 7 passes the first output phase pulse from comparator 6-1. The leading edge of this pulse subtracts in counter 8, leaving code 111. This code gives permission for the pulse from comparator 6-2 to pass through switch 7. Pulse from comparator 6-2, starting at the output of switch 7, is falling back on the counter 8 leaves the code 110. Switch 7 opens for a phase pulse from comparator 6-3, and so on. Last phase pulse with compara20

25

Chika 3 corners. One of the voltages of the 6-T meter 35 on the meter 8 is left as the reference. Output eg D 000 cycle repeats. Sensor 3 angle, the phase of which is relative to the reference voltage behind; depends on the angle of rotation of the sensor 3 shaft, is fed to the phase splitter 4 of the phase shifter 2. At the output of the phase splitter 4, i.e. at the output of the phase shifter 2, voltages are formed, the phases of which are shifted relative to the support40

45

If, at the initial moment of operation, the code state of the counter 8 does not correspond to the arising phase pulse, then the switch 7 is in the expected- - scientific research institute of the necessary phase pulse, the occurrence of which starts the counting and switching cycle ..

27G voltage for - (i-J) +4 where m m

the number of phases,, ..., and is the number of the output of the phase splitter 4; V is the voltage phase corresponding to the angle of rotation et. The comparator 5 forms reference pulses from the reference voltage when the sine-zero zero passes from negative to positive values. Comparators 6.1 -bt form-phase pulses from the output voltages of the phase shifter 2 when going through zero from negative values to positive.

five

The reference pulse is the beginning of m time intervals, each of which

which are proportional to - (1-1) + H, and

m

The ends of the time intervals, respectively, are the phase pulses at the outputs of the comparators 6.1-6. The code of the angle to be converted is formed by converting and summing these time intervals and dividing by the number of intervals equal to the number of phases. If, where p is an integer, then the division is greatly simplified. For example, we take ha 2 8.

Phase pulses at the outputs of the Comparators 6-1 ,, 6-2, ..., 6-t arrive at the switching inputs of the switch 7. The switching control is controlled by the output code of the counter 8. With the code 000 () in the counter 8, the switch 7 passes the first output phase pulse from comparator 6-1. The leading edge of this pulse subtracts in counter 8, leaving code 111. This code gives permission for the pulse from comparator 6-2 to pass through switch 7. Pulse from comparator 6-2, starting at the output of switch 7, is falling back on the counter 8 leaves the code 110. Switch 7 opens for a phase pulse from comparator 6-3, and so on. Last phase pulse with compara0

five

The 6th torus on the counter 8 leaves the D 000 cycle to repeat. EU-

If, at the initial moment of operation, the code state of the counter 8 does not correspond to the arising phase pulse, then the switch 7 is in the expected- - scientific research institute of the necessary phase pulse, the occurrence of which starts the counting and switching cycle ..

In this (joking comparators 6-1, ..., 6-2, ..., 6-t can be limiting amplifiers. At the same time, one output voltage pulse generator must be installed at the output of the switch 7.

The reference pulse from the output of the comparator 5 in the counter 9 sets the initial state by the installation input, code 1000 (the most significant bit is on the left), dp, and counts IO in the high bits of the counter 8. The same pulse is set to the original

Stopping the lower bits of the counter and accumulating the adder 11,

Assume that by the time the reference pulse appears, code 8 is in the counter 8, respectively, the zero code will be overwritten in counter 10. In this case, at the output of the switch 7, the first phase pulse from the comparator 6-1 appears first after the reference pulse,

Before the arrival of the first phase pulse in the counter 9, the code is 1000, and the register of accumulating adder 11 is code 000. There are low potentials at the outputs of the transfer and the sum of adders 16-1-16 (p-1). The output of the sum of the 16-p adder is not used, and there is a high potential at the transfer output, since its first and second inputs have a high potential. The first positive pulse of the generator 12 passes through the element And 15 to the input of the counter 10, This pulse can be called a pulse of transfer or overflow accumulation accumulator 1I. The rear edge of the pulse through the inverter is NOT 14 as a positive differential; it records the sum from the C inputs to the register formed by the D-flip-flops 13. The zero code is recorded by the first pulse, since the outputs of the sum of the adders 16-1-16- (p-1) have low potentials. At the input of the counter 50, through the element I I5 all subsequent pulses of the generator 12 are passed until the phase impulse c in the counter 9 sets the code 01 P, i.e. from the output of the higher bit of counter 9 to the first input of the 16-n adder, a low potential will not arrive. After that, a high potential at the output of the transfer of the adder 16-n can be only when a high potential appears at the output of the transfer of the adder 16- (n-1). This is determined by the codes on the remaining outputs of the counter 9 and the register formed by the flip-flops 13. Now every generator pulse 12 at the input of the counter 10 will not pass. The register on triggers} 3 accumulates the result of multiple summation of the contents of counter 9, and only three bits are saved, and the higher bits, like overflow bits, are transferred to the counter 10. Summing code 1000 results in a register overflow after each summation cycle. Po10

ten

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55 006364

in this case, with each pulse of the generator 12, a pulse must pass to the counter 10.

If at the time of the appearance of the reference pulse in the counter 8 there is a different code, for example, code 001, then at the output of the switch 7, the first after the reference pulse appears the eighth phase impulse. So the time interval corresponding to the convertible angle consists of the interval from the reference pulse to the eighth one coming first by the phase pulse and the interval from the eighth phase pulse to the first,

2.11

equal - However, only

time interval from the reference pulse to the first incoming (in this case, the eighth) phase pulse. The result code must be

2 adjusted to -. Ego produces

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with onopHbiM impulse with write to counter

0

five

0

five

0

Comparator e 10 code 001,

corresponding to the corner -, so

In addition, the reference pulse transfers the contents of counter 8 to counter 10 and automatically adjusts the most significant bits of the code at any angle, the code being written to counter 10 once at the beginning of the conversion cycle.

The information inputs of the accumulating adder 1I are fed from the outputs of counter 9, i.e. code 1000. In this code, each pulse of the generator 12 pulses passes to the counting input of the counter 10 until the appearance of the first phase pulse. It is equivalent to I

adding m intervals H from the reference pulse to the first phase pulse and dividing by the scale factor m, i.e. operations- tch.

go

The first phase pulse from the output of the switch 7 in the counter 9 subtracts and leaves the code OP1. Now each pulse of the generator 12 adds the code 1P in accumulative adder 11 (the sum does not form at the highest bit). Summation occurs (t-1) 7 inter- from first to second

23T shafts -

m

phase pulse, the result of which is equal to - (t-1). Adder 11 accumulates three bits. The number of impulses from the transfer output of the adder 11 is equal to the value of the sum divided by, i.e. at counter 10

21G w-1g

will do - pulses. Origin

Ty sh

dit multiplies the time interval 2UG t-1 „

la - by the coefficient. After

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the passage of the second phase pulse in the counter 9 remains the code in-2 0110. The addition and accumulation of this code begins in the counter 10 and in the accumulating adder h1, which continues until the arrival of the next phase pulse.

A summation of six is performed.

2. (pg2) time intervals- and division

by a factor of 8 (t), i.e. happening

2-s.

multiplication of the time interval - n

m

P1-2

coefficient . The process continues

c until m 8 phase pulses have passed and code 000 is set in counter 9 and thereafter the conversion cycle ends. In the small bits of the counter 10, the code will be equal to

c. W. 25 SlU 2P t-2 2fT 1 sh go m m mm

sh

№-1

2

7G

fZK-f) - J- (m-l) +4,

mr r

m

where H is the code equivalent of the time interval from the reference pulse to the phase pulse that arrived first, that is, the lower bits of the code of the angle being converted, the higher bits of which are set by the reference pulse. catfish at the beginning of the cycle.

7 Code value - (m-l) does not depend

m

from the angle of rotation and can be taken into account, for example, the initial setting. Thus, the transfer of the contents of the counter 8 into the counter 10 by the reference pulse corrects the most significant bits of the code at any angle

21Г At corners, smaller -, in the senior

The counter of the counter 10 is transmitted a zero code, i.e. no adjustment for high bit. The code in the counter 10 corresponds to the convertible angle.

O 5

0

50

five

0

five

0

five

Claims (3)

1. A shaft rotation angle converter into a code containing a multi-phase power supply unit, the outputs of which are connected. one of the outputs of the multiphase power supply unit is connected to the input of the first comparator, the output of which is connected to the installation input of the initial state of the first counter, the outputs of the multiphase phase shifter are connected to the inputs of the remaining comparators, the pulse generator and the second counter, characterized in that in order to improve the accuracy of the converter, the third counter-, accumulating adder and switch, whose information inputs are connected to the outputs of the comparators, except the first go and output are connected to the counting inputs of the first and second counters, the output of the pulse generator is connected to the control input of the accumulating adder, the information inputs of which are connected to the outputs of the counter, and the transfer output is connected to the counting input of the third counter, the outputs of the second counter are connected with the control inputs of the switch and with the information inputs of the third counter, the output of the first comparator is connected to the installation input of the initial code of the third counter and the installation input of the initial state plivayuschego adder. 2i The transducer of clause I, T is characterized by the fact that the accumulating adder contains n adders, n-1 D-flip-flops, the element NOT and the element AND, the first inputs of the adders are information inputs of the accumulating adder, the second input of the last adder is connected to the bus logical unit 1, the second inputs of the remaining adders are connected to the single outputs of the corresponding D-flip-flops, the third input of the first adder is connected to the bus of the logical zero, the third input of each subsequent adder is connected to the transfer terminal of the previous su Matora, last adder carry output coupled to a first input of AND gates, each output sum of summa- tori, except the last, coupled to the D-input of a respective D-trig7 130 Hera, the second input of the AND element is the control input of the accumulating adder and through the element is NOT connected to the C inputs of the D-flip-flops, the output of the AND element is the transfer output of the accumulating adder, 3. The converter according to claim 1, which is characterized by the fact that the accumulating adder contains adders, D-flip-flops, the element NOT, the two AND elements and the W) element, the first inputs of the adders and the first input of the first element And are the information inputs of the accumulating adder, the second inputs of the adders are connected to the unit outputs of the corresponding D-flip-flops, the third input of the first adder is connected to the bus eight logical zero, the third input of each subsequent adder is connected to the transfer output of the previous adder, the transfer output of the last adder is connected to the first input of the second element AND, the output of the sum of each adder is connected to D-BXO - the house of the corresponding D-flip-flop, the second input of the first element AND is control input accumulating adder and is connected to the second input of the second element And the input element is NOT, the output of which is connected to the C-inputs and-flip-flops, the outputs of the elements And are connected to the inputs of the element SH, the output of which This is the transfer output of the accumulating adder. fib.2 FIG. J