SU1275508A1 - Device for reception of discrete information - Google Patents

Abstract

The invention relates to automation and telemechanics and can be used in telecontrol systems and for receiving various discrete information in data transmission systems. The purpose of the invention is to increase the reliability of receiving information. The discrete J code in the sequential code is fed to the inputs of the AND element and the sync block. The second gate of the element I is supplied with dual gate pulses from the pulse distributor. Received information is recorded in a memory block. Recorded information is read by blocks of AND elements by a signal from a trigger and an enable signal from comparison blocks. Comparison blocks analyze the entry in the memory block for compliance with the encoding law. In the absence of distortion, the OR element transmits the recorded undistorted message to the decoder. Using instead of i one two gating pulses allows one elementary parcel (L to register twice. This increases the reliability of receiving information, since it ensures error-free registration of at least one of them, I il. Sd ate

Description

The invention relates to automation and telemechanics and, in particular, can be used in telecontrol systems - tele-alarm (TU-TC), as well as for receiving various discrete information in data transmission systems.

The purpose of the invention is to increase the reliability of receiving information. The drawing shows a block diagram of the device.

The device contains memory block I, decoders 2 and 3, trigger 4, element OR 5, first pulse distributor 6, synphating unit 7, AND 8 element, second pulse distributor 9, AND block 10, comparison block 11, decoder 12, block 13 Comparison, block 14 elements AND and block 15 elements OR.

The device works as follows.

The input of the device receives pulses of discrete information in the form of a sequence of code combinations. They are fed to the input of block 7, the synphating and element 8, to the second input of which are fed the twin strobe pulses of the distributor 9, controlled by the block 7 of synphasing. From the output of the element AND 8, the direct information is recorded in memory block 1. After registering the cyclic synphating code combination intended to set the cyclic phase of the device, as well as to open it, the output of the decoder 2 will receive reset pulses of the distributor 6 to its original position and the tilt pulses of the trigger 4, which will output the read information of the discrete information to block 10 elements And an analogous block 14 elements I. In the process of receiving and recording in memory block 1 of code combinations, they are analyzed for compliance with the coding law performed by the block s 11 and 13 are comparative. If there are no distortions in coding combinations from blocks 11 and 13 of comparison to blocks 10 and 14 elements, the resolution potential is obtained for which the code combinations written in block 1 of memory are read through the decoder 12 signals through block 15 of elements OR.

After completing the reception and decryption of the code combinations of the discrete information input to the device, the device enters the Rest mode. The device enters this mode after the Rest code begins to arrive at its input, which is inherent in all synchronous systems for transmitting discrete information. This combination through the element AND 8 is written to the memory block. The decoding signal of the code combination. The rest from the output of the second decoder 3 signals through the element OR 5 is fed to the first distributor 6 pulses, thereby ensuring its cyclic phasing. At the same time, the Poco code combination provides for flip-flop of trigger 4, the signal from the output of which prohibits the reading of any information recorded in. memory block 1. This is done in order to eliminate the formation of false combinations from the Rest code combination. The greatest effect can be obtained in systems in which information is transmitted in separate blocks with significant pauses between them. A typical example of such systems are telecontrol systems. The use of two gating pulses instead of one allows one elementary registration to be recorded twice, which ensures error-free registration of at least one of them. Registration with twin gated pulses allows to obtain two instances of the same code combination. Separate analysis of them for compliance with the coding law carried out by AND and 13 comparison blocks allows detecting that code combination instance that does not contain an error and, through the corresponding block (10 or 14) of the AND elements, ensures its reading and output to the device.

Formula inventions

A device for receiving discrete information containing the first and second pulse distributors, the synphasing unit, the first comparison unit, the first, second and third decoders, the AND element, the first AND block, the OR element, the trigger and the memory block, the first and second outputs which are connected to the entrances correspond

Claims (2)

Claim A device for receiving discrete information, containing the first and second pulse distributors, the common mode block, the first comparison unit, the first, second and third decoders, the And element, the first block of And elements, the OR element, the trigger and the memory block, the first and second outputs of which are connected to match the inputs 3 1275508 of the first and second decoders, the outputs of which are connected to the corresponding inputs of the OR element, the output of the second decoder is connected to the first input of the trigger, the output of the ₅ OR element is connected to the first input of the first pulse distributor, the second input of which is connected to the first output of the common mode block and combined with, the first input of the memory unit,, q and the output with the first input of the first comparison unit, the third output of the memory unit is connected to the second input of the comparison unit and the first input of the first block of AND elements, the input of the block is in phase is combined with the first input of the And element and is the input of the device, the second output is connected to the input of the second pulse distributor, the first output of which is connected to the τρε input of the first comparison unit, the second output to the second input of the And element, the output of which is connected to the second input of the memory unit, the output of the first comparison unit is connected to. _{25 by the} second input of the first block of AND elements, the third input of which is connected to the trigger output, the output of the third decoder is the output of the device, characterized in that, in order to increase the reliability of receiving information, the second block of saving, the second block of AND elements, the block of OR elements are introduced into it , the output of the first decoder is connected to the second input of the trigger, the output of the first pulse distributor is connected to the first input of the second comparison unit, the fourth output of the memory unit is connected to the second input, the second comparison unit and the first the input of the second block of AND elements, the second input of which is connected to the output of the second comparison unit, the third input is connected to the output of the trigger, the third input of the second block of comparison is connected to the third output of the second pulse distributor, the outputs of the first and second blocks of AND elements are connected to the the input of the third decoder.