SU1211760A1 - Device for editing recorders in tables - Google Patents

Abstract

The invention relates to computing. The purpose of the invention is to expand the field of application of the device by providing line corrections. For this, a device containing a counter, a memory block, an information register, an AND element and an AND element group contains a prohibition element, a pulse generator, two delay elements, a decoder, a comparison node and a string register. The invention can be used in relational database management systems. 1 il.

Description

The invention relates to computing technology and can be used in relational database management systems.

The aim of the invention is to expand the functional possibilities by providing an adjustment to the rows.

The drawing shows a diagram of the device.

The proposed device contains a counter, a memory block 2, an information register 3, an AND 4 element, a group of 5 AND elements, a prohibition element 6, a generator of 7 clock pulses, delay elements 8 and 9, a decoder 10 comparison circuit 11, a register 12 lines , address input 13, information input 14, setup input 15, start input 16 and device 17 exit.

Memory block 2 contains a number of tables. The row of the table occupies one memory location. All lines have a key field. In each table, rows can be sorted (to speed up the search for the required row) by ascending or descending keys. In the cell of memory block 2, immediately following the last row of the table, the end of the table / unique code decoded by the decoder 10 is written.

The device works as follows.

In the initial state, generator 7 is inhibited. Counter I, from input 13, impulses input 15 to the address of the first row of the table, in which any row must be replaced. Replace string. is entered into register 12 from input 14. The device is ready for operation.

The replacement of the string in the table is initiated by a pulse on input 16, which starts the generator; tor 7. On the first pulse from its output, the first row of the table is accepted into register 3. The decoder 10 does not output a signal, therefore prohibition element 6 is open. If the key of the read string does not match the key of the replacing row, then the comparison circuit 11 does not output the signal and the AND 4 element is closed. After that, a pulse appears at the output of delay element 8. Group 5 is opened02

This and and the first row of the table from register 3 is output at output 17. Then a pulse appears at the output of the delay element .9, by which

the contents of counter 1 is increased by one, i.e. the address of the second row of the table is generated. On the second pulse from the generator output 7, the second row of the table is taken

into register 3, analyzed by comparison circuit 11, outputted at output 17, and in counter 1 the address of the third row of the table is formed. Reading and inserting lines in the same way

occurs until the key field of the read string matches the key field of the replacement row. Coincidence means that the replacement string was found. When the keys match, the comparison circuit 11 opens the element AND 4. On the impulse from the output of the delay element 8 not only the output of the register 3 is output on the trigger 17,

but the replacement string is written from register 12 to memory block 2 at the address specified on counter 1, i.e. in the cell where the replacement line was. Then

in the counter 1, the address of the next row of the table is formed, and after the next pulse from the output of the generator 7, only reading of the rows from block 2 and sending them to

output 17. There comes a moment when, following the next pulse from the output of the generator 7, the end-of-table code is received in register 3. In this case, the output of the decoder 10 is

is a signal closing the prohibition element 6. Therefore, the contents of the register 3 at the output 17 is not received. By the same signal, the generator 7 is set in the locked state

the

The next 1 cycle of operation of the device begins after updating the contents of counter 1 and register 12 with a pulse from input 16.

The device allows to implement a read-only mode, if a string with a key that certainly does not have one row of the table, is written into the register of a string. In this case, the replaced row will not be found, and therefore, the replacement row will not be entered in the table.

Claims (1)

Invention Formula A device for editing entries in tables containing a counter, a memory block, a decoder, an information register, an AND element, a group of AND elements whose outputs are an output of the device, an output of the memory block is connected to the input of the information register; which are connected to the first inputs of elements AND of a group, characterized in that, in order to extend the functionality by providing an adjustment of the rows, a bar element, a clock generator, two delay elements, a comparison circuit and The line of the line, the information input of which is the information input device of the device, the address input of which is connected to the information input of the counter, the output of which is connected to the address input of the memory unit, the installation input of the device is connected to the enable input of the counter, the code of the line register is connected to the information input of the block memory and with the first input of the comparison circuit, the second input of which.and the input of the decoder is connected to the outputs of the bits of the register of the information, the output of the decoder is connected to the prohibition. the input of the prohibition element, with the input of the stoppage of the clock generator pulses whose start input is the device start input, the clock pulse generator is connected to the read input of the memory unit and to the input of the first element delay, the output of which is connected to the first input of the element I, to the input of the second delay element and to the information input of the prohibition element, the output of which is connected to the second the inputs of the AND elements of the group, the output of the second delay element is connected to the counting input of the counter, the output of the comparison circuit is connected to the second input of the AND element whose output is connected to the recording input of the memory block. VNIIPIZakaz 43/55 Circulation 673nognnse Branch PPP 11atenta 7, Uzhgorod, Proektna St., 4