SU1208562A1 - Device for editing records in tables - Google Patents

Abstract

The invention relates to computing. The aim of the invention is to extend the functionality by providing the exclusion of strings. The device contains a counter, a memory unit, an information register, a group of AND elements, an OR element, AND elements, a trigger, a clock generator, a delay element, a pulse distributor, a comparison node, a decoder, a key register, and a square pulse shaper. 1 il. 1C o 00 ate O) ISD

Description

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The invention relates to computing and can be used in systems for managing relevant databases.

The purpose of the invention is to expand the functionality of the device by ensuring the exclusion of lines.

The drawing shows a diagram of the proposed device.

The device contains a counter 1, a memory block 2, an information register 3, an AND 4 group, an OR 5 element, an AND 6-9 element, a trigger 10, a clock pulse generator 11, a delay element 12, a pulse distributor 13, a comparison node 14, a decoder 15, key register 16, shaper 17 rectangular pulses, information input 18, address input 19, start input 20, installation input 21 of device 22.

Memory block 2 contains a number of tables. The row of the table occupies one memory location. All lines have a key field. In the table, rows can be sorted (to speed up the search for the required row by ascending or descending keys. Cell 2 of the memory (immediately following the last row of the table) records the end of the table code (unique code) allocated by the encoder 15.

The device works as follows.

In the initial state, trigger 10 is reset, generator 1 is inhibited, and elements 8 and 9 are closed. The counter I, from input 19, by the pulse at input 21, records the address of the first row of the table from which any row should be deleted. The key of the deleted string is entered in register 16. The device is ready for operation.

The removal of a row from the table is initiated by a pulse on input 20, which starts the generator 1 "On the pulse from its output, the distributor 13 sequentially outputs pulses on its outputs. A pulse appears at the first output of the distributor 13 and the first (hereinafter the next one) reads the row of the table in register 3. If

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the row key from register 3 does not match the contents of register 16, then node 14 generates a signal at its output, which opens AND 7.

5 If in register 3 there is a non-end-of-table code, then AND 6 is also open. By the pulse from the second output of the distributor 13, the first (hereinafter, the next one) row of the table through the open group of elements AND 4. Is output to the output 22 of the device. On impulse from the third output of the distributor I3, the contents of the register 3 are recorded in memory block 2.

15 at the address determined by the contents of the counter I. The pulse from the fourth exit through the element And 9 does not pass. By the pulse from the fifth output of the distributor 13, the contents of the counter 1 are increased by one, i.e. the address of the next row in the table is generated. Therefore, if the key read from block 2 of the memory line does not match the contents of the register

25–16, this line is written to the same place in memory block 2 and outputted from the device; in addition, the address of the next line of table JI is generated in counter 1. On the second pulse 30 from the output of the generator 11, the pulses at the outputs of the distributor 13 appear again successively, starting from the first.

The device works as described

c above, as long as the contents of register 16 do not match the key of the string read into register 3. Coincidence means that the deleted row was found.

40 When finding the line to be deleted, the signal from the output of node 14 is removed, as a result of which element 7 is closed, and driver 17 generates a pulse setting trigger

 10 in one state. It should be noted that the shaper 17 forms a pulse only when the signal is removed from its input, i.e. on the falling edge of the signal. By impulse from the second

50 of the output of the distributor 13 is subtracted from the contents of the counter 1, and the contents of the register 3 is output to the output 22. The pulse from the third output through the element 7 does not pass. The pulse from the fourth output of the distributor 13 through the open element And 9 restores the previous contents of the counter, and

on the impulse from the fifth output in counter 1, the address of the next row of the table is generated. Consequently, the deleted line is output from the device, but is not recorded in the memory block 2, in addition, the trigger 10 is set to one and the elements 8 and 9 are opened. Let p be the address of the row to be deleted, then in counter 1 the address p + 1 is generated.

On the next pulse from the output of the generator 11, the remaining rows of the table are read, issued to the device output and written to the memory block 2 with a shift by one cell in the direction of lower addresses. This happens as follows. On the first pulse from the outputs of the distributor 13 to the register 3, a line is received which is located at address p + 1. From the pulse from the second output of the distributor 13, this line is output to output 22, and in the counter 1 a code p is generated. Element And 7 is open, since the contents of register 16 no longer coincides with the key field of register 3. Therefore, a pulse from the third output of the distributor 13 leads to the recording of the contents of register 3 at address p (to the place of the deleted row). By the pulse from the fourth output, the distributor 13, the contents of the counter 1 becomes equal to p + 1, and by the pulse from the fifth output - p + 2. On the next pulse from the output of the generator 11 from block 2, the line with the address p + 2 is read, outputted at the device output 22 and written to the address p + 1. This happens until the end of the table code is read on register 3.

If the end of the table code is received in register 3, then a signal appears at the output of the decoder 15, which closes AND 6 and sets the generator 11 to a locked state. However, the distributor I3 continues to generate pulses at its outputs. As a result, the end-of-table code from some cell k is rewritten into cell k -1, but is not output to output 22. After passing a pulse to the subtracting input of counter 1, a signal appears at the output of delay element 12, setting trigger 10 to zero

ten

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state-. Consequently, the device is in the initial state and is ready for a new cycle of operation, which begins after updating the contents of counter 1 and register 16.

The proposed device allows realizing the read-only mode, if the key is written in a register of the key which does not exist on a string. In this case, the deleted row will not be found, and therefore, no rows from the table will be excluded. 15

Claims (1)

Invention Formula A device for editing records in tables containing a counter, a decoder, an information register, a group of AND elements, an OR element, an AND element, a memory block whose output is connected to the input, information registers, the bit outputs of which are connected respectively to the first inputs elements and groups, the outputs of which are the output of the device, characterized in that, in order to expand the functionality by ensuring the elimination of lines, a trigger, a clock generator, a delay element, a distribution divisor im35 pulses, comparing the node generator of rectangular pulses and key register, the input of which is a data input device, the counter output is connected 40 to the address input of the memory unit, the output of the key register is connected to the first input of the comparison node, the second input of which is the information input of the memory unit and the input of the decoder 45 are connected to the outputs of the information register bits, the output of the decoder is connected to the inverted input of the first element I, to the input of the delay element, and to the input of the rest of the clock pulse generator, the start input of which is the device start input, the address input of which is connected to the information input of the counter Raz55 I solve the 1st input of which is connected to the installation input of the device, the output of the clock generator is connected to the input of the distributor S1 pulses, the first output of which is connected to the read input of the memory unit, the write input of which is connected to the output of the second element I, the first input of which and the input of the square pulse generator are connected to the output of the comparison node, the second output of the pulse distributor is connected to the first input of the third element I and with the direct input of the first element And, the output of which is connected to the second inputs of the elements And group, the third output of the pulse distributor is connected to the second input of the second element And, the fourth output of the distributor bullet208562 owl is connected to the first input of the fourth element I, the output of which is connected to the first input of the IPI element, the output of which is connected to the summing input of the counter, the subtractive input of which is connected to the output of the third element And, the second input of which and the second input of the fourth element And are connected to the output A trigger 10, the zero input of which is connected to the output of the delay element, the fifth output of the pulse distributor is connected to the second input of the OR element, the output of the square pulse generator 15 is connected to the single input of the trigger. VNIIPI Circulation 673 Order 289/58 Subscription Branch PPP Patent, Uzhgorod, Proektna St., 4