SU1202056A1 - Integrated analog-to-digital converter - Google Patents

Abstract

INTEGRATING ANALOG-DIGITAL CONVERTER containing a pulse generator, the first counter, a control automaton of a sequential type, three keys, the information inputs of which are connected respectively to the bus of the voltage being converted, the bus of the positive reference voltage, the bus of the negative reference voltage, and the outputs respectively of the first, second and third inputs of an integrating amplifier, characterized in that, in order to achieve linearity of the conversion without reducing the resolution and interference four elements OR, an inverter, two AND elements, two RS triggers, two 0-flip-flops, a second counter, a digital subtractive device, and three comparators, the first inputs of which are combined and connected to the output of the integrating amplifier, the second the input of the first one is connected to the bus of the first threshold level, and the output is connected to the first input of the first OR element and the 5th input of the first .85 trigger, the R input of which is connected to the output of the second OR element, and the output to the nepBblM input of the first element I, second entrance cat connected to the control input of the first key, the input of the inverter, the first output of the control automat, of the sequential type, the first input of the second AND element, and the output with the first input of the third OR element, the second input of which is connected to the second output of the control automaton of the sequential type, and the output with B is the input of the first and-flip-flop, the output of which is connected to the control L-input of the second key and the input of the resolution of the second c-meter account, and the C-input to the C-input of the second D trigger, the counting inputs of the first fi e and the second counting the output of the pulse generator and the first input of the controlling, automatic machine of the sequential type, the third output of which is connected to the installation inputs of the first Yu counter and the second counter, the outputs e: l of which are connected to the first inputs of the digital subtractive device, the second input of which is connected to the fourth output the control automaton of the sequential type, the third inputs - with the outputs of the first counter, the counting resolution of which is connected to the control input of the third key and the input of the second D-flip-flop, the D-input of which is, with the output of the fourth OR element, the first input of which is connected to the fifth output of a sequential-type control automaton, the second input is from the output

Description

the house of the second element AND, the second input of which is connected to the output of the second fiS flip-flop, R-input of which is connected to the output of the first OR element, 5 -input - to the output of the second comparator and the first input of the second OR element, the second input of which is connected to the second input of the first Ele202056

OR and the inverter output, while the second input of the second comparator is connected to the bus of the second threshold level, the second input of the third comparator is connected to the common bus, and the output is connected to the second input of the control automaton of the sequential type.

The invention relates to digital electrical measuring technology and can be used in digital devices and information-measuring systems.

The aim of the invention is to increase the linearity of the transform without reducing the resolution and noise immunity of the transform.

FIG. 1 shows a functional diagram of the ADC; in fig. 2 shows timing diagrams explaining the operation of an A / D converter during one conversion cycle in FIG. 3 shows an example of implementation of a sequential type control automaton.

The analog-to-digital converter contains the key 1 of the input voltage, the keys 2 and 3 of the reference voltage, the integrating amplifier 4, the comparators 5-7, the pulse generator (HI) 8, the control automaton 9 of the sequential type, the first counter 10, the element 11 or 11 14, an inverter 15, two elements And 16 and 17, two R5-flip-flops 18 and 19, two-33 flip-flops 20 and 21, a second counter 22 and a digital subtraction device 23.

The control automaton of the sequential type contains the first shaper 24, the inverter 25, the AND 26 element, the counter trigger 27, the AND-NE element 28, the AND 29 element, the second pulse shaper 30, the trigger 31, the inverter 32 with a differentiating chain at the input, the element . And 33, the third driver 34, the element AND-NOT 35, the counter 36 pulses, the trigger 37, the logic element 38, the trigger 39, the trigger 40, the element 2I-2-ШШ 41, the trigger 42, the delay elements 43 and 44, the element 2I- 2-or 45

galvanic separation device 46.

The device works in the following way.

Elements 24-28 produce a start signal at the inverse of the output of the trigger 37, which, by passing the galvanic separation device 46, forms the output of the automaton 9, which sets the fixed integration time of the transformed voltage, level 1. Simultaneously, a short pulse from the output of the element 28 is reset through the element 35

to the zero state, the counter 36. The output of the element 28 is the output of the automaton 9, at which the set signal is reset to the initial state of the counters 10 and 22. After the reset

the counter 36 begins its pulse filling from the output of the element 45. After the counter 36 overflows, the output of the element 33 produces a short pulse that resets the trigger 37. As a result, the output of the automaton 9, which sets a fixed integration time interval,

ABOUT

So

level is set

Thus, the time required to fill the counter 36 with GI pulses determines the duration of a fixed interval T ((FIG. 2). A short pulse from the output of element 33,

Having passed the shaper 34, it enters the inputs of the flip-flops 40 and 42. At the same time, the flip-flop 40 records information about the sign of the output voltage of the integrator at the moment when the interval T ends (Fig. 2). The sign information to the trigger 40 comes from the trigger 39. The signal from the inverse of the trigger 42 through the element 3

(The holder 43 gives permission to turn on the reference voltage, the polarity of which is determined by the state of the trigger 40. Under the action of the output signals of the flip-flops 40 and 42, one of the two outputs of the galvanic separation device 46, which are the outputs of the automaton 9, permitting the integration of the reference voltage after the end of the interval Tu (Fig. 2), level 1 is formed. The selection of the sign of the reference voltage is determined by the state of the comparator 5, which through the electroplating device 46 and the element 38 is fixed in the trigger 39. and the connection output of the comparator 5 and the galvanic separation device 46 is the input bus of the automaton 9. At the time of the integrator’s final discharge, the comparator 5 changes its state, which is transmitted through the galvanic separation device 46, the elements 38 and 39 and leads to the output of the signal element 41, which resets the trigger 42. This prohibits the integration of the voltage of the reference source. The output of the element 29 is the output of the automaton 9 and the signal at this output determines the digit The new equivalent of the voltage to be converted.

At the beginning of the conversion cycle, through switch 1, the converted voltage U is applied to the input of the integrating amplifier 4. With a negative sign, the output voltage of the integrator Eli increases linearly. After this voltage reaches the threshold level (J (FIG. 2)), the output characteristic of the integrator selected in the linear region is triggered by the comparator 7. With its output signal, RS-trigger 18 is set to state 1 (FIG. 2), and RS-flip-flop 19 - to the state O (fig. 2). The output signal of the RS-trigger 18 passes through the element AND 16, since during a fixed interval, the time T at the first input of the element 16 and 16 acts signal 1, coming from the control of the automaton 9 of the sequential type . From the output of the element AND 16 signal 1 through the element OR 13 pos upaet 0 to input latch 20. On the positive By ;;

020564

on the front of the nearest pulse of the trigger generator 80, the trigger 20 goes to state 1. The output of D-flip-flop 20 connects to the input of the summing amplifier 4 via switch 2 of the positive reference voltage Id, and simultaneously gives permission for counting the pulses of the generator 8 to counter 22 .

10 Generated by reference voltage.

the discharge current must exceed the value of the charge current due to the voltage being converted. In this case, the output voltage of the integrator of the torus begins to decrease linearly and when it reaches the threshold level Un- (Fig. 2), the comparator 6 is triggered. Its output signal is set to state 1 R5-trigger 19 (Fig. 2) , and R3 flip-flop 18 returns to the state O (FIG. 2). The output signal of the RS-trigger 19 passes through the element And 17, because during a fixed interval T (at its first input, the signal 1 is maintained coming from the control automaton 9. From the output of the element 17, the signal 1 through the element OR 14 goes to the D input -D-flip-flop 21. On the positive front of the nearest generator pulse 8, D-flip-flop 21 goes to state I, and D-flip-flop 20 goes to state O. The output of D-flip-flop 21 is

35, the connection to the input of the integrating amplifier 4 via the key 3 of the negative-voltage (JQ, at the same time, permission is given for counting the pulses of the generator 8 to the counter 10, etc.

At the end of the integrator T (Fig. 2) of the controls, the automaton 9 at the output, specifying the duration of this interval, sets the signal O. By this signal, both the transformable and the reference voltage are disconnected from the inputs of the integrating amplifier 4 and the pulse count is disabled both accounts

50 and 10 and 22. Then, over a small auxiliary time interval (Fig. 2), according to the state of the comparator 5, the control unit 9 determines the sign of the residual voltage of the integrator. In accordance with the state of the comparator 5 control units, the automaton 9 turns on the reference source of the negative intagram to zero, and gives 51 permission for the counting of pulses to one of the counters by setting signal 1 to the second input of one of the elements OR 13 or 14. The moment of reaching the output voltage the zero-level integrator is fixed by the comparator 5. The digital equivalent of the voltage to be converted is determined by the digital subtracter 23 by subtracting the contents of the counter 22 from the contents of the counter 10. At this, the conversion cycle Ani terminated. From the condition of the balance of charge and discharge of the capacitance of the integrating amplifier 4, one can make up the following equation: UJ, U, 5: ul; y / fO where ZA.i is the total time interval for switching on the reference source Ug on the interval .Т,; STit; - total time interval for switching on the reference source - (d on the interval Tj; ut - time interval for switching on the reference source disrupting the integrator at the end of T (to zero 202056 I but E ut gh same score 25). Polaga, equation (1) can be represented as follows: (T,)., T- (a; -Eutib- l, io Considering that i-trtJiTo, itj NJ-TO, NTo T „-period GI; -number of pulses GI counted on the interval ii-; the number of pulses counted on the interval iij; W is the number of pulses counted on the interval ut, and the tact that interval T is given by some number of pulses T, NTo, we obtain 5ic; NE (T.-N- (s: N., - zNi) l. Expression (2) shows that the resulting voltage is directly proportional to the algebraic sum, resulting from the coding of the intervals of the integrated stresses on e-formation interval. The sign of Lfx is determined by the sign of the difference 5: Nj-ZN;. (r,) - N.

i / x

+ Uo -Uo

FIG. one

Vyh.Z

2.

Claims (1)

AN INTEGRATING ANALOG-DIGITAL CONVERTER containing a pulse generator, a first counter, a sequential type control automaton, three keys, the information inputs of which are connected respectively to the convertible voltage bus, the positive voltage reference bus, the negative voltage reference bus, and the outputs, respectively, to the first, second and third inputs of an integrosumming amplifier, characterized in that, in order to increase the linearity of the conversion without reducing the resolution and noise immunity In addition, four OR elements, an inverter, two AND elements, two RS-flip-flops, two D-flip-flops, a second counter, a digital subtractor and three comparators, the first inputs of which are added, are added to it. are unified and connected to the output of an integro-summing amplifier, the second input of the first of which is connected to the bus of the first threshold level, and the output is connected to the first input of the first OR element and the 5th input of the first. Short circuit trigger, whose R input is connected to the output of the second OR element and the output is with the first input of the first AND element, the second input of which is connected to the control input of the first key, the inverter input, the first output of the sequential type control machine, the first input of the second AND element, and the output - with the first input of the third OR element, the second input of which is connected to the second output of the control automaton of a sequential type, and the output with the D-input of the first D-trigger, the output of which is connected to the control input of the second key and the account resolution input of the second estimator, and the C-input - with the C-input of the second D trigger the counting inputs of the first and second counters, the output of the pulse generator and the first input of the control. a sequential type automatic machine, the third output of which is connected to the inputs of the first counter and second counter installation, the outputs of which are connected to the first inputs of the digital subtractor, the second input of which is connected to the fourth output of the sequential type control machine, the third inputs are with the outputs of the first counter, the account resolution input which is connected to the control input of the third key and the input of the second D-trigger, the D-input of which is connected to the output of the fourth OR element, the first input of which is connected from the heel m is the output of a sequential type control automaton, the second input is the output of the second AND element, the second input of which is connected to the output of the second 'trigger, the R input of which is connected to the output of the first OR element, 5 input is the output of the second comparator and the first input of the second OR element, the second input of which is connected to the second input of the first OR element 1202056 and the inverter output, while the second input of the second comparator is connected to the bus of the second threshold level, the second input of the third comparator is connected to the common bus, and the output to the second input of the control machine is a serial ¹ type.