SU1094030A1 - Information input device - Google Patents

Abstract

DEVICE FOR INPUT OF INFORMATION, containing the register, the element AND-NOT, the first element KGSH, the first element AND, odnibratrr, the first counter and the block of switching elements, the first and second outputs of which are connected to the corresponding inputs of the element AND-NOT, the output of which is connected to the first input of the first OR element, the output of which is connected through the one-shot to the counting input of the first counter and to the left shift register input, the right shift input of which is the input Device output, the outputs of the parallel and serial outputs are information outputs of the parallel and serial outputs of the device, respectively, the outputs of the first counter are connected to the inputs of the first AND element, characterized in that, in order to expand the field of application of the device by outputting words of variable length, a pulse generator, a second counter, the second and third the OR elements, from the second to the fifth elements, And and the trigger, the setup inputs of which are connected to the first and second outputs of the block of switching elements, inverting and non-inverting you Odes - to the first inputs of the second and third elements AND, respectively, the second input of the second element AND connected to the second input of the first element OR and the output of the fourth element AND, the non-inverting input of which is connected to the output of the pulse generator, the second input of the third element AND connected to the output of the element AND -NON, the outputs of the second and third elements AND are connected to the corresponding inputs of the second (L of the OR element, the output of which is connected to the information input of the register, the third output of the block of switching elements is connected to the first inverting input of the fourth element I and with the first input of the fifth element I, o; o whose second input is connected to the second inverting input of the fourth. 4 AND elements and is connected to the output of the first element AND, the output of the n element: o this AND is the gate output of the device, the output of which is connected to the counting input of the second counter, the overflow output of which is connected to the first input of the third element OR, the second input of which is the Device Input port, and the output is connected to the Reset register and first counter inputs.

Description

The invention relates to computing and can be used in automated systems for collecting and processing information. A key device for inputting information is known, which contains keyboards, an exchange register, one-shot, a counter, logic gates AND and OR O. A disadvantage of the device is its complexity. The closest in technical essence to the invention is an information input device comprising a register, an AND-NE element, a single-oscillator, a first counter and a block of switching elements, the first and second outputs of which are connected to the corresponding inputs of the AND-NOT element whose output is connected with the first input of the first OR element, the output of which is connected through the one-shot to the counting input of the first counter and to the "left shift input of the register, the right shift input of which is the input Device output, the outputs parallel and n therefore the output data outputs are parallel and serial connection points, respectively, the first counter outputs are connected to inputs of first AND 2. A disadvantage of the known device is lack of possibility of inputting characters in binary code with a width of variable, limiting the scope thereof. The purpose of the invention is to expand the field of application of the device by displaying words of variable length. This goal is achieved by the fact that the input device contains a register, an AND-N element, the first OR element, the first AND element, a single vibrator, the first counter and a block of switching elements, the first and second outputs of which are connected to the corresponding inputs of the NAND element. The output of which is connected to the first input of the first OR element, the output of which through the one-shot is connected to the counting input of the first counter and to the left shift input of the register whose right shift is input Device output, the outputs are parallel serial and serial outputs are information outputs of the parallel and serial terminals of the device, respectively, the outputs of the first counter are connected to the inputs of the first AND element, a pulse generator, a second counter, the second and third OR elements are entered, from the second to the fifth AND elements and the trigger , the installation inputs of which are connected to the first and second outputs of the block of switching elements, inverting and non-inverting outputs - to the first inputs of the second and third elements And, respectively, the second input of the second The first element AND is connected to the second input of the first element OR and with the output of the fourth element AND, the non-inverting input of which is connected to the output of the pulse generator, the second input of the third element AND is connected to the output of the element AND-NOT, the outputs of the second and third Elements AND are connected to the corresponding inputs of the second the OR element, the output of which is connected to the information input of the register, the third output of the switching element unit is connected to the first inverting input of the fourth element AND, and to the first input of the fifth element AND, the second the input of which is connected to the second inverting input of the fourth And element and connected to the output of the first And element, the output of the fifth And element is a gating device, the input of which is connected to the counting input of the second counter, the overflow output of which is transmitted to the first input of the third element OR, the second the input of which is the device's input input, and the output is connected to the Reset register and first counter inputs. The drawing shows a diagram of the device .. The device contains a register 1, a third element OR 2, a second counter 3, a second element AND 4, a second element OR 5, a trigger 6, a block 7 of switching elements, a third element AND 8, a one-shot 9, an element OR 10 , the element AND-NOT 11, the fifth element And 12, the first element And 13, the first counter 14, the fourth element And 15, the generator 16 pulses, the keys (from first to third) 17-19. The device works as follows; The character code set is implemented using the two keys 17 and 18 of block 7, the character code being dialed and recorded.

It is written to register 1 sequentially one bit at a time. Units are recorded with key 17, and zero are written with key 18. Each time you press keys 17 or 18, at the output of an AND-NOT logic element, we get the symbol of a logical unit that permits rewriting the binary bit of a character element from trigger 6 through AND 8 or OR 5 elements to register 1. When you release the key 17 or 1B in the back the front of the signal from the logical element OR 10, the one-shot 9 is triggered and outputs the Shift signal (left) to register 1, and also counts counter 14. The circuit works the same way when dialing subsequent bits of the character code.

After the set of all digits of the character is completed, key 19 is pressed, and the register bits 1 (all zeros or all ones, automatically depending on the last recorded digit of the character code before pressing the key 19) are automatically written to the keys 17. or 18.

This is schematically done as follows. When pressing the key 19, the logical zero signal enters the input of the element 15 and allows the passage of single pulses from the generator 16 through the element IL 10 to the one-shot 9, and also allows copying the information of the inverse output of trigger 6 through the elements 4 and OR 5 to the register 1. On the trailing edge, a one-shot 9 is triggered, the pulses from which the register 1 is shifted (to the left) and counted by one counter 14. Thus, one bit of information from the generator 16 records one bit of information per register 1. When the register is full Stra 1, which will be defined the counter 14, the signal output from the AND gate 13 is provided on the passage prohibition pulses from generator 16 and is prepared issuance permission signal from the AND gate 12. Signal Resolution vschaets when releasing the key 19 in the infor mation receiver. This signal tells the receiver that the character code can be off register 1.

In this case, the symbol can be cleared from register 1 by parallel or sequential codes. When outputting by a serial code, the receiver of information enters into the Extraction device, which is shifted (to the right) and thus the next body to issue the next bit x. symbol from register 1. Simultaneously with the signal. The output is recalculated from counter 3. When reading the last digit of the character code from register 1 from counter 3 through the OR 2 element, the Reset signal to counter 14 is output, and the device removes the Resolution signal.

When the receiver reads information from the device in parallel code from the receiver, after reading the character code, we get the Dump command, according to which register 1 is reset in the device and counter 14 is through the OR 2 element. The device removes the Resolution signal. Thus, in the case of inputting a character or control word with variable-size words, their binary code consists of its own character code (recorded with the help of keys 17 and 18), the second part consists of binary digits of ones or zeros (recorded automatically by a circuit). The second part is necessary for the receiver to recognize its own character code and sub-character separation. Introduction to the circuit of the trigger device, pulse generator, counter and elements AND and OR expands the field of application of the device, since it is possible to enter characters in binary code with a constant bit size (MTK-2, MTK-5, KO-7, KO-8, ATP), and in a variable-bit code (control words, form codes, Morse code, etc.). This quality is very important, as most modern automated process control systems, special systems incorporate a large set of external devices, sensors, are connected to communication channels and, as a rule, work with several types of codes.

Claims (1)

A DEVICE FOR INFORMATION INPUT, containing a register, an AND element, a first OR element, a first AND element, a single vibrator, a first counter and a switching element block, the first and second outputs of which are connected to the corresponding inputs of the NAND element, the output of which is connected to the first input of the first OR element, the output of which is connected through a single-shot to the counting input of the first counter and to the shift input to the left of the register, the shift input to the right of which you are? ” the output “device”, the outputs of the parallel and serial outputs are information outputs of the parallel and serial outputs of the device, respectively, the outputs of the first counter are connected to the inputs of the first element And, characterized in that, in order to expand the scope of the device by outputting words of variable length, pulse generator, second counter, second and third elements OR, from second to fifth elements AND, and a trigger, the installation inputs of which are connected to the first and second output a block of switching elements, inverting and non-inverting outputs - to the first inputs of the second and third elements AND, respectively, the second input of the second element And is connected to the second input of the first element OR and the output of the fourth element And, the non-inverting input of which is connected to the output of the pulse generator, the second the input of the third AND element is connected to the output of the AND element, the outputs of the second and third AND elements are connected to the corresponding inputs of the second OR element, the output of which is connected to the information input register a third switching element output unit is connected to a first inverting input of the fourth AND element and to the first input of the fifth AND gate, a second input coupled to a second inverting input of the fourth. element And is connected to the output of the first element And, the output of the fifth element And is the gate output of the device, the output of which is connected to the counting input of the second counter, the overflow output of which is connected to the first input of the third element OR, the second input of which is the input of the device, and the output is connected to the inputs of the Reset register and the first counter ..