SU1049966A1 - Device for writing data in working storage - Google Patents

Description

It is connected to the first input of the second element I, the second input of which and the first input of the third element I poa. Connected to the output of the first trigger, the second input of the first element And and the third single inputs of the second and third triggers are connected to the thirty-fourth output of the clock generator, the thirty-fifth output of which is aajisi another output of the device synchronization, and the thirty-sixth output is connected to the second input of the third element And , the outputs from the first to the fourth signal distributor are one 104 of the control outputs of the device, and the fifth and sixth outputs are connected respectively to the zero input of the second trigger and to the first The first zero input of the third trigger, the second zero input of which is connected to the output of the first element I, the outputs of the seventh to tenth signal distributor are connected to the control inputs of the switch and are other control outputs of the device, the outputs of the switch are other information outputs of the device.

one

The invention relates to computing and can be used to write information to the RAM.

A device is known for recording information into a RAM, a social unit of input, the inputs of which are connected to the outputs of the synchronization unit, and the output is connected to the information input of the serial code to parallel converter ij.

A disadvantage of this device is its limited scope.

The closest to the invention to the technical nature is devices for recording information into a working memory containing an input unit, a serial code-to-parallel converter, a synchronization unit, the first eighth outputs of which are connected to the input inputs of the input block and a serial code to parallel converter, the ninth , the tenth and eleventh outputs - to the inputs of the synchronization of the input block, the twelfth output to the installation input O of the serial code to parallel converter, information turn is connected to the output of the input unit, inputs of parallel code input connected to the thirteenth, couple | Ya1adtsatomu, fifteen lu outputs sync block, and outputs the information to the first device 2 outputs.

A disadvantage of this device is that it lacks the ability to convert a sequential code into a binary-decimal code and the possibility of transferring it to the operational memory, which limits its scope.

The purpose of the invention is to expand the field of application of the device by writing binary-decimal numbers to the operational memory.

0

This goal is achieved by the fact that in the device for recording information in the RAM, containing a clock signal generator, the outputs of which from the first to the eighth are connected to the inputs of the first code converter and the information signal generator, the synchronization inputs of which are connected to the outputs from the ninth to the eleventh clock generator,

0 twelve output of which is connected to the installation input of the first code converter, the information input of which is connected to the output of the information signal generator, and the control inputs to the outputs of the thirteenth to the fifth natures of the sync signal generator, and the outputs of the first code converter are one of the information outputs devices, entered a decoder,

0 | signal distributor, triggers, ele. The cops I, the switch and the second code converter, one of the information inputs of which and the inputs of the decoder are connected to the information outputs of the first code converter, the control output of which is connected to the first single input of the first trigger, the second single input of which is connected with the output of the data signaling generator, the third single and zero inputs are connected respectively to the eighth and twelfth outputs of a snc generator, and the output is connected to the first single inputs of the second and third About the flip-flops, the outputs of which are connected respectively to the first and second control inputs of the signal distributor, the control inputs of which are connected from the third to the outputs of the decoder from first to fourth, the fourth and fifth outputs of which are connected respectively to the second single input of the third trigger, the first input of the first element and their second unit input of the second trigger, the synchronization inputs of the second code converter are connected to the outputs of the thirteenth to fifteen clock generator The sixteenth of which is one of the device synchronization outputs, and the seventeenth through twenty fourth outputs are connected to other information inputs of the second code converter, the outputs of which are connected to one of the switch inputs, the other inputs of which are connected1) 1Ы to one of the information outputs of the first a code converter, the outputs of the second and third elements I are connected to the inputs from the inputs of the signal distributor, the other inputs of which are connected to the outputs from twenty-one, thirty-second generation clock signal, the thirty-third output of which is connected to the first input of the second element I, the second input of which and the first input of the third element I are connected to the output of the first trigger, the second input of the first element I and the third single inputs of the second and third trigger are connected to thirty the fourth clock signal generator BtixoaoM, the thirty-fifth output of which is another device synchronization output, and the thirty-sixth output connected to the second input of the third And element, the outputs from the first to the fourth signal distributor als are one of the actuating The yields. The other devices and the fifth and secondary outputs are connected respectively to the zero input of the second trigger and to the first zero input of the third trigger, the second zero input of which is connected to the output of the first element And, the seventh kjoro output connectors to the tenth distributor The switch inputs are the other control outputs of the device, the switch outputs are the other information outputs of the device. FIG. 1 shows a functional diagram of the proposed device; in fig. 2 - functional diagram of the signal distributor; in fig. 3 shows the coordinate field of the input digits of the tablet in the driver information signals. The device contains (Fig. 1) a sync signal generator 1, a shaper 2 information signals, 3, a second 4 and a third 5 And elements, a first code 6 converter for converting a serial combined code into a parallel binary code, a first 7, a second 8 and a third triggers, decider 10, designed to form features of regions of the coordinate field of the recorded digits, second converter 11 of the code, designed to convert binary code into binary-decimal, distributor 12 signals and ommutator 13. FIG. 1 denotes outputs 14-49 of the first to thirty-sixth clock signal generator, output 50 of the information signal generator, outputs 51 of the first, 52 second and 53 third triggers, information 54-62, and control 63 outputs of the first converter. 6 code, output 64 the first tri-Hera, the control inputs 65-7O from the first to the third signal distributor, the fifth output 71 of the decoder, the outputs 7281 from the first to ten signal distributor, and the outputs 82-85 of the switch. The signal distributor contains (Fig. 2) elements And 86 - 1 O6 and elements 107 and 1 O8. The coordinate field of the input numbers contains (FIG. 3) three areas for entering numbers and the area for setting the operation modes. The first region includes squares with one-digit numbering from one to nine, the second region — with two-digit numbering from ten to nine to nine, and the third region — with three-digit numbering to two hundred and fifty and six. The mode setting mode contains rectangles with S10 numbering from zero along the chain. FIG. 3 marked loortsinaty X and Y coordinate floor. The coordinate field is located on the tablet, which is part of the information signal generator, which also contains loop-like and single-circuit coordinating windings with polling circuits, a code sensor and an input button (not shown). The device works as follows. At all outputs of the generator 1 (Fig. 1, signals are generated continuously, ensuring the operation is ordered in time, the devices and determining the main cycles in each work cycle. In the first cycle, the coding windings of the former 2 are polled. Before the start of the interrogation signal on the Bbtxocte 25 generator 1 sets the converter 6 to its initial state and the trigger 7. At the time of the signal at the output 18 of the generator 1, the loop-like coding windings of the former 2 are interrogated, with the result that at the output 5O successively are two 2-bit code codes (where is an integer), and signals from inputs 19 and 2 of generator 1 interrogate the single-loop coding windings of the drive plan in the driver 2, and two unitary signals appear at output 50; codes. All codes from output 50 are fed to converter 6. At its outputs 54-57, a binary code is formed for the X coordinate, and at outputs 5862 - the binary code of the CL coordinate V. The signal at the control output 63 is detected only when the converter arrives 6 correct combinations of both unitary codes. At the time of the signal at the output 21 of the generator 1, in the case of pressing the button, the driver 2 generates a single signal, also arriving at the output 50. This signal sets the trigger 7 to position 1. I At the very beginning of the second cycle of the device, the signal at the output 26 of block 1 sets the converter 11 to the rest position, after which the converter 11 starts working under the influence of signals at the output 27 of the generator 1. Its operation continues until the code value at the outputs of the AO-37 reaches the code value at the outputs 5 4 - 61 transforms of the bodies 6. The end of operation of the converter 11 is synchronized by a signal at the output 28 of the generator 1. At the outputs of the converter 11, a code of units, tens and hundreds is generated. The operation of the device in the third cycle in the case of pressing the input button of the imaging unit 2 consists of generating 12 control signals by the distributor, the number and sequence of which depends on the sign of the coordinated field area formed on one of the inputs of the decoder 10. The operator sets the initial address of the array of the working memory and reads in order the coordinates of the rectangles: the coordinate field of the fogger 2, To set the starting address, the operator must read the coordinates of the rectangle, ahod luminant in the installation area modes. At the same time, at output 71 of the device (| rator 10, a signal appears allowing the triggering at position 1 of trigger 8 at an output of generator 47 at the same time. At the same time, the same signal, through element 3, sets trigger 9 to position O. Next, the operator reads Koof is the annotation of that rectangle, the number of which corresponds to the starting address of the selected array of RAM, into which information is written {mack. Distributor 12 at the same time generates signals at the outputs 72 76, since the common input of the And 104 - 106 elements is discharged a signal from the output of the element 91. At the device output 72, a signal appears to set the operating memory counter to position O. The signal at output 73 allows the input of a parallel binary code generated at outputs 54 to 61 of the converter 6 into the operating counter. By the signal from output 76, trigger 8 returns to the original position of O. Further operation of the distributor 12 depends on the number of regions of the coordinate field of the former 2, within which the coordinates of the rectangles are read. When reading the coordinates of the rectangles of the first region, the decipheror 10 generates a signal on the junction 69, which simultaneously with the output signal of the .53 element And 5, arriving at the stroke of the distributor 12, resolves the sequential operation of the elements And 9699 (Fig. 2). The signal from Bi.ixoaa 79 of the distributor 12 is fed to the input of the switch 13 and allows the passage through it of the code etsinmsts from the outputs of the converter 11. The same signal is sent to oneijaTHBHyro memory for recording a number of units. The signal from the output of the element AND 97 through the element OR 107 is fed to the output 74 of the device and to the counting bkoa of the RAM counter. The signal from the output of the AND 98 element through the OR element 108 enters the operative memory to record a space. The signal from the output of the element AND 99 through the element OR 1О7 is fed to the counting input of the RAM counter. At the same time, the 3Tot signal sets trigger 9 to O position.

When reading the coordinates of the second region, the decoder 10 generates signals at the outputs 68 and 69. The signal from the output 68 simultaneously with the signal at the output 53 of the element And 5 through the element And 87 allows the sequential operation of the elements And 94 and 95 under the action of the signals at the outputs 40 and 41 of the generator 1. The signal from the output 80 of the element And 94 enters the control room of the input of the switch 13 to pass through it the code of tens and into the operative memory for recording the code of ten. The signal from the output of the element AND 95 through the element OR 1О7 is fed to the counting input of the RAM counter. Thereafter, elements AND 96-99 start operating in the distributor 12 under the influence of signals at the outputs 42-45 of the generator 1. The order of operation of the distributor 12 is described.

When reading the coordinates of the rectangles of the third region, the 1Q decoder generates signals at outputs 691 and 67. The signal from output 67, when there is a signal at output 53 of element 5, through element 8.6 allows sequential operation of elements 92 and 9 under the influence of signals on lines 3 and 39 of the generator 1. Output 81 is fed to the input of the switch 13 to pass through it the code of hundreds and in the memory for recording the code of hundreds. The signal from the output element And 93 through the element OR 107 is fed to

counter input memory counter. After that, in the distributor 12 begin to work elements And 914-99. The order of operation of the distributor 12 is described here.

When reading the coordinates of the rectangles in the area of numbers from zero to nine (i.e., in the mode setting area), the decoder 10 produces output 70. This signal permits setting at position 1 of trigger 9, and at the time of the signal, output 52 AND 4 elements permit the operation of AND 1OO and 1О1 elements under the influence of signals at outputs 4О in 41 generator 1. The signal from output 78 p goes to input of switch 13 to pass through it a code of digits from zero to nine and write this code to the operational memory. be

The operation of the distributor 12 when reading the coordinates of the rectangles in any area in case the trigger 9 is set to the position 1 differs from that described only by the fact that at the moment the signal acts on the code 52 of the element 4, elements 102 and 103 first work. I102 through the element AND 108 enters the operational memory for recording the code of the space, and the signal from the output of the element I CW through the element OR 107 enters the account. the main input of the memory counter;

Thus, the proposed device makes it possible to write binary numbers codes corresponding to the sequence numbers of the rectangles of the coordinate field of the former 2 into any array of RAM cells, thereby expanding the device's field of application. The advantage of presenting information in the binary-ten code is the possibility of the M4Nosti of rapidly changing the semantic names in the rectangles of the coordinate field with their sequence numbers hidden in decimal form.

The feasibility advantage of the proposed device lies in the wider, compared to the known, area of its application by recording binary-decimal numbers in the RAM.

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9

Claims (1)

DEVICE FOR RECORDING INFORMATION IN RAM, which contains a clock generator, the outputs of which are connected from the first to eighth to the polling inputs of the first code converter and information signal generator, the synchronization inputs of which are connected to the outputs of the ninth to eleventh clock generator, the twelfth output of which is connected to the installation input of the first a code converter, the information input of which is connected to the output of the information signal generator, and the control inputs are connected to the outputs thirteenth to fifteenth clock generator, and the outputs of the first code converter are one of the information outputs of the device. The device is distinguished by the fact that, in order to expand the scope of the device by writing binary decimal numbers, a decoder is introduced into it , a signal distributor, triggers, AND elements, a switch and a second code converter, one of the information inputs of which and the decoder inputs are connected to the information outputs of the first code converter, control output One of which is connected to the first unit input of the first trigger, the second unit input of which is connected to the output of the information signal former; the third unit and zero inputs are connected respectively to the eighth and twelfth outputs of the clock generator, and the output is connected to the first unit inputs of the second and third triggers, the outputs of which are connected respectively to the first and second control inputs of the signal distributor, the control inputs of which are from third to sixth connected to the outputs of the decoder from the first to fourth, fourth and fifth— § § whose outputs are connected respectively to the second unit input of the third trigger, to the first input at the first And element and to the second single input of the second trigger, the synchronization inputs of the second code converter are connected to the outputs from the thirteenth to the fifteenth clock generator, the sixteenth output of which is one of the device synchronization outputs, a. the outputs from the seventeenth to the twenty-fourth are connected to other information inputs of the second code converter, the outputs of which are connected to one of the inputs of the switch, the other inputs of which are connected to one of the information outputs of the first code converter, the outputs of the second and third element And connected to one of the inputs of the distributor signals, the other inputs of which are connected to the outputs from the twenty-fifth and thirty-second clocks, the thirty-third output of which is SU ... "1049966 is connected to the first input m second AND gate, whose second input and the first input of the third AND gate sub. are connected to the output of the first trigger, the second input of the first And element and the third single inputs of the second and third triggers are connected to the thirty-fourth output of the clock generator, the thirty-fifth output of which is another synchronization output of the device, and the thirty-sixth output is connected to the second input of the third element And, the outputs from the first to the fourth signal distributor are some of the control outputs of the device, and the fifth and sixth outputs are connected with a "responsibly to the zero input of the second trigger and to the first at the zero input of the third trigger, the second zero input of which is connected to the output of the first AND element, the outputs from the seventh to tenth signal distributor are connected to the control inputs of the switch and are other control outputs of the device, the outputs of the switch are other information outputs of the device.