[go: up one dir, main page]

SG10201604535PA - Method of Mechanical Separation For A Double Layer Transfer - Google Patents

Method of Mechanical Separation For A Double Layer Transfer

Info

Publication number
SG10201604535PA
SG10201604535PA SG10201604535PA SG10201604535PA SG10201604535PA SG 10201604535P A SG10201604535P A SG 10201604535PA SG 10201604535P A SG10201604535P A SG 10201604535PA SG 10201604535P A SG10201604535P A SG 10201604535PA SG 10201604535P A SG10201604535P A SG 10201604535PA
Authority
SG
Singapore
Prior art keywords
double layer
layer transfer
mechanical separation
separation
mechanical
Prior art date
Application number
SG10201604535PA
Other languages
English (en)
Inventor
Marcel Broekaart
Ionut Radu
Didier Landru
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG10201604535PA publication Critical patent/SG10201604535PA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B43/00—Operations specially adapted for layered products and not otherwise provided for, e.g. repairing; Apparatus therefor
    • B32B43/006—Delaminating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02595—Microstructure polycrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
    • H01L21/02598—Microstructure monocrystalline
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6835—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during build up manufacturing of active devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Ceramic Engineering (AREA)
SG10201604535PA 2015-06-05 2016-06-03 Method of Mechanical Separation For A Double Layer Transfer SG10201604535PA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102015210384.6A DE102015210384A1 (de) 2015-06-05 2015-06-05 Verfahren zur mechanischen Trennung für eine Doppelschichtübertragung

Publications (1)

Publication Number Publication Date
SG10201604535PA true SG10201604535PA (en) 2017-01-27

Family

ID=56511277

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201604535PA SG10201604535PA (en) 2015-06-05 2016-06-03 Method of Mechanical Separation For A Double Layer Transfer

Country Status (11)

Country Link
US (3) US10910250B2 (fr)
JP (1) JP6413129B2 (fr)
KR (1) KR101840718B1 (fr)
CN (1) CN106252280B (fr)
AU (1) AU2016203094B2 (fr)
BE (1) BE1023710B1 (fr)
DE (1) DE102015210384A1 (fr)
FR (1) FR3037189B1 (fr)
IL (1) IL245492B (fr)
SG (1) SG10201604535PA (fr)
TW (1) TWI694509B (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105931997B (zh) * 2015-02-27 2019-02-05 胡迪群 暂时性复合式载板
FR3093715B1 (fr) * 2019-03-15 2021-03-05 Soitec Silicon On Insulator Dispositif de maintien pour un ensemble à fracturer
FR3103313B1 (fr) 2019-11-14 2021-11-12 Commissariat Energie Atomique Procédé de démontage d’un empilement d’au moins trois substrats

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
MY118019A (en) * 1998-02-18 2004-08-30 Canon Kk Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof
US6391743B1 (en) * 1998-09-22 2002-05-21 Canon Kabushiki Kaisha Method and apparatus for producing photoelectric conversion device
US6562648B1 (en) * 2000-08-23 2003-05-13 Xerox Corporation Structure and method for separation and transfer of semiconductor thin films onto dissimilar substrate materials
FR2823599B1 (fr) 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
US6814832B2 (en) * 2001-07-24 2004-11-09 Seiko Epson Corporation Method for transferring element, method for producing element, integrated circuit, circuit board, electro-optical device, IC card, and electronic appliance
US6743662B2 (en) * 2002-07-01 2004-06-01 Honeywell International, Inc. Silicon-on-insulator wafer for RF integrated circuit
FR2844634B1 (fr) 2002-09-18 2005-05-27 Soitec Silicon On Insulator Formation d'une couche utile relaxee a partir d'une plaquette sans couche tampon
US20050082526A1 (en) 2003-10-15 2005-04-21 International Business Machines Corporation Techniques for layer transfer processing
CN101512721A (zh) 2006-04-05 2009-08-19 硅源公司 利用层转移工艺制造太阳能电池的方法和结构
EP2035973A4 (fr) 2006-06-30 2009-12-16 Tele Atlas North America Inc Index adaptatif à compression variable
FR2907966B1 (fr) * 2006-10-27 2009-01-30 Soitec Silicon On Insulator Procede de fabrication d'un substrat.
AT508318B1 (de) 2008-01-24 2022-07-15 Brewer Science Inc Verfahren für eine vorübergehende montage eines bausteinwafers auf einem trägersubstrat
FR2929758B1 (fr) 2008-04-07 2011-02-11 Commissariat Energie Atomique Procede de transfert a l'aide d'un substrat ferroelectrique
FR2935536B1 (fr) * 2008-09-02 2010-09-24 Soitec Silicon On Insulator Procede de detourage progressif
EP2213415A1 (fr) * 2009-01-29 2010-08-04 S.O.I. TEC Silicon Dispositif pour le polissage du bord d'un substrat semi-conducteur
US8546238B2 (en) * 2009-04-22 2013-10-01 Commissariat A L'energie Atomique Et Aux Energies Method for transferring at least one micro-technological layer
EP2246882B1 (fr) * 2009-04-29 2015-03-04 Soitec Procédé de transfert d'une couche à partir d'un substrat donneur sur un substrat de manipulation
US8252665B2 (en) * 2009-09-14 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Protection layer for adhesive material at wafer edge
KR20110062365A (ko) 2009-12-03 2011-06-10 현대자동차주식회사 터보차저 일체형 배기매니폴드 구조
JP5644134B2 (ja) 2010-02-25 2014-12-24 ブラザー工業株式会社 画像記録装置
WO2013006865A2 (fr) * 2011-07-07 2013-01-10 Brewer Science Inc. Procédés de transfert de tranches ou couches de dispositif entre des substrats de support et d'autres surfaces
FR2980919B1 (fr) * 2011-10-04 2014-02-21 Commissariat Energie Atomique Procede de double report de couche
FR2985371A1 (fr) 2011-12-29 2013-07-05 Commissariat Energie Atomique Procede de fabrication d'une structure multicouche sur un support
FR2995447B1 (fr) * 2012-09-07 2014-09-05 Soitec Silicon On Insulator Procede de separation d'au moins deux substrats selon une interface choisie
KR102061695B1 (ko) * 2012-10-17 2020-01-02 삼성전자주식회사 웨이퍼 가공 방법
FR2997554B1 (fr) 2012-10-31 2016-04-08 Soitec Silicon On Insulator Procede de modification d'un etat de contrainte initial d'une couche active vers un etat de contrainte final
FR2997553A1 (fr) 2012-10-31 2014-05-02 Soitec Silicon On Insulator Procede de separation mecanique d'une structure formee de deux substrats monocristallins
US9281233B2 (en) * 2012-12-28 2016-03-08 Sunedison Semiconductor Limited Method for low temperature layer transfer in the preparation of multilayer semiconductor devices
US10036734B2 (en) * 2013-06-03 2018-07-31 Snaptrack, Inc. Ultrasonic sensor with bonded piezoelectric layer
FR3019374A1 (fr) * 2014-03-28 2015-10-02 Soitec Silicon On Insulator Procede de separation et de transfert de couches
KR20180010274A (ko) * 2015-06-19 2018-01-30 큐맷, 인코포레이티드 본드 및 릴리스 레이어 이송 프로세스

Also Published As

Publication number Publication date
FR3037189B1 (fr) 2020-02-28
US20240021461A1 (en) 2024-01-18
IL245492A0 (en) 2016-08-31
TW201643953A (zh) 2016-12-16
KR20160143523A (ko) 2016-12-14
CN106252280B (zh) 2020-01-31
AU2016203094B2 (en) 2018-03-08
BE1023710B1 (fr) 2017-06-22
FR3037189A1 (fr) 2016-12-09
AU2016203094A1 (en) 2016-12-22
CN106252280A (zh) 2016-12-21
US20160358805A1 (en) 2016-12-08
IL245492B (en) 2021-08-31
KR101840718B1 (ko) 2018-05-04
JP2017005245A (ja) 2017-01-05
BE1023710A1 (fr) 2017-06-22
JP6413129B2 (ja) 2018-10-31
US10910250B2 (en) 2021-02-02
US11742233B2 (en) 2023-08-29
US12165900B2 (en) 2024-12-10
US20210118717A1 (en) 2021-04-22
TWI694509B (zh) 2020-05-21
DE102015210384A1 (de) 2016-12-08

Similar Documents

Publication Publication Date Title
SG10201607880PA (en) METHOD FOR FORMING TiON FILM
SG11201707998TA (en) Method for atomic layer etching
SG11201610771SA (en) Method of manufacturing a substrate
SG10201506217SA (en) Etching method of multilayered film
EP3210716C0 (fr) Procédé de fabrication d'un élément composite
GB201415790D0 (en) A method of image anaysis
SG10201503005RA (en) Method For Transferring A Useful Layer
EP3116671C0 (fr) Procédé de formation d'un rouleau composite
SG10201506214XA (en) Etching method of multilayered film
HUE042306T2 (hu) Eljárás egy lencsealak vastagságának csökkentésére
SG10201503789YA (en) Method For Etching Etching Target Layer
GB2541146B (en) Method of manufacturing a germanium-on-insulator substrate
ZA201606592B (en) Dense media separation method
SG10201504420RA (en) Method For Etching Insulation Film
GB201414594D0 (en) Method of making a Graphene-cu-Graphene Heterogeneous Film
GB201419613D0 (en) Method of synchronising multimedia content across a plurality of devices
PL2927017T3 (pl) Sposób pokrywania substratu
GB201421768D0 (en) Method of manufacturing a seal
SG10201604535PA (en) Method of Mechanical Separation For A Double Layer Transfer
GB201400353D0 (en) Method of selecting a routing scheme
PL3177232T3 (pl) Sposób wytwarzania folii wielowarstwowej
GB2527618B (en) Method of lining a tubular structure
SG10201912610SA (en) A method for transferring a useful layer
SI3245149T1 (sl) Postope za izdelavo slojev povezov
SI2937159T1 (sl) Metoda za izdelavo viličastega ključa