RU2608302C1 - Design of monolithic silicon photoelectric converter and its manufacturing method - Google Patents

Abstract

FIELD: batteries.

SUBSTANCE: invention relates to multijunction photoelectric converters (PEC) used in solar batteries and photodetectors of space and other purposes. Monolithic silicon photoelectric converter contains diode cells accommodating perpendicular to the horizontal light-receiving surface vertical p-n junctions and located in the diode cells in parallel to the light-receiving surface horizontal n⁺-p^-(p⁺-n^-) junctions, herewith all the diode cells are connected in series into a single structure with metal cathode and anode electrodes, wherein each diode cell (and their vertical p-n junctions) is isolated from adjacent on the four sides, from the side – with a dielectric layer, from the bottom – with an additional horizontal p-n junction formed by a silicon substrate of p^-(n^-) type of conductivity and with a lower horizontal n⁺(p⁺) layer of p-n junction, herewith the upper horizontal surface of the diode cells carries an upper horizontal p-n-junction, onto n⁺(p⁺) layers of which there are respectively the cathode (anode) electrode, and onto the p⁺(n⁺) layer - the anode (cathode) electrode. Also proposed is a method of forming a monolithic silicon photoelectric converter.

EFFECT: technical result is higher efficiency factor, radiation resistance and manufacturability of multijunction converters.

3 cl, 6 dwg

Description

The present invention relates to the field of photoelectric converters (PECs) used as receivers of optical radiation and solar cells for space purposes.

The "traditional" single-junction (OP) PEC design with perpendicular to the direction of the light radiation flux of the light receiving surface p ⁺ -n ^- -n ⁺ (p ⁺ -p ^- -n ⁺ ) junction is known - a horizontal diode cell (DJ), on the surface of which a light-brightening coating is located (Fig. 1a, b). Such solar cells have a low efficiency (efficiency), about 14%, and do not allow to obtain a high value of the output voltage of more than 0.6 V, which limits the scope of their application in solar cells with radiation concentrators [1. Zi S. Physics of semiconductor devices. 1972].

A known design (Fig. 2) of a multi-junction (MF) silicon single-crystal photomultiplier tube containing diode cells (DJ) with a light-brightening coating placed on their light-receiving surface and with single p ⁺ -n ^- -n ⁺ (p ⁺ -p ^- -) located therein n ⁺ ) transitions, in the direction perpendicular to the light-receiving surface, connected into a single structure by metal anode and cathode electrodes [2. RF patent №2127472, publ. 10/03/1999; 3. E.G. Tuk et al. Characteristics of a silicon multi-junction solar cell with vertical pn junctions. Fr. Physics and technology of semiconductors. 1997 T. 31, No. 7, p. 855-858].

Such PECs have a low efficiency (less than 12%), since they have a relatively small volume of the space charge region (SCR) of the pn junction adjacent to the photosensitive surface of the PEC.

Known, taken as a prototype (Fig. 3), the design of an MF silicon single-crystal photomultiplier, containing diode cells with located in them, perpendicular to the horizontal (perpendicular to the direction of light) of the light-receiving surface, vertical p ⁺ -p ^- -p ⁺ (p ⁺ -n ^- -n ⁺⁾ junctions and solar cells arranged in parallel to the light-receiving surface of the horizontal ^{n - p - (p + -n} -) transitions, all transitions are joined into a unitary structure (diagram) metal cathode and anode electrodes disposed respectively governmental domains on the lateral surfaces - n ⁺ (p ⁺⁾ type perpendicular single ^{n + -p - -p + (p} + -n - -n +) junctions [4. Murashev V.N. et al. “Semiconductor photoconverter and method for its manufacture”, RF Patent No. 2377695 dated 12/27/2009].

A method for its manufacture, including

- the formation of vertical single p ⁺ -n ^- -n ⁺ (p ⁺ -p ^- -n ⁺ ) junctions on the surface of single-crystal silicon wafers, metallization of the wafer surface, assembly of wafers into a column with gaskets made of aluminum foil, alloying in a vacuum furnace, cutting a column on the structures, the formation of horizontal p ⁺ -n ⁺ junctions, the connection of current-carrying contacts and the application of a dielectric light-brightening coating.

The disadvantages of the prototype design are also low radiation resistance, a limitation of the efficiency of the photoconverter associated with exceeding the planar cell sizes of the diffusion length of minority charge carriers, as well as technological problems associated with the “manual” assembly of a stack of plates, its mechanical cutting and grinding of the surface.

The objectives of the invention is to increase the radiation resistance and efficiency of the photoconverter and simplify the technology of its manufacture.

The first and second goals are achieved by creating a “monolithic” FP design in which each diode cell (and their vertical pn junctions) is isolated from the neighboring ones from the side by a dielectric layer, and from below by an additional horizontal pn junction formed by the p ^- (n ^- ) substrate of the conductivity type and the lower horizontal n ⁺ (p ⁺ ) pn junction layer, the upper horizontal pn junction is located on the horizontal upper surface of the cell, the cathode (anode) electrode is located on the n ⁺ (p ⁺ ) layer, and p ⁺ (n ⁺ ) layer - anode (cathode) electrode, anode electrodes in and cathodes of adjacent cells are connected in series.

In this case, the planar dimensions of the diode cells are much smaller than the diffusion length of minority current carriers, and the vertical ones exceed the absorption depth of the optical radiation spectrum (40 μm).

The third goal is achieved through the use of photomultiplier technology, which excludes the mechanical assembly and cutting of silicon wafers, which consists in the formation of a p ^- (n ^- ) layer type n ⁺ (p ⁺ ) layer type on the substrate surface, such as the lower horizontal pn junction, epitaxial layer growth and formation by a first and a second photolithography on the surface of n ⁺ (p ⁺⁾ layers of the upper horizontal pn-junction, patterning through photolithography and etching of the third slits in silicon at a depth greater than the depth of the lower hot the pn junction, the formation of vertical pn junctions by diffusion of the donor (acceptor) impurity into the surface of the gaps, thermal oxidation of the surface of the gaps, deposition of a dielectric light-coating coating on the surface of the plate, formation of contact windows by fourth photolithography, metal deposition and the formation of fifth photolithography connected in series between electrodes of the anode and cathode of the cells of the photoconverter.

The design and topology (top view) of a monolithic silicon photovoltaic converter are shown respectively in FIG. 4b, which according to the invention contains a semiconductor substrate 1 p (n) type, on the surface of which diode cells 2 are located, a light-brightening coating 3 is located on the upper surface of each diode cell, it is located on the surface of the upper horizontal pn junction, on region n (p ⁺ ) 5 of which the electrode of the cathode (anode) 6 is located, and on the region p ⁺ (n ⁺ ) of which the electrode of the anode (cathode) 7 is located, the electrodes of the cathodes 6 and anodes 7 of adjacent cells are connected in series by metal conductors 8, on the lower surface diode cells there is an n ⁺ (p ⁺ ) region of the lower horizontal pn junction 9, which forms a pn junction with a p 1 (p) type substrate 1 and a lightly doped p ^- (n ^- ) 10 region located in the volume of the diode cell, while 10 forms, with four n ⁺ (p ⁺ ) regions of type 11 located on its lateral surfaces, vertical pn junctions, PEC diode cells are isolated from each other on four lateral sides by a dielectric layer 12.

Manufacturing technology. (Implementation Example) The photomultiplier according to the invention can be manufactured using the relatively simple technology shown in FIG. 5a, b, c, d, which consists in the following:

a) antimony ^is diffused at a temperature of T = 1100 ° C for t = 1 hour in p ^- type KDB type 1 KDB plates, then a p-type epitaxial layer 20-40 μm thick is grown;

b) the n ⁺ region of the upper horizontal pn junction is formed by first photolithography and ion doping of phosphorus with a dose of D = 500 μC, the second photolithography is formed by ion doping with a dose of D = 500 μC p ^{+ of the} upper horizontal pn junction, the photoresist is removed, and conduct thermal annealing of radiation defects at a temperature of T = 950 ° C for a time t = 40 minutes;

c) form a surface relief to a depth exceeding the depth of the lower horizontal pn junction — by means of a third photolithography and plasma-chemical etching of the gaps (lattice) in the epitaxial layer and silicon. Then, vertical pn junctions are formed by diffusing phosphorus T = 850 ° C for t = 30 minutes into the surface of the slits. Thermal oxidation of the surface of the slits is carried out, at a temperature of T = 850 ° C for 20 minutes in an atmosphere of dry oxygen (O ₂ ), a dielectric light-coating is deposited on the surface of the plate and contact windows are formed by fourth photolithography, aluminum is deposited and fifth series lithography is formed by the fifth photolithography electrodes of the anode and cathode of the diode cells of the photoconverter.

It should be noted that, in order to further simplify the technology, the regions of the n ⁺ type of vertical pn junctions can be inversion layers formed by a positive charge in the gap oxide as a result of irradiation of the photoconverter, for example, a stream of ionizing radiation from a cobalt-60 isotope with a dose of more than 1.0 Mrad.

The electrical equivalent circuit of the proposed solar cells. shown in fig. 6 differs from the known ones by the presence of isolating diodes - D _from .

Indicated here:

- D _cells — diodes formed by pn junctions of diode cells;

- D _of - diodes formed by insulating pn junctions lower n ⁺ (p ⁺ ) horizontal layer -p ⁺ (n ⁺ ) substrate

Technical advantages of the invention.

As can be seen from FIG. 3, 4 and 5, the width of the diode cell (its one of the horizontal dimensions equal to the distance between the slits) can be very small, i.e. 10 μm or less, which is significantly less than the diffusion length of minority current carriers. This allows you to collect almost all charge carriers generated in the distance (middle) of the p-region. This circumstance, respectively, leads to a higher efficiency of the photomultiplier, its low sensitivity to radiation, which reduces the lifetime and diffusion length of minority charge carriers. The second factor is the high quality of the surface at the silicon conductor interface compared to the quality of the silicon-metal interface in the prototype, which leads to an increase in the recombination of current carriers and, accordingly, the photomultiplier efficiency.

The advantages in manufacturing technology are that there is no need for mechanical cutting of the plates, assembly and fusion of them into a stack, and then mechanical polishing of their surface.

Despite a slightly higher cost, compared to traditional planar batteries, monolithic solar cells are quite competitive and promising, given their high efficiency, high radiation resistance and, accordingly, the possibility of their work with radiation concentrators.

Claims (3)

1. The design of a monolithic silicon photoelectric converter, containing diode cells with perpendicular to the horizontal light receiving surface, vertical pn junctions and located in diode cells, parallel to the light receiving surface, horizontal n ⁺ -p ^- (p ⁺ -n ^- ) junctions, moreover, all diode cells are connected in series into a single structure by metal cathode and anode electrodes, characterized in that each diode cell (and their vertical pn junctions) are isolated m adjacent to four sides of side - dielectric layer, the bottom - additional horizontal pn-junction formed by the silicon substrate p ^- (n ^-) conductivity type and lower horizontal n ⁺ (p ⁺⁾ layer pn-junction, wherein on the upper horizontal surface of the diode the cell is the upper horizontal pn junction, on the n ⁺ (p ⁺ ) layers of which the cathode (anode) electrode is respectively located, and on the p ⁺ (n ⁺ ) layer is the anode (cathode) electrode. 2. A method of manufacturing a structure, including the formation of vertical and horizontal pn junctions on the surface of a single crystal silicon wafer, metallization of the wafer surface, characterized in that an n ⁺ (p) layer is formed on the surface of the silicon wafer - (substrate) p ^- (n ^- ) type ⁺ ) of the type of conductivity of the lower horizontal pn junction, then the epitaxial layer is built up, and n ⁺ (p ⁺ ) layers of the upper horizontal pn junction are formed on the surface by the first and second photolithography, then form Then, by performing the third photolithography and etching the gaps in silicon to a depth exceeding the depth of the lower horizontal pn junction, vertical pn junctions are then formed by diffusion of the donor (acceptor) impurity into the gap surface, thermal oxidation of the gap surface is carried out, and the dielectric is deposited onto the plate surface light-brightening coating, contact windows are formed by fourth photolithography, the metal is deposited and the fifth connection is formed by fifth photolithography among themselves electrodes of the anode and cathode of the diode cells of the photoconverter. 3. A manufacturing method according to claim 2, characterized in that the n ⁺ -type regions of the vertical pn junctions are inversion layers formed by a positive charge in the gap oxide as a result of irradiation of the photoconverter with a stream of ionizing radiation.

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