RU2589388C1 - Alias analogue-to-digital converter - Google Patents

Abstract

FIELD: measuring equipment.

SUBSTANCE: invention relates to measurement and computer engineering and can be used for conversion of analogue electric signals into digital code. Apparatus comprises a track-and-hold, voltage controlled oscillators, analogue-to-digital converters, special-purpose processors for fast Fourier transform, maximum amplitude units, subtract units.

EFFECT: high accuracy of conversion.

1 cl, 7 dwg

Description

The invention relates to the field of measuring and computer engineering and can be used to quickly convert analog electrical signals to digital code in systems operating in a modular number system.

A device (analog) is known (ed. St. USSR No. 1368989, MKI N03M 1/28, BI No. 3, 1988), containing a unit for determining the residue on the largest basis of the RNS, analog-to-digital converters, adders, encoders, correction blocks, switches, one-shot, register, analog input bus, correction bus, control bus, output "core of the number" and output bus residues on the corresponding grounds of the RNS. The disadvantage is the low accuracy of the converter.

A device (analogue) is known (ed. St. USSR No. 1181141, MKI H03M 1/28, BI No. 35, 1985), comprising a residual determination unit based on the largest base of RNS, analog-to-digital converters, correction blocks, input bus, bus corrections, output bus codes on the bases of the RNS, adders, encoders, bus codes of the bases of the RNC. The disadvantage is the low accuracy of the converter.

Closest to the claimed invention is an invention (US Pat. 2433527 Russian Federation, IPC ⁷ H03M 1/28, application. 04/12/2010; publ. 10.11.2011), containing tracking-storage units, analog-to-digital converters, digital-to-analog converters, subtraction units, output bus codes of residuals in the RNS input.

The disadvantage of the prototype is the low accuracy of the converter, due to the increase in error from cascade to cascade as a result of a decrease in the geometric progression of a single quantization interval with respect to the uncertainty interval generated by noise.

The task, which is aimed by the claimed device, is to increase the accuracy of the representation of the shape of the analog signal in digital form.

The technical result is expressed in the implementation of a different approach to analog-to-digital conversion, which allows to eliminate the operation that most negatively affects accuracy.

дополнительного генератора, управляемого напряжением, соединен с входом i-го дополнительного аналого-цифрового преобразователя, при этом выход i-го основного аналого-цифрового преобразователя соединен с входом i-го основного спецпроцессора быстрого преобразования Фурье, а выход i-го дополнительного аналого-цифрового преобразователя соединен с входом i-го дополнительного спецпроцессора быстрого преобразования Фурье, при этом выход i-го основного спецпроцессора быстрого преобразования Фурье соединен с входом i-го основного блока максимальной амплитуды, а выход i-го дополнительного спецпроцессора быстрого преобразования Фурье соединен с входом i-го дополнительного блока максимальной амплитуды, выход которого соединен с третьим входом i-го блока вычитания, первый вход которого объединен с i-й шиной кодов оснований системы остаточных классов, при этом выход i-го основного блока максимальной амплитуды соединен со вторым входом i-го блока вычитания, выход которого объединен с i-й выходной шиной кодов остатков в системе остаточных классов.The technical result is achieved by the fact that an alias analog-to-digital converter containing an input, a tracking-storage unit, n main analog-to-digital converters, n output buses of residual codes in the system of residual classes, where n is the number of bases of the system of residual classes, the main generator is introduced voltage-controlled, n additional voltage-controlled oscillators, n additional analog-to-digital converters, n main and n additional special fast Fourier transform processors, n main and n additional body blocks of maximum amplitude, n blocks of subtraction and n buses of base codes of the system of residual classes, while the input of the device is combined with the input of the tracking-storage unit, the output of which is connected to the input of the main and additional generators controlled by voltage, while the output of the main generator controlled by voltage connected to the input of the main analog-to-digital converters, and the output of the i-th

an additional voltage-controlled generator is connected to the input of the i-th additional analog-to-digital converter, while the output of the i-th main analog-to-digital converter is connected to the input of the i-th main special Fourier transform special processor, and the output of the i-th additional analog-to-digital the converter is connected to the input of the i-th additional special processor of the fast Fourier transform, while the output of the i-th main special processor of the fast Fourier transform is connected to the input of the i-th main maxim block amplitude, and the output of the i-th additional special processor of the fast Fourier transform is connected to the input of the i-th additional block of maximum amplitude, the output of which is connected to the third input of the i-th subtraction block, the first input of which is combined with the i-th bus of the base codes of the system of residual classes while the output of the i-th main block of maximum amplitude is connected to the second input of the i-th subtraction block, the output of which is combined with the i-th output bus of residual codes in the system of residual classes.

In FIG. 1 shows a block diagram of an alias ADC in the code RNS.

In FIG. Figure 2 shows the dependence of the alias frequency in the main branch on the harmonic frequency of the main VCO.

In FIG. Figure 3 shows the dependence of the alias frequency in the additional branch relative to the harmonic frequency of the main VCO.

In FIG. 4 presents table 1 with ADC samples in accordance with the numbers.

In FIG. Figure 5 shows the spectra after the FFT in the main branch and the interpolation to the non-positional representation at bases 3, 5, and 7.

In FIG. Figure 6 shows the spectra after the FFT in the additional branch and the formation of the parity sign on their basis.

In FIG. 7 shows table 2 of the reference voltage of the parallel ADC and weighting based on them the corresponding input signal.

The essence of the invention lies in the synthesis of a harmonic signal and the natural translation of its spectrum into the first Nyquist zone during sampling on elementary analog-to-digital converters (ADCs) with sampling frequencies depending on the base values of the applied system of residual classes (RNS).

The construction of the prototype according to the cascade principle leads to the fact that the synthesis of the noise signal in the first stage, with a decrease (without scaling) by a factor of a single quantization interval in the next stage, increases the uncertainty interval by which the erroneous value can be recorded. For example, if you take the bases of the RNS equal to p ₁ = 3, p ₂ = 5, p ₃ = 7, then in one path of the prototype the range of operating voltages can be divided into three - in the first stage, then one quantum of the first stage - already into five - in the second, and one quantum from the second cascade - by seven - in the third cascade. Thus, the noise level generated in the first stage remains constant (for simplicity - without taking into account the noise of the following stages), and a single quantization interval is reduced significantly. The use of scaling leads to the opposite picture - the interval of unit quantization remains almost unchanged, and the error of the first stage grows exponentially. It is possible to eliminate the negative impact of cascade construction through a different approach to analog-to-digital conversion.

If the sampling frequency of the ADC is less than twice the maximum frequency of the signal, then there is a beating effect and superposition of the spectra (aliasing, from the English “aliasing”). The spectrum of alias beats is always located in the frequency band from 0 to f _i 12, where f _i is the sampling frequency of the elementary ADC. This process is a direct consequence of the Kotelnikov theorem or (in foreign literature) the Nyquist criterion (Analog-to-digital conversion: [translated from English] / Edited by Walt Kester. - M .: Technosphere. - 2007. - 1016 p.). Frequency bands from (N-1) · f _i / 2 to N · f _i / 2 form Nyquist zones, where N is the zone number. The dependence of the alias frequency (f _a ) on the linearly varying frequency of the input harmonic signal can be represented as follows (Fig. 3). To quantize the level of the input signal, it must first be converted to harmonic with frequency

элементарных АЦП, работающих с частотой выборкиwhere F is the range of working harmonic frequencies that is synthesized by a voltage-controlled oscillator (VCO), f _n is the initial frequency of the VCO, E is the range of operating voltage of the ADC, U _bx is the converted input signal level. Next, the synthesized harmonic is convoluted in frequency, according to figure 3, on i

elementary ADCs operating at a sampling rate

- количество уровней квантования алиасного АЦП, p_i - основания применяемой СОК, a n - количество оснований СОК. На этом работа с аналоговым сигналом прекращается и начинается анализ данных в цифровом виде, заключающийся в формировании амплитудно-частотной характеристики, определении частоты с максимальной амплитудой и четности исходной полосы Найквиста, что позволяет реализовать код в СОК. Таким образом устраняется межкаскадная геометрическая прогрессия ошибки и, соответственно, повышается точность преобразования.Where

is the number of quantization levels of the alias ADC, p _i is the base of the applied RNS, an is the number of bases of the RNC. This stops the work with the analog signal and begins the analysis of data in digital form, which consists in the formation of the amplitude-frequency characteristics, determining the frequency with maximum amplitude and parity of the original Nyquist band, which allows you to implement the code in the RNS. This eliminates the interstage geometric progression of the error and, accordingly, increases the accuracy of the conversion.

An additional effect is the simplification of the design of an alias device compared to the prototype, because there is no need to use elementary ADCs specialized on the basis of RNC, which can be replaced by ordinary positional ADCs. Another additional effect is the ability to select the VCO frequency band depending on the application area of the alias ADC, which allows you to tune out from the electromagnetic radiation of an external source that most affects noise quality.

Shown in FIG. 1 alias ADC contains input 1, tracking-storage unit 2, main 3 and additional 4.1-4.n voltage-controlled oscillators (VCO), main 5.1-5.n and additional 6.1-6.n analog-to-digital converters (ADC) , basic 7.1-7.n and additional 8.1-8.n special fast Fourier transform (FFT) processors, main 9.1-9.n and additional 10.1-10.n maximum amplitude blocks, base code buses of the system of residual classes 11.1-11.n , subtraction blocks 12.1-12.n, output buses of residual codes in RNS 13.1-13.n.

The input of device 1 is combined with the input of the tracking-storage unit 2, the output of which is connected to the input of the main 3 and additional 4.1–4.n VCOs, while the output of the main VCO 3 is connected to the input of the main ADCs 5.1–5.n, and the output of the ith additional VCO 4.1-4.n is connected to the input of the i-th additional ADC 6.1-6.n, while the output of the i-th main ADC 5.1-5.n is connected to the input of the i-th main special processor FFT 7.1-7.n, and the output of the i-th additional ADC 6.1-6.n is connected to the input of the i-th additional special processor BPF 8.1-8.n, while the output of the i-th main special processor BPF 7.1-7.n is connected to the input ohm of the i-th main block of maximum amplitude 9.1-9.n, and the output of the i-th additional special processor FFT 8.1-8.n is connected to the input of the i-th additional block of maximum amplitude 10.1-10.n, the output of which is connected to the third input i of the subtraction block 12.1-12.n, the first input of which is combined with the i-th bus of the base codes of the system of residual classes 11.1-11.n, while the output of the i-th main block of maximum amplitude 9.1-9.n is connected to the second input i -th subtraction block 12.1-12.n, the output of which is combined with the i-th output bus of residual codes in the system of residual classes 13 .1-13.n.

основном и дополнительном тракте по аналогичной схеме. Вначале входной уровень преобразуется ГУН в частоту гармонического сигнала по формулеThe operation of the alias ADC (Fig. 1) begins with storing the level of the analog signal supplied to input 1 in the tracking-storage unit 2. Next, the remainder is calculated from the base p _i in the ith

primary and secondary tract in a similar way. Initially, the input level is converted by the VCO to the frequency of the harmonic signal according to the formula

АЦП одинакова:where F is the range of working harmonic frequencies, which is synthesized by a controlled voltage generator (VCO), f _n is the initial frequency of the VCO, E is the range of operating voltages of the ADC, U _in is the converted input signal level. Here f _n = f _min for the main VCO 3 and f _n = f _min + f _i / 4 for additional VCO 4.1-4.n, where for simplicity the minimum frequency f _min = 0. The harmonic frequency of the additional VCOs 4.1-4.n depends on f ₀ on the sampling frequency of the additional ADCs 6.1-6.n. But the sampling frequency of the i-th primary 5.i and additional 6.i

ADC is the same:

- количество уровней квантования алиасного АЦП, p_i - основания применяемой СОК, a n - количество оснований СОК. Далее гармоника сворачивается на основных 5.1-5.n (фиг. 2) и дополнительных 6.1-6.n (фиг. 3) АЦП, при этом алиасную частоту можно определить из выраженияWhere

is the number of quantization levels of the alias ADC, p _i is the base of the applied RNS, an is the number of bases of the RNC. Next, the harmonic is minimized on the main 5.1-5.n (Fig. 2) and additional 6.1-6.n (Fig. 3) ADCs, while the alias frequency can be determined from the expression

Here (and further), the mathematical operation in square brackets implies as a result the integer part of the number.

Because for FFT, 2 ^K (K is a positive integer) samples are necessary, while the bases of RNS p _i are mutually simple, then the condition must be satisfied:

Knowing the alias frequencies and sampling frequencies, it is possible to determine the values of all 2 ^K samples of each i-th primary (5.1-5.n) and additional (6.1-6.n) ADCs:

- разрядность АЦП 5.1-5.n и 6.1-6.n. Полученные на АЦП (5.1-5.n и 6.1-6.n) выборки передаются спецпроцессорам БПФ 7.1-7.n и 8.1-8.n, на выходе которых формируется по 2^K-1+1 значений, соответствующих линиям амплитудно-частотной характеристики (АЧХ) в первой зоне Найквиста. В блоках максимальной амплитуды 9.1-9.n и 10.1-10.n на основе полученных значений АЧХ производится интерполяция максимума спектра к непозиционному виду: в основных (9.1-9.n) по основанию p_i, а в дополнительных (10.1-10.n) по основанию 2. Как результат основной (9.1-9.n) блок выдает число в диапазоне от 0 до p_i-1, а дополнительный (10.1-10.n) - «1», если максимум спектра расположен в левой половине первой зоны Найквиста, и «0» - в правой половине, i-я основная и i-я дополнительная ветки сходятся на блоке вычитания 12.i

, где в зависимости от признака четности номера зоны Найквиста производится («1» от блока 10.i) или не производится («0» от блока 10.i) операция вычитания полученного в основной ветке числа из p_i-1. Значение p_i подается по шинам кодов оснований системы остаточных классов 11.1-11.n. Таким образом, на выходной шине 13.1-13.n формируется окончательный код в СОК.where A is the harmonic amplitude from the VCO (3 and 4.1-4.n), E _i are the ranges of the measured ADC (5.1-5.n and 6.1-6.n) voltages, the sample number

- the capacity of the ADC 5.1-5.n and 6.1-6.n. The samples obtained at the ADC (5.1-5.n and 6.1-6.n) are transmitted to the FFT special processors 7.1-7.n and 8.1-8.n, at the output of which 2 ^K-1 + 1 values are generated corresponding to the amplitude-frequency lines characteristics (frequency response) in the first Nyquist zone. In blocks of maximum amplitude 9.1-9.n and 10.1-10.n, based on the obtained AFC values, the spectrum maximum is interpolated to a non-positional form: in the main ones (9.1-9.n) on the basis of p _i , and in the additional ones (10.1-10. n) on the basis of 2. As a result, the main (9.1-9.n) block gives a number in the range from 0 to p _i -1, and the additional (10.1-10.n) - “1” if the maximum of the spectrum is located in the left half the first Nyquist zone, and “0” in the right half, the i-th main and i-th additional branches converge on the subtraction block 12.i

where, depending on the sign of parity, the Nyquist zone number is performed (“1” from block 10.i) or not performed (“0” from block 10.i), the operation subtracts the number received in the main branch from p _i -1. The value of p _i is supplied via the codes of the bases of the system of residual classes 11.1-11.n. Thus, on the output bus 13.1-13.n, the final code in the RNC is generated.

Example.

,

. Такой алиасный АЦП содержит вход, блок слежения хранения 2, основной 3 и три дополнительных ГУН 4.1-4.3, по три АЦП, спецпроцессора БПФ и блока максимальной амплитуды в основной (соответственно 5.1-5.3, 7.1-7.3, 9.1-9.3) и дополнительной (соответственно 6.1-6.3, 8.1-8.3, 10.1-10.3) ветке. Плюс к этому алиасный АЦП содержит по три шины кодов оснований СОК 11.1-11.3, блока вычитания 12.1-12.3 и выходных шин кодов остатков 13.1-13.3.Consider the alias ADC on the bases of the RNS p _i = 3, p ₂ = 5, p ₃ = 7 (i.e. n = 3,

,

. Such an alias ADC contains an input, storage tracking unit 2, main 3, and three additional VCOs 4.1-4.3, three ADCs, an FFT special processor, and a maximum amplitude unit in the main (5.1-5.3, 7.1-7.3, 9.1-9.3, respectively) and additional ( accordingly 6.1-6.3, 8.1-8.3, 10.1-10.3) branch. In addition, the alias ADC contains three buses of base codes of the SOK 11.1-11.3, a subtraction block 12.1-12.3, and output bus codes of residuals 13.1-13.3.

Let the input level of the device 1 received a signal level U _I. = 3.2 V, which is stored in the tracking-storage unit 2. Since the harmonic frequencies from the additional VCO 4.1-4.3 are tied to the sampling frequencies of the ADC 6.1-6.3, we first calculate the sampling frequencies using the well-known formula. Let the range of working harmonic frequencies F = 1000 kHz, then the sampling frequencies of the main 5.1-5.3 and additional 6.1-6.3 ADCs are:

Now you can return to the harmonics of the VCO. Let the range of voltages converted by an alias ADC be from 0 to 5 V, i.e. E = 5 V, then the harmonics frequency of the VCO at the input signal level U _I. = 3.2 V will be equal (according to the number of VCO):

We calculate the alias frequencies in all paths (according to the ADC number):

Since 2 ^K (K is a positive integer) samples are necessary for the FFT, it is sufficient for K = 4 to satisfy the condition, since maximum base p _n = 7. We define 2 ^K samples according to the well-known formula for each ADC 5.1-5.3 and 6.1-6.3 for simplicity by taking the initial phase of alias beats equal to zero, with amplitude A = 2 V, equality of all ranges of converted ADC voltages E _i = 5 V, equality of the bit depth of all ADCs (5.1-5.n and 6.1-6.n) L = 5 (table 1 in Fig. 4). We show for example the calculation of v ₁ for ADC 5.1:

The samples obtained at the ADC (5.1-5.3 and 6.1-6.3) are transmitted to the FFT 7.1-7.3 and 8.1-8.3 special processors, at the output of which nine values are generated that correspond to the frequency response lines in the first Nyquist zone. In the blocks of maximum amplitude 9.1-9.3 and 10.1-10.3, based on the obtained AFC values, the spectrum maximum is interpolated to the non-positional form: in (9.1-9.3) on the basis of p _i , and in additional (10.1-10.3) on the basis of 2. The interpolation algorithm can be different, but in this case it is convenient to proceed from the area of the figure under the spectrum curve in the corresponding non-positional frequency band, since this approach is obvious. According to FIG. 5, the following values are formed at the outputs of the main blocks of maximum amplitude: (9.1) - 1, (9.2) - 2, (9.3) - 2. According to FIG. 6, the following values are formed at the outputs of additional blocks of maximum amplitude: (10.1) - 0, (10.2) - 1, (10.3) - 1. The final generation of the RNC code occurs on the subtraction blocks (12.1-12.3): α1 = 1, α ₂ = (5-1) -2 = 2, α ₃ = (7-1) -2 = 4. Thus, the code in the SOK on the basis of p ₁ = 3, p ₂ = 5, p ₃ = 7 is 1, 2, 4.

Check the result. Consider a parallel ADC (P. Horowitz, W. Hill circuitry Art:..... Translated from English - Univ 6th - M .: Mir, 2003. - 704, Figure 9.49) (without zero offset by _^1/2 low-order), consisting of a reference voltage divider, comparators, the number of which is P = 3 * 5 * 7 = 105, and an encoder. The measured voltage is 3.2 V. Having received a table of reference voltages (table 2 in Fig. 7), multiples of E / 105, where E = 5 V, we find that the comparators from 1st to 67th are set to "1", and everyone else is at "0". Therefore, at the output of the encoder, a code is set whose decimal representation is 67. The whole remainders of dividing the number 67 by 3, 5 and 7 are respectively 1, 2 and 4.

Claims (1)

An alias analog-to-digital converter containing an input, a tracking-storage unit, n main analog-to-digital converters, n output buses of residual codes in the residual class system, where n is the number of bases of the residual class system, characterized in that a voltage-controlled main oscillator is introduced , n additional voltage-controlled oscillators, n additional analog-to-digital converters, n main and n additional special fast Fourier transform processors, n main and n additional maxi blocks total amplitude, n subtraction blocks and n bus codes of the base system of the residual classes, while the input of the device is combined with the input of the tracking-storage unit, the output of which is connected to the input of the main and additional generators controlled by voltage, while the output of the main generator controlled by voltage is connected with the input of the main analog-to-digital converters, and the output of the i-th

an additional voltage-controlled generator is connected to the input of the i-th additional analog-to-digital converter, while the output of the i-th main analog-to-digital converter is connected to the input of the i-th main special Fourier transform special processor, and the output of the i-th additional analog-to-digital the converter is connected to the input of the i-th additional special processor of the fast Fourier transform, while the output of the i-th main special processor of the fast Fourier transform is connected to the input of the i-th main maxim block amplitude, and the output of the i-th additional special processor of the fast Fourier transform is connected to the input of the i-th additional block of maximum amplitude, the output of which is connected to the third input of the i-th subtraction block, the first input of which is combined with the i-th bus of the base codes of the system of residual classes while the output of the i-th main block of maximum amplitude is connected to the second input of the i-th subtraction block, the output of which is combined with the i-th output bus of residual codes in the system of residual classes.

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