RU2124815C1 - Method and device for detection of state of telephone lines in electronic exchange system - Google Patents

Abstract

FIELD: telephone equipment. SUBSTANCE: multiple telephone lines are grouped into sets with given number of lines in order to set required number of groups. Said method involves detection of state of groups, then state of telephone lines in groups which state has been altered. Data about state of telephone lines are read in set of groups for detection of any group which state has been altered. State of telephone lines which belong to detected group are detected sequentially in order to detect any telephone line with altered state. Then method involves detection of direction of state alternation in telephone line, and update of data about state of telephone line in previous moment, if alternation direction in detected telephone line has been detected. EFFECT: decreased load on control equipment, decreased cost due to decreased number of serial-parallel converters. 4 cl, 7 dwg

Description

 The invention relates in General to electronic switching systems and, in particular, to a method and apparatus for determining the status of telephone lines in an electronic switching system, in which a large number of telephone lines are grouped with a predetermined number to establish the desired number of groups, while first determine the status of groups, and then the state of telephone lines in any group with a change in these states; as a result, the time required to determine the state of all telephone lines is reduced, so that the efficiency of the device for determining the state of a telephone line can be improved.

Description of known analogues
In the general case, the method of general periodic scanning is known as the most characteristic among the methods for determining the states of telephone lines in an electronic switching system. Briefly, the method of general periodic scanning is intended for scanning a large number of telephone lines, respectively connected to the switching circuit, in the interval of a predetermined period of time.

 In FIG. 1 is a block diagram of a conventional apparatus for determining telephone line states in an electronic switching system using the aforementioned general periodic scanning method. As shown in this drawing, a conventional apparatus for determining telephone line states comprises a plurality of telephone sets T1-Tn, a plurality of telephone line matching circuits S1-Sn for connecting a telephone set T1-Tn, respectively, and a plurality of parallel-serial converters PS1-PSn, each of which receives 8 detection signals in parallel from the corresponding eight telephone line matching circuits S1-Sn and converts 8 received parallel detection signals into a serial detection signal Nia.

 A conventional telephone line state determining apparatus also includes a telephone line controller 10 for issuing a line state determining signal in response to serial detection signals from the parallel-serial converters PS1-PSn and a common processor 20 for controlling the entire operation of the electronic switching system in response to the state determination signal lines from the controller 10 telephone lines.

 Each of the telephone line matching circuits S1-Sn determines the amount of constant loop current that flows through the telephone line of the corresponding telephone receiver T1-Tn when the lever switch of the corresponding telephone is turned on / off. Each of the telephone line circuits S1-Sn provides a low level detection signal if the detected constant loop current is greater than or equal to a predetermined value, and a high level detection signal if the detected constant loop current is less than the predetermined value.

 Each of the parallel-serial converters PS1-PSn receives in parallel 8 high or low level detection signals from the corresponding eight telephone line matching circuits S1-Sn and converts the received 8 parallel detection signals into a serial detection signal in the form of a frame from one byte.

 The controller 10 telephone lines generates a signal determining the status of the lines in response to single-byte frames of detection signals from parallel-serial converters PS1-PSn. At the same time, the telephone line controller 10 sends a signal for determining the status of the line to an interprocessor connector (MPS) intended for connection with a common processor 20.

 In response to the line state determination signal from the telephone line controller 10, the common processor 20 controls the overall operation of the electronic switching system associated with determining the state of the telephone line.

 The operation of a conventional device for determining the state of telephone lines of the above construction will be further described in detail.

 The clock period is determined in accordance with the data processing speed by the telephone line controller 10. For example, the clock period is 8 ms if the processing speed of the controller 10 telephone lines sequentially reads the status of all telephone lines during the clock period and stores the read data about the state of the lines during this time. The telephone line controller 10 compares the data with the state data of the lines of the previous clock period by performing the logical operation EXCLUSIVE OR on them and taking the logical negation of the received value. If the resulting value is low, indicating no change in state, the telephone line controller 10 stops working. For example, if the resulting value is high showing a change in state, the telephone line controller 10 recognizes the transition in the state of the telephone line. In this case, the state of the corresponding telephone line changes from high to low if the data on the line status in the previous clock period is 0, or this state changes from low to high if the data on the line status in the previous clock period is 1. When determining state transition controller 10 telephone lines inverts data about the state of the line in the previous clock period for determination in the next clock period.

 However, the above-described traditional device for determining the state of the telephone line has the disadvantage that the controller 10 of the telephone lines has a large number of loads, because it determines the status of all telephone lines individually in each clock period. A large number of loads limits the maximum controller performance of 10 telephone lines. In addition, since the parallel-serial PS1-PSn converters have inputs, each of which receives only one status data from telephone lines, the number of these converters is large and proportional to the number of telephone lines, and the required number of devices (for example, filters, codecs etc.) not shown in FIG. 1, but necessary to determine the state of telephone lines, which leads to an increase in cost.

Disclosure of Invention
The object of the present invention, to eliminate the aforementioned disadvantages of known devices, is to develop a method and device for determining the status of telephone lines in an electronic switching system, in which a large number of telephone lines are grouped into a predetermined number of switching units, the states of which are determined first, and then determine the state of telephone lines in any of the switching blocks with a state change.

 In accordance with one aspect of the present invention, there is provided a method for determining the states of telephone lines in an electronic switching system, comprising, as operations: (a) grouping a large number of telephone lines into a set with a predetermined number to establish a desired number of groups; and (b) determining the state of the telephone lines in the group kit.

 In accordance with another aspect of the present invention, there is provided an apparatus for determining the state of telephone lines in an electronic switching system, comprising a plurality of means for determining the state of a telephone line, each of which determines whether there is a change in state of a corresponding of a large number of telephone lines in response to a status signal of a telephone lever from a corresponding telephone line and generates a first state change detection signal in accordance with the detected result; many tools for performing a logical OR operation; each of these tools performs a logical OR operation on the first state change detection signals from the corresponding telephone line state determination means from the plurality of means for generating a second state change detection signal; parallel-serial conversion means for parallel receiving second state change detection signals from said plurality of means for performing a logical OR operation and converting received second state change detection signals to a serial frame of second state change detection signals; and control means for detecting any of the plurality of means for performing a logical OR operation with a state change in response to a sequential frame of second state change detection signals from said parallel-serial conversion means for individually determining telephone line states related to detected means for performing a logical operation OR.

Brief Description of the Drawings
The invention is further explained in the description of its embodiments with reference to the accompanying drawings.

FIG. 1 shows a block diagram of a conventional apparatus for determining the states of telephone lines in an electronic switching system;
FIG. 2 is a block diagram of a device for determining the state of telephone lines in an electronic switching system according to the present invention;
FIG. 3 is a detailed block diagram of a switching unit of a group of lines in the device of FIG. 2;
FIG. 4 is a detailed block diagram of a circuit for determining the state of telephone lines of FIG. 3;
FIG. 5a-e are signal diagrams in the components of FIG. 4;
FIG. 6A, B is a flowchart illustrating a method for determining telephone line states in an electronic switching system according to the present invention.

 Detailed description of a preferred embodiment.

 In FIG. 2 is a block diagram of a device for determining the state of telephone lines in an electronic switching system in accordance with the present invention. Some elements of this drawing coincide with elements in FIG. 1. Therefore, the same item numbers indicate common elements.

 As shown in FIG. 2, a device for determining the state of telephone lines contains a plurality (for example, 16) of switching units B1-B16 of groups of lines, each of which combines a large number of telephone lines connected to the switching circuit into a kit with a predetermined number of them (for example, 32) and produces a one-bit a detection signal corresponding to state changes of the grouped 32 telephone lines.

 In the device for determining the state of telephone lines provides many (for example, 2) parallel-serial converters PS1 and PS2. Each of the two parallel-serial converters PS1 and PS2 simultaneously receives single-bit detection signals from a plurality (for example, 8) of corresponding sets of switching groups of line groups B1-B16 and converts the received eight single-bit detection signals into a serial single-byte detection signal.

 The telephone line controller 10 is adapted to supply the CLK clock signal to the switching units B1-B16 of the line groups and the mode signal to the parallel-serial converters PS1 and PS2. The parallel-serial converters PS1 and PS2 are controlled by a mode signal from the controller 10 telephone lines in order to alternately give sequential single-bit detection signals to the controller 10 telephone lines.

 The common processor 20 is adapted to control the entire operation of the electronic switching system in response to a line status determination signal from the telephone line controller 10.

 In FIG. 3 shows a detailed block diagram of each of the switching units B1-B16 of the line groups in the device of FIG. 2. The switching units B1-B16 are of the same construction and therefore only one of them will be described in further detail below with reference to FIG. 3.

 As shown in FIG. 3, 32 telephone sets T1-T32 are assembled in a line group switching unit, 32 telephone line matching circuits S1-S32 are also assembled in a line group switching unit for matching telephone sets T1-T32, respectively.

 In addition, the switching unit of line groups includes a plurality (for example, 32) of telephone line state determination circuits SSC1-SSC32 for matching with 32 telephone line matching circuits S1-S32, respectively. Each of the telephone line state determination circuits SSC1-SSC32 detects a state change of the corresponding telephone line in response to an output signal from the corresponding one of the telephone line matching circuits S1-S32 and generates a one-bit output signal in accordance with the detected result.

 In order to output a single-bit detection signal from the switching unit of line groups, 32 circuits SSC1-SSC32 for determining the status of telephone lines are grouped into a set of 8 to form 4 groups. In this regard, a plurality of means WO1-WO5 for performing a logical OR operation are also collected in a switching unit of line groups.

 Each of the means WO1-WO4 performs a logical OR operation with single-bit output signals from the corresponding of 4 groups of circuits SSSC1-SSC8, SSC9-SSC16, SSC17-SSC24, SSC25-SSC32 for determining the status of telephone lines and generates a single-bit output signal. Means WO5 performs a logical OR operation on single-bit output signals from means WO1-WO4 and generates a single-bit detection signal.

 Means WO1-WO5 for performing a logical OR operation are connected to the signal transmission lines based on the "mounting OR" method, which is one of the "mounting logic" methods for control. In this method, a "wired OR" multiple input signal lines are connected to one contact, which forms a single output signal line. High or low level signals from the input signal transmission lines are logically summed on a single contact and then output via the output signal transmission line.

 The output signal from the switching unit of the group of lines with the above-described wiring connection is transmitted to the corresponding input data terminal 1 (hereinafter referred to as the input data terminal) of the corresponding parallel-serial converter (for example, PS1).

 In a preferred embodiment of the present invention, the number of telephone lines connected to one of the parallel-serial converters through means WO1-WO5 for performing a logical OR operation using a wiring connection as described above is 256.

 In FIG. 4 shows a detailed block diagram of each of the telephone line state determination circuits SSC1-SSC32 of FIG. 3. The telephone line state determination circuits SSC1-SSC32 are of the same design and therefore only one of them will be described below with reference to FIG. 4.

 As shown in FIG. 4, the telephone line state determination circuit includes a first trigger FF1 for inputting a telephone line status signal corresponding to one of the telephone line matching circuits S1-S32 to its input D1, a comparator 11 for comparing the output signal of the first trigger FF1 with a telephone line status signal with the corresponding telephone line matching circuit S1-S32, and a second trigger FF2 for inputting a signal from comparator 11 to its input D2.

 The operation of the telephone line state determination apparatus with the above construction will hereinafter be described with reference to FIG. 5a-e and FIG. 6.

 First of all, the transmission of a signal for determining the state of telephone lines, for example, from a switching group B1 of a group of lines will be described with reference to FIG. 5a-e.

 In FIG. 5a-e are timing diagrams of signals at points in the circuit of FIG. 4. Each of the telephone line matching circuits S1-S32 determines a constant loop current that flows through the telephone line corresponding to one of the T1-T32 telephones when the lever switch of the corresponding telephone is turned on or off. As a result, each of the telephone line matching circuits S1-S32 provides a telephone line status signal corresponding to the state of the lever switch of the corresponding telephone set.

 In each of the circuits SSC1-SSC32 for determining the state of telephone lines, the input of the first flip-flop FF1 receives a telephone line status signal from one of the 32 telephone line matching circuits S1-S32. The first trigger FF1 delays the input telephone line status signal (Fig. 5b) for a predetermined time interval in synchronization with the clock signal of the telephone line controller 10 (Fig. 5a) and generates a delayed telephone line status signal (Fig. 5c). A clock signal (FIG. 5a) is periodically supplied from the telephone line controller 10 to determine the status of the telephone lines. The comparator 11 compares the delayed telephone line status signal from the first trigger FF1 (FIG. 5c) with the telephone line status signal (FIG. 5b). As a result of the comparison, the comparator 1 provides a high level signal (FIG. 5d) in the interval in which the delayed telephone line status signal (FIG. 5c) differs from the telephone line status signal (FIG. 5b).

 The output signal of the comparator 11 (Fig. 5d) is applied to the input D2 of the second trigger FF2. The second trigger FF2 delays the output signal of the comparator 11 (Fig. 5d) for a predetermined interval synchronously with the clock signal of the telephone line controller 10 (Fig. 5a) and generates a delayed signal (Fig. 5e).

 The output of the second trigger FF2 of each of the telephone line state determination circuits SSC1-SSc32 is applied to the corresponding one of the means WO1-WO4 for performing a logical OR operation. As shown above, the telephone line state determination circuits SSC1-SSC32 are connected 8 to the corresponding means WO1-WO4 to perform a logical OR operation, each of which transmits a single-bit signal on a single transmission line. Upon receipt of at least one logical “1” signal, each of the means WO1-WO4 for performing a logical operation OR generates a logical “1” signal. The output signals from means WO1-WO4 for performing a logical OR operation are supplied to means WO5 for performing a logical OR operation. The WO5 means for performing a logical OR operation likewise produces a one-bit signal.

 Thus, a single-bit signal is generated from four groups of G1-G4 lines (Fig. 3). That is, an output signal is issued from each switching unit of the group of lines. Then, each of the two parallel-serial converters PS1 and PS2 simultaneously receives 8 single-bit detection signals from the corresponding eight switching blocks S1-S16 of line groups and converts the received eight parallel single-bit detection signals to a serial single-byte detection signal in the form of a frame.

 When receiving sequential frames of single-byte detection signals from the parallel-serial converters PS1 and PS2, the telephone line controller 10 performs operations as shown in FIG. 6.

 In FIG. 6 is a flowchart of a method for determining the states of telephone lines in an electronic switching system according to the present invention. In this case, many nodes can be used, each of which contains 16 switching blocks of line groups. Those. a separate node includes 16 switching blocks of groups of lines.

 The telephone line controller 10 checks for state changes in the nodes to detect any of the nodes with altered states in step S1. That is, the telephone line controller 10 reads sequential frames of single-byte detection signals from the parallel-serial converters PS1 and PS2 to detect any switching unit B1-B6 of the group of lines producing a high level detection signal.

 If any one of the nodes changes its state, i.e. if a high level ("1") is present in consecutive frames of single-byte detection signals from parallel-serial converters PS1 and PS2, the telephone line controller 10 in step S2 sends a command to the parallel-serial converters PS1 and PS2 to read the output signals from 16 switching blocks B1- B16, line groups in the corresponding node to check in step S3, high or low level output signals from the switching blocks B1-B16 line groups.

 If it is revealed in step S3 that one of the output signals from the switching groups B1-B16 of the line groups is high, the telephone line controller 10 in step S4 transmits to the serial-parallel converters PS1 and PS2 a command to detect the switching block of the group of lines issuing high level signal, and read the status of the lever switches of telephone lines belonging to the detected switching unit of the group of lines.

 In step S5, the telephone line controller 10 compares the data on the state of the lines of the current clock period read in step S4 with the data on the state of the lines of the previous clock period stored in its memory, the comparison is carried out by performing an EXCLUSIVE OR logical operation on this data and taking a logical negation from the received value. If, in step S6, the resulting value is high, indicating the presence of a state change, the telephone line controller 10 recognizes the state of the lever switch and then proceeds to step S7 to enter a mode for determining the direction of this change in the corresponding telephone line.

 On the contrary, if in step S6, the resulting value is low, corresponding to no change, the telephone line controller 10 returns to step S4 to read the state of the lever switch of the next telephone line.

 If, in step S7, the telephone line controller 10 enters a mode for determining the direction of changes, then in step S8 it checks whether the lever switch status signal or the line status data for the previous clock period is stored in its memory high or low. If it is determined in step S8 that the state of the lever switch in the previous clock period is high, the telephone line controller 10 proceeds to step S9 to determine if the telephone line is switched from its “free” (low) state to the “ busy "(high level). On the contrary, if it was determined in step S8 that the telephone line lever state signal at the previous clock period is low, the telephone line controller 10 proceeds to step S10 to determine if the telephone line is switched from its busy state (high level ) to the "free" state (low level).

 After determining the state change, the telephone line controller 10 in step S11 updates the line status data of the previous clock period recorded in its memory to determine the next clock period.

 In operation, the telephone line controller 10 controls the parallel-serial converters PS1 and PS2 to detect state changes in individual telephone lines in a single switching unit. In addition, the telephone line controller 10 provides a front-facing mode signal to the parallel-serial converters PS1 and PS2, and a periodic clock signal to the telephone line matching circuits S1-S32 and to the telephone line state determination circuit SSC1-SSC32.

 In response to the line state determination signal from the telephone line controller 10, the common processor 20 controls the entire operation of the electronic switching system associated with determining the state of the telephone lines. In addition, the common processor 20 performs such necessary actions as transmitting a tone signal to a telephone line with a state change.

 As follows from the previous description, according to this invention, a large number of telephone lines are grouped with a predetermined number to establish the desired number of groups, first determine the state of the groups, and then the state of the telephone lines in any group with a change in these states, without using the general periodic method survey. Therefore, the number of telephone line controller loads can be significantly reduced. In addition, the number of telephone lines checked by the telephone line controller is increasing. Therefore, the number of telephone line controllers needed is reduced. This translates into cost reduction.

 Although preferred embodiments of the present invention have been explained for purposes of illustration, it will be apparent to those skilled in the art that various modifications, additions, and substitutions are possible without affecting the scope and meaning of the invention described in the following claims.

The inscriptions on the algorithm of FIG. 6A and B
0: start
1: Read state change in nodes
2: Read state change in state blocks of state blocks
3: Is there a state change? (is there 1 at the output of the switching unit?)
4: Read the status of telephone lines in stateful blocks
5: Compare the line status in the current period with the line status in the previous period
6: Is there a state change? (value is 1?)
7: Determine the direction of change
8: Data on the state of the line in the previous period is 1?
9: Change from low to high
10: Change from high to low
11: Update line status data in the previous period.

Claims (4)

 1. A method for determining the state of telephone lines in an electronic switching system, which consists in grouping the telephone lines into a set with a predetermined number of them to establish the desired number of groups and reading data on the state of the telephone line included in the received set of groups to detect any or one group with a state change, characterized in that the state of the telephone lines belonging to the group with the changed state is determined separately, the direction of the state change is determined Nia telephone line and update the data on the telephone line state in the previous clock cycle, if it was determined the change in the state of a phone line.  2. A device for determining the state of a telephone line in an electronic switching system, comprising n telephone line matching circuits combined into m groups of k circuits in each group, parallel-serial code converters, a controller and a common processor, the control inputs of telephone line matching circuits being connected to the first input of the controller, the second output of which is connected to the control inputs of the corresponding parallel-serial code converters, the outputs of which are connected to the inputs of the controller a, connected to a common processor, characterized in that it additionally contains n line state change determination units combined in m groups of k blocks in a group and connected in series with n line matching circuits, the control inputs of line state determination units being connected to the first output of the controller , a lot of OR elements connected between the line state determination units and parallel-serial converters and made in the form of OR mounting elements.  3. The device according to claim 2, characterized in that the set of OR elements includes a series connection of m x k input OR elements, where m x k = n, grouped into k groups of m elements in a group and an additional m input OR element.  4. The device according to claim 2, characterized in that each of the telephone line state determining units includes a first delay element, a comparator and a second delay element connected in series, the control inputs of the first and second delay elements being connected to the first output of the clock generating controller , and the second input of the comparator is connected to the output of the corresponding matching unit. Priority on points:
12/30/92 - according to claim 1;
10.20.93 - according to claim 2.

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