NL7613464A - Halfgeleiderinrichting, bestand tegen hoge spanningen, en werkwijze voor het vervaardigen daarvan. - Google Patents
Halfgeleiderinrichting, bestand tegen hoge spanningen, en werkwijze voor het vervaardigen daarvan.Info
- Publication number
- NL7613464A NL7613464A NL7613464A NL7613464A NL7613464A NL 7613464 A NL7613464 A NL 7613464A NL 7613464 A NL7613464 A NL 7613464A NL 7613464 A NL7613464 A NL 7613464A NL 7613464 A NL7613464 A NL 7613464A
- Authority
- NL
- Netherlands
- Prior art keywords
- manufacturing
- semiconductor device
- high voltage
- voltage resistance
- resistance
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
- H10D62/125—Shapes of junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
- H01L21/743—Making of internal connections, substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/137—Collector regions of BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/63—Combinations of vertical and lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/641—Combinations of only vertical BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/641—Combinations of only vertical BJTs
- H10D84/642—Combinations of non-inverted vertical BJTs of the same conductivity type having different characteristics, e.g. Darlington transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/65—Integrated injection logic
- H10D84/658—Integrated injection logic integrated in combination with analog structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/87—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of PN-junction gate FETs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/05—Etch and refill
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/051—Etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/115—Orientation
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Bipolar Transistors (AREA)
- Element Separation (AREA)
- Bipolar Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP50145041A JPS5269587A (en) | 1975-12-08 | 1975-12-08 | Device and manufacture for high voltage resisting semiconductor |
Publications (1)
Publication Number | Publication Date |
---|---|
NL7613464A true NL7613464A (nl) | 1977-06-10 |
Family
ID=15376014
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
NL7613464A NL7613464A (nl) | 1975-12-08 | 1976-12-02 | Halfgeleiderinrichting, bestand tegen hoge spanningen, en werkwijze voor het vervaardigen daarvan. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4089021A (nl) |
JP (1) | JPS5269587A (nl) |
DE (1) | DE2655400A1 (nl) |
NL (1) | NL7613464A (nl) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5457865A (en) * | 1977-10-17 | 1979-05-10 | Hitachi Ltd | Manufacture of semiconductor device |
US4278987A (en) * | 1977-10-17 | 1981-07-14 | Hitachi, Ltd. | Junction isolated IC with thick EPI portion having sides at least 20 degrees from (110) orientations |
JPS5516418A (en) * | 1978-07-21 | 1980-02-05 | Hitachi Ltd | Manufacturing method of semiconductor device |
DE2835330C3 (de) * | 1978-08-11 | 1982-03-11 | Siemens AG, 1000 Berlin und 8000 München | Integrierter bipolarer Halbleiterschaltkreis sowie Verfahren zu seiner Herstellung |
JPS5534455A (en) * | 1978-08-31 | 1980-03-11 | Nec Corp | Integrated circuit of semiconductor |
JPS5555559A (en) * | 1978-10-19 | 1980-04-23 | Toshiba Corp | Method of fabricating semiconductor device |
JPS5951743B2 (ja) * | 1978-11-08 | 1984-12-15 | 株式会社日立製作所 | 半導体集積装置 |
JPS55146960A (en) * | 1979-05-02 | 1980-11-15 | Hitachi Ltd | Manufacture of integrated circuit device |
US4251300A (en) * | 1979-05-14 | 1981-02-17 | Fairchild Camera And Instrument Corporation | Method for forming shaped buried layers in semiconductor devices utilizing etching, epitaxial deposition and oxide formation |
JPS55160443A (en) * | 1979-05-22 | 1980-12-13 | Semiconductor Res Found | Manufacture of semiconductor integrated circuit device |
US4272302A (en) * | 1979-09-05 | 1981-06-09 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Method of making V-MOS field effect transistors utilizing a two-step anisotropic etching and ion implantation |
JPS5648168A (en) * | 1979-09-28 | 1981-05-01 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Semiconductor integrated circuit unit and its preparation |
JPS5676560A (en) * | 1979-11-28 | 1981-06-24 | Hitachi Ltd | Semiconductor device |
JPS5824018B2 (ja) * | 1979-12-21 | 1983-05-18 | 富士通株式会社 | バイポ−ラicの製造方法 |
US4408386A (en) * | 1980-12-12 | 1983-10-11 | Oki Electric Industry Co., Ltd. | Method of manufacturing semiconductor integrated circuit devices |
JPS5880849A (ja) * | 1981-11-10 | 1983-05-16 | Toshiba Corp | 半導体装置 |
US4609413A (en) * | 1983-11-18 | 1986-09-02 | Motorola, Inc. | Method for manufacturing and epitaxially isolated semiconductor utilizing etch and refill technique |
US4636269A (en) * | 1983-11-18 | 1987-01-13 | Motorola Inc. | Epitaxially isolated semiconductor device process utilizing etch and refill technique |
JPS60117765A (ja) * | 1983-11-30 | 1985-06-25 | Fujitsu Ltd | 半導体装置の製造方法 |
EP0144865B1 (en) * | 1983-12-05 | 1991-06-26 | General Electric Company | Semiconductor wafer with an electrically-isolated semiconductor device |
US4599792A (en) * | 1984-06-15 | 1986-07-15 | International Business Machines Corporation | Buried field shield for an integrated circuit |
US4933733A (en) * | 1985-06-03 | 1990-06-12 | Advanced Micro Devices, Inc. | Slot collector transistor |
JP2515745B2 (ja) * | 1986-07-14 | 1996-07-10 | 株式会社日立製作所 | 半導体装置の製造方法 |
US5332920A (en) * | 1988-02-08 | 1994-07-26 | Kabushiki Kaisha Toshiba | Dielectrically isolated high and low voltage substrate regions |
KR900015352A (ko) * | 1989-03-14 | 1990-10-26 | 아오이 죠이치 | 전하전송 디바이스를 갖춘 반도체장치 |
US5286986A (en) * | 1989-04-13 | 1994-02-15 | Kabushiki Kaisha Toshiba | Semiconductor device having CCD and its peripheral bipolar transistors |
JPH07105458B2 (ja) * | 1989-11-21 | 1995-11-13 | 株式会社東芝 | 複合型集積回路素子 |
JPH03263351A (ja) * | 1990-02-27 | 1991-11-22 | Oki Electric Ind Co Ltd | 半導体基板の製造方法 |
US5077594A (en) * | 1990-03-16 | 1991-12-31 | Motorola, Inc. | Integrated high voltage transistors having minimum transistor to transistor crosstalk |
KR960015347B1 (ko) * | 1990-09-10 | 1996-11-09 | 후지쓰 가부시끼가이샤 | 반도체장치 |
JP3562611B2 (ja) * | 1996-11-05 | 2004-09-08 | ソニー株式会社 | 半導体装置及びその製造方法 |
JPH10284753A (ja) * | 1997-04-01 | 1998-10-23 | Sony Corp | 半導体装置及びその製造方法 |
US6365447B1 (en) | 1998-01-12 | 2002-04-02 | National Semiconductor Corporation | High-voltage complementary bipolar and BiCMOS technology using double expitaxial growth |
US7067383B2 (en) * | 2004-03-08 | 2006-06-27 | Intersil Americas, Inc. | Method of making bipolar transistors and resulting product |
JP4982948B2 (ja) * | 2004-08-19 | 2012-07-25 | 富士電機株式会社 | 半導体装置の製造方法 |
US7776672B2 (en) * | 2004-08-19 | 2010-08-17 | Fuji Electric Systems Co., Ltd. | Semiconductor device and manufacturing method thereof |
US20100032766A1 (en) * | 2006-06-02 | 2010-02-11 | Agere Systems Inc. | Bipolar Junction Transistor with a Reduced Collector-Substrate Capacitance |
US7737526B2 (en) * | 2007-03-28 | 2010-06-15 | Advanced Analogic Technologies, Inc. | Isolated trench MOSFET in epi-less semiconductor sustrate |
CN109686780B (zh) * | 2017-10-19 | 2023-06-09 | 中国电子科技集团公司第四十四研究所 | 硅基高电流传输比双达林顿晶体管及其制作方法 |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3993512A (en) * | 1971-11-22 | 1976-11-23 | U.S. Philips Corporation | Method of manufacturing an integrated circuit utilizing outdiffusion and multiple layer epitaxy |
-
1975
- 1975-12-08 JP JP50145041A patent/JPS5269587A/ja active Pending
-
1976
- 1976-12-02 NL NL7613464A patent/NL7613464A/nl not_active Application Discontinuation
- 1976-12-03 US US05/747,323 patent/US4089021A/en not_active Expired - Lifetime
- 1976-12-07 DE DE19762655400 patent/DE2655400A1/de not_active Ceased
Also Published As
Publication number | Publication date |
---|---|
JPS5269587A (en) | 1977-06-09 |
DE2655400A1 (de) | 1977-06-23 |
US4089021A (en) | 1978-05-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
BV | The patent application has lapsed |